7fa58c38c0
Another entry
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llvm-svn: 28370
2006-05-17 21:20:51 +00:00
dcec882286
Remove PointerType from class Target
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llvm-svn: 28368
2006-05-17 21:20:27 +00:00
8c6b234ce8
Should pass by reference.
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llvm-svn: 28357
2006-05-17 19:07:40 +00:00
00bce3f2f4
Another entry
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llvm-svn: 28356
2006-05-17 19:05:31 +00:00
c7df70db57
Implement the custom lowering hook right, returning values for all of the
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arguments at once.
llvm-svn: 28327
2006-05-16 17:14:26 +00:00
7b8b8bbbf9
Fix a bug I introduced yesterday, which broke functions with *no* arguments.
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llvm-svn: 28326
2006-05-16 17:08:35 +00:00
9fee442e63
X86 integer register classes naming changes. Make them consistent with FP, vector classes.
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llvm-svn: 28324
2006-05-16 07:21:53 +00:00
3d82699605
Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend,
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it doesn't currently use/maintain the chain properly. Also, make the
X86ISelLowering.cpp file 80-col clean.
llvm-svn: 28320
2006-05-16 06:45:34 +00:00
b19ce6c810
More coverity fixes
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llvm-svn: 28266
2006-05-12 21:14:20 +00:00
22f95b74ba
Dead variable
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llvm-svn: 28265
2006-05-12 21:12:22 +00:00
db30388d48
Remove dead code
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llvm-svn: 28261
2006-05-12 19:03:56 +00:00
8c2c1e90c4
Refactor a bunch of includes so that TargetMachine.h doesn't have to include
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TargetData.h. This should make recompiles a bit faster with my current
TargetData tinkering.
llvm-svn: 28238
2006-05-12 06:33:49 +00:00
dd7230c9e0
Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot
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llvm-svn: 28223
2006-05-11 07:33:49 +00:00
fc532fe1b7
Remove a completed entry.
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llvm-svn: 28199
2006-05-09 06:54:05 +00:00
4ebc6a2311
Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code.
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llvm-svn: 28194
2006-05-09 05:33:48 +00:00
0b7acaf027
MASM doesn't have one of these.
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llvm-svn: 28190
2006-05-09 05:21:47 +00:00
e0006c6794
Preserve prior behavior
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llvm-svn: 28187
2006-05-09 05:15:24 +00:00
d0201946ad
Fix the MASM asmprinter's lies. It does not want to emit code to .text/.data
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it wants it emitted to _text/_data.
llvm-svn: 28185
2006-05-09 05:12:53 +00:00
8488ba2e41
Split SwitchSection into SwitchTo{Text|Data}Section methods.
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llvm-svn: 28184
2006-05-09 04:59:56 +00:00
aa193d80a9
Another bad case I noticed
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llvm-svn: 28177
2006-05-08 21:39:45 +00:00
5bcea612f4
add a note
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llvm-svn: 28176
2006-05-08 21:24:21 +00:00
9733bde74c
Fixing truncate. Previously we were emitting truncate from r16 to r8 as
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movw. That is we promote the destination operand to r16. So
%CH = TRUNC_R16_R8 %BP
is emitted as
movw %bp, %cx.
This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.
We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.
Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.
llvm-svn: 28164
2006-05-08 08:01:26 +00:00
6732dcd5b3
Typo's
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llvm-svn: 28158
2006-05-07 10:10:20 +00:00
ce9b9fe6eb
Fix some loose ends in MASM support.
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llvm-svn: 28148
2006-05-06 21:27:14 +00:00
6d4a2dc4ad
Teach the X86 backend about non-i32 inline asm register classes.
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llvm-svn: 28139
2006-05-06 00:29:37 +00:00
c22d4bede5
Print *some* grouping around inline asm blocks so we know where they are.
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llvm-svn: 28133
2006-05-05 21:48:50 +00:00
44a73e9fa5
Teach the code generator to use cvtss2sd as extload f32 -> f64
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llvm-svn: 28131
2006-05-05 21:35:18 +00:00
52c22512b9
Need extload patterns after Chris' DAG combiner changes
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llvm-svn: 28127
2006-05-05 08:23:07 +00:00
ddb6cc1d8e
Better implementation of truncate. ISel matches it to a pseudo instruction
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that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.
llvm-svn: 28119
2006-05-05 05:40:20 +00:00
469647bf38
Remove and simplify some more machineinstr/machineoperand stuff.
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llvm-svn: 28105
2006-05-04 18:16:01 +00:00
10b71c0d08
Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
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llvm-svn: 28104
2006-05-04 18:05:43 +00:00
10d6341618
Move some methods out of MachineInstr into MachineOperand
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llvm-svn: 28102
2006-05-04 17:52:23 +00:00
fef7a2d0f5
There shalt be only one "immediate" operand type!
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llvm-svn: 28099
2006-05-04 17:21:20 +00:00
06041abeb6
Make external globals public; other minor cleanup.
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llvm-svn: 28096
2006-05-04 16:20:22 +00:00
f812a4fa75
Make Intel syntax the default when LLVM is built with VC++.
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llvm-svn: 28095
2006-05-04 16:19:27 +00:00
ee64b6b40f
Remove a bunch more dead V9 specific stuff
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llvm-svn: 28094
2006-05-04 01:26:39 +00:00
940cc978ef
Remove a bunch more SparcV9 specific stuff
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llvm-svn: 28093
2006-05-04 01:15:02 +00:00
6e663f1c1e
Remove some more V9-specific stuff.
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llvm-svn: 28092
2006-05-04 00:49:59 +00:00
9f6639b64d
Remove some more unused stuff from MachineInstr that was leftover from V9.
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llvm-svn: 28091
2006-05-04 00:44:25 +00:00
2aef59f123
Simplify handling of relocations
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llvm-svn: 28090
2006-05-04 00:42:08 +00:00
8b1cde2bbe
Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when
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movlps cannot be used (e.g. when load from m64 has multiple uses).
llvm-svn: 28089
2006-05-03 20:32:03 +00:00
e3a9c70ba0
Change from using MachineRelocation ctors to using static methods
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in MachineRelocation to create Relocations.
llvm-svn: 28088
2006-05-03 20:30:20 +00:00
9e68942d78
inline a simple method
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llvm-svn: 28083
2006-05-03 17:21:32 +00:00
1d8ee1fc80
Suck block address tracking out of targets into the JIT Emitter. This
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simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.
llvm-svn: 28082
2006-05-03 17:10:41 +00:00
43b1ed7e3d
Teach the x86 jit how to handle jump tables not directly used by a jump
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instruction.
llvm-svn: 28080
2006-05-03 04:52:47 +00:00
20a631fde7
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
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This fixes PR 759.
llvm-svn: 28074
2006-05-03 01:29:57 +00:00
d8b192ba3b
Change the BasicBlockAddrs map to be a vector, indexed by MBB number.
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llvm-svn: 28069
2006-05-03 00:32:55 +00:00
b8065a9a3a
Several related changes:
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1. Change several methods in the MachineCodeEmitter class to be pure virtual.
2. Suck emitConstantPool/initJumpTableInfo into startFunction, removing them
from the MachineCodeEmitter interface, and reducing the amount of target-
specific code.
3. Change the JITEmitter so that it allocates constantpools and jump tables
*right* next to the functions that they belong to, instead of in a separate
pool of memory. This makes all memory for a function be contiguous, and
means the JITEmitter only tracks one block of memory now.
llvm-svn: 28065
2006-05-02 23:22:24 +00:00
233391f5f5
Remove some stuff from the README
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llvm-svn: 28063
2006-05-02 22:43:31 +00:00
e1c96369e2
Fix a purely hypothetical problem (for now): emitWord emits in the host
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byte format. This doesn't work when using the code emitter in a cross target
environment. Since the code emitter is only really used by the JIT, this
isn't a current problem, but if we ever start emitting .o files, it would be.
llvm-svn: 28060
2006-05-02 19:14:47 +00:00
Evan Cheng