Commit Graph

89 Commits

Author SHA1 Message Date
Chandler Carruth 1028142564 Implement a block placement pass based on the branch probability and
block frequency analyses. This differs substantially from the existing
block-placement pass in LLVM:

1) It operates on the Machine-IR in the CodeGen layer. This exposes much
   more (and more precise) information and opportunities. Also, the
   results are more stable due to fewer transforms ocurring after the
   pass runs.
2) It uses the generalized probability and frequency analyses. These can
   model static heuristics, code annotation derived heuristics as well
   as eventual profile loading. By basing the optimization on the
   analysis interface it can work from any (or a combination) of these
   inputs.
3) It uses a more aggressive algorithm, both building chains from tho
   bottom up to maximize benefit, and using an SCC-based walk to layout
   chains of blocks in a profitable ordering without O(N^2) iterations
   which the old pass involves.

The pass is currently gated behind a flag, and not enabled by default
because it still needs to grow some important features. Most notably, it
needs to support loop aligning and careful layout of loop structures
much as done by hand currently in CodePlacementOpt. Once it supports
these, and has sufficient testing and quality tuning, it should replace
both of these passes.

Thanks to Nick Lewycky and Richard Smith for help authoring & debugging
this, and to Jakob, Andy, Eric, Jim, and probably a few others I'm
forgetting for reviewing and answering all my questions. Writing
a backend pass is *sooo* much better now than it used to be. =D

llvm-svn: 142641
2011-10-21 06:46:38 +00:00
Jakob Stoklund Olesen 934b7d7645 Rename SSEDomainFix -> lib/CodeGen/ExecutionDepsFix.
I'll clean up the source in the next commit.

llvm-svn: 140663
2011-09-28 00:01:54 +00:00
Jakob Stoklund Olesen f152df1e6b Rename LowerSubregs to ExpandPostRAPseudos.
I'll fix the file contents in the next commit.

This pass is currently expanding the COPY and SUBREG_TO_REG pseudos. I
am going to add a hook so targets can expand more pseudo-instructions
after register allocation.

Many targets have pseudo-instructions that assist the register
allocator.  They can be expanded after register allocation, before PEI
and PostRA scheduling.

llvm-svn: 140469
2011-09-25 16:46:00 +00:00
Jakob Stoklund Olesen 487f2a37bf Extract live range calculations from SplitKit.
SplitKit will soon need two copies of these data structures, and the
algorithms will also be useful when LiveIntervalAnalysis becomes
independent of LiveVariables.

llvm-svn: 139572
2011-09-13 01:34:21 +00:00
Devang Patel e1649c31cb Provide utility to extract and use lexical scoping information from machine instructions.
llvm-svn: 137237
2011-08-10 19:04:06 +00:00
Chandler Carruth 9d7feab3e0 Rewrite the CMake build to use explicit dependencies between libraries,
specified in the same file that the library itself is created. This is
more idiomatic for CMake builds, and also allows us to correctly specify
dependencies that are missed due to bugs in the GenLibDeps perl script,
or change from compiler to compiler. On Linux, this returns CMake to
a place where it can relably rebuild several targets of LLVM.

I have tried not to change the dependencies from the ones in the current
auto-generated file. The only places I've really diverged are in places
where I was seeing link failures, and added a dependency. The goal of
this patch is not to start changing the dependencies, merely to move
them into the correct location, and an explicit form that we can control
and change when necessary.

This also removes a serialization point in the build because we don't
have to scan all the libraries before we begin building various tools.
We no longer have a step of the build that regenerates a file inside the
source tree. A few other associated cleanups fall out of this.

This isn't really finished yet though. After talking to dgregor he urged
switching to a single CMake macro to construct libraries with both
sources and dependencies in the arguments. Migrating from the two macros
to that style will be a follow-up patch.

Also, llvm-config is still generated with GenLibDeps.pl, which means it
still has slightly buggy dependencies. The internal CMake
'llvm-config-like' macro uses the correct explicitly specified
dependencies however. A future patch will switch llvm-config generation
(when using CMake) to be based on these deps as well.

This may well break Windows. I'm getting a machine set up now to dig
into any failures there. If anyone can chime in with problems they see
or ideas of how to solve them for Windows, much appreciated.

llvm-svn: 136433
2011-07-29 00:14:25 +00:00
Jakub Staszak 875ebd5f5d Rename BlockFrequency to BlockFrequencyInfo and MachineBlockFrequency to
MachineBlockFrequencyInfo.

llvm-svn: 135937
2011-07-25 19:25:40 +00:00
Jakub Staszak 2713117135 Add MachineBlockFrequency analysis.
llvm-svn: 135352
2011-07-16 20:23:20 +00:00
Chandler Carruth 137c7ead2e Fix CMake build by removing this now dead file.
llvm-svn: 133981
2011-06-28 02:03:12 +00:00
Rafael Espindola ea1a9c342d Merge SimpleRegisterCoalescing.cpp into RegisterCoalescer.cpp.
llvm-svn: 133897
2011-06-26 22:06:36 +00:00
Jakub Staszak 12a43bdde5 Introduce MachineBranchProbabilityInfo class, which has similar API to
BranchProbabilityInfo (expect setEdgeWeight which is not available here).
Branch Weights are kept in MachineBasicBlocks. To turn off this analysis
set -use-mbpi=false.

llvm-svn: 133184
2011-06-16 20:22:37 +00:00
Jakob Stoklund Olesen c58894bc36 Add a RegisterClassInfo class that lazily caches information about
register classes.

It provides information for each register class that cannot be
determined statically, like:

- The number of allocatable registers in a class after filtering out the
  reserved and invalid registers.

- The preferred allocation order with registers that overlap callee-saved
  registers last.

- The last callee-saved register that overlaps a given physical register.

This information usually doesn't change between functions, so it is
reused for compiling multiple functions when possible.  The many
possible combinations of reserved and callee saves registers makes it
unfeasible to compute this information statically in TableGen.

Use RegisterClassInfo to count available registers in various heuristics
in SimpleRegisterCoalescing, making the pass run 4% faster.

llvm-svn: 132450
2011-06-02 02:19:35 +00:00
Jakob Stoklund Olesen 91cbcaf957 Add an InterferenceCache class for caching per-block interference ranges.
When the greedy register allocator is splitting multiple global live ranges, it
tends to look at the same interference data many times. The InterferenceCache
class caches queries for unaltered LiveIntervalUnions.

llvm-svn: 128764
2011-04-02 06:03:35 +00:00
Oscar Fuentes 5ed962656c Move library stuff out of the toplevel CMakeLists.txt file.
llvm-svn: 125968
2011-02-18 22:06:14 +00:00
Chris Lattner 878665b4bc sort this.
llvm-svn: 123129
2011-01-09 21:31:39 +00:00
Jakob Stoklund Olesen 8e236eac74 Add the SpillPlacement analysis pass.
This pass precomputes CFG block frequency information that can be used by the
register allocator to find optimal spill code placement.

Given an interference pattern, placeSpills() will compute which basic blocks
should have the current variable enter or exit in a register, and which blocks
prefer the stack.

The algorithm is ready to consume block frequencies from profiling data, but for
now it gets by with the static estimates used for spill weights.

This is a work in progress and still not hooked up to RegAllocGreedy.

llvm-svn: 122938
2011-01-06 01:21:53 +00:00
Jakob Stoklund Olesen f96ae684c4 Turn the EdgeBundles class into a stand-alone machine CFG analysis pass.
The analysis will be needed by both the greedy register allocator and the
X86FloatingPoint pass. It only needs to be computed once when the CFG doesn't
change.

This pass is very fast, usually showing up as 0.0% wall time.

llvm-svn: 122832
2011-01-04 21:10:05 +00:00
Jakob Stoklund Olesen 5e97781386 Add MachineLoopRanges analysis.
A MachineLoopRange contains the intervals of slot indexes covered by the blocks
in a loop. This representation of the loop blocks is more efficient to compare
against interfering registers during register coalescing.

llvm-svn: 121917
2010-12-15 23:41:23 +00:00
Jakob Stoklund Olesen 0c67e01e5f Add an AllocationOrder class that can iterate over the allocatable physical
registers for a given virtual register.

Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.

For target dependent hints, a number of arcane target hooks are invoked.

llvm-svn: 121497
2010-12-10 18:36:02 +00:00
Andrew Trick 00067fb147 Generalize PostRAHazardRecognizer so it can be used in any pass for
both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.

llvm-svn: 121274
2010-12-08 20:04:29 +00:00
Jakob Stoklund Olesen b8812a1c15 Stub out RegAllocGreedy.
This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.

RegAllocGreedy will eventually replace linear scan.

llvm-svn: 121234
2010-12-08 03:26:16 +00:00
Cameron Zwarich da592a9e41 Move the FindCopyInsertPoint method of PHIElimination to a new standalone
function so that it can be shared with StrongPHIElimination.

llvm-svn: 120951
2010-12-05 19:51:05 +00:00
Jakob Stoklund Olesen d4900a644c Stub out a new LiveDebugVariables pass.
This analysis is going to run immediately after LiveIntervals. It will stay
alive during register allocation and keep track of user variables mentioned in
DBG_VALUE instructions.

When the register allocator is moving values between registers and the stack, it
is very hard to keep track of DBG_VALUE instructions. We usually get it wrong.
This analysis maintains a data structure that makes it easy to update DBG_VALUE
instructions.

llvm-svn: 120385
2010-11-30 02:17:10 +00:00
Dan Gohman c2b786163c Rename ExpandPseudos to ExpandISelPseudos to help clarify its role.
llvm-svn: 119716
2010-11-18 18:45:06 +00:00
Evan Cheng 3e2ec64367 Add ExpandPseudos.cpp.
llvm-svn: 119385
2010-11-16 21:20:36 +00:00
Andrew Trick 1c24605a57 This is a prototype of an experimental register allocation
framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting. 

A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.

llvm-svn: 117174
2010-10-22 23:09:15 +00:00
Jakob Stoklund Olesen 72911e49fa Create a new LiveRangeEdit class to keep track of the new registers created when
splitting or spillling, and to help with rematerialization.

Use LiveRangeEdit in InlineSpiller and SplitKit. This will eventually make it
possible to share remat code between InlineSpiller and SplitKit.

llvm-svn: 116543
2010-10-14 23:49:52 +00:00
Owen Anderson 80fc0762f3 Add initialization routines for CodeGen.
llvm-svn: 115949
2010-10-07 18:41:20 +00:00
Oscar Fuentes b4b12535e8 Removed a bunch of unnecessary target_link_libraries.
llvm-svn: 114999
2010-09-28 22:39:14 +00:00
Michael J. Spencer 93c9b2ea93 Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."
This reverts commit r113632

Conflicts:

	cmake/modules/AddLLVM.cmake

llvm-svn: 113819
2010-09-13 23:59:48 +00:00
Michael J. Spencer dc38d36ccb CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally.
llvm-svn: 113632
2010-09-10 21:14:25 +00:00
Ted Kremenek da2eba58ed Update CMake build.
llvm-svn: 111063
2010-08-14 01:55:09 +00:00
Jim Grosbach a030fa5297 Add a local stack object block allocation pass. This is still an
experimental pass that allocates locals relative to one another before
register allocation and then assigns them to actual stack slots as a block
later in PEI. This will eventually allow targets with limited index offset
range to allocate additional base registers (not just FP and SP) to
more efficiently reference locals, as well as handle situations where
locals cannot be referenced via SP or FP at all (dynamic stack realignment
together with variable sized objects, for example). It's currently
incomplete and almost certainly buggy. Work in progress.

Disabled by default and gated via the -enable-local-stack-alloc command
line option.

rdar://8277890

llvm-svn: 111059
2010-08-14 00:15:52 +00:00
Bill Wendling 884514066e Update CMake...sorry for the breakage.
llvm-svn: 110654
2010-08-10 05:16:06 +00:00
Ted Kremenek 26177d2c24 Update CMake build.
llvm-svn: 110429
2010-08-06 04:05:21 +00:00
Jakob Stoklund Olesen 36d12c679d Beginning SplitKit - utility classes for live range splitting.
This is a work in progress. So far we have some basic loop analysis to help
determine where it is useful to split a live range around a loop.

The actual loop splitting code from Splitter.cpp is also going to move in here.

llvm-svn: 108842
2010-07-20 15:41:07 +00:00
Benjamin Kramer 58c283ee85 Update CMake build.
llvm-svn: 108700
2010-07-19 15:37:03 +00:00
Zhongxing Xu b653ce648d update CMakeLists.txt
llvm-svn: 108620
2010-07-17 12:12:42 +00:00
Dan Gohman 498e5f899d Move CallingConvLower.cpp out of the SelectionDAG directory.
llvm-svn: 107781
2010-07-07 15:15:27 +00:00
Jakob Stoklund Olesen f888911932 Begin implementation of an inline spiller.
InlineSpiller inserts loads and spills immediately instead of deferring to
VirtRegMap. This is possible now because SlotIndexes allows instructions to be
inserted and renumbered.

This is work in progress, and is mostly a copy of TrivialSpiller so far. It
works very well for functions that don't require spilling.

llvm-svn: 107227
2010-06-29 23:58:39 +00:00
Jakob Stoklund Olesen ec2e964fd6 Remove the local register allocator.
Please use the fast allocator instead.

llvm-svn: 106051
2010-06-15 21:58:33 +00:00
Ted Kremenek d52caa5244 Update CMake build.
llvm-svn: 105987
2010-06-15 04:08:14 +00:00
Jakob Stoklund Olesen 8a070a540d Add fast register allocator, enabled with -regalloc=fast.
So far this is just a clone of -regalloc=local that has been lobotomized to run
25% faster. It drops the least-recently-used calculations, and is just plain
stupid when it runs out of registers.

The plan is to make this go even faster for -O0 by taking advantage of the short
live intervals in unoptimized code. It should not be necessary to calculate
liveness when most virtual registers are killed 2-3 instructions after they are
born.

llvm-svn: 102006
2010-04-21 18:02:42 +00:00
Dan Gohman cc5e6528a5 Update CMakeLists.txt.
llvm-svn: 101976
2010-04-21 01:32:29 +00:00
David Greene 9b063df40b Ok, third time's the charm. No changes from last time except the CMake
source addition.  Apparently the buildbots were wrong about failures.

---

Add some switches helpful for debugging:

-print-before=<Pass Name>

Dump IR before running pass <Pass Name>.

-print-before-all

Dump IR before running each pass.

-print-after-all

Dump IR after running each pass.

These are helpful when tracking down a miscompilation.  It is easy to
get IR dumps and do diffs on them, etc.

To make this work well, add a new getPrinterPass API to Pass so that
each kind of pass (ModulePass, FunctionPass, etc.) can create a Pass
suitable for dumping out the kind of object the Pass works on.

llvm-svn: 100249
2010-04-02 23:17:14 +00:00
Chris Lattner db903612ee remove empty file.
llvm-svn: 100222
2010-04-02 20:26:36 +00:00
Benjamin Kramer 71bd071e2f Update CMake.
llvm-svn: 100206
2010-04-02 19:09:51 +00:00
Eric Christopher 1dd31c7814 Add file to CMakeLists.txt
llvm-svn: 97545
2010-03-02 02:49:43 +00:00
Anton Korobeynikov 1be2063afd Add missed entry to cmake build list file
llvm-svn: 96292
2010-02-15 22:55:13 +00:00
Bob Wilson 0827e040e0 Add a new pass on machine instructions to optimize away PHI cycles that
reduce down to a single value.  InstCombine already does this transformation
but DAG legalization may introduce new opportunities.  This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized.  I measured the compile time 
impact of this (running llc on 176.gcc) and it was not significant.

llvm-svn: 95951
2010-02-12 01:30:21 +00:00