Commit Graph

275048 Commits

Author SHA1 Message Date
Krasimir Georgiev 7f64fa8022 [clang-format] Handle CRLF correctly when formatting escaped newlines
Subscribers: klimek

Differential Revision: https://reviews.llvm.org/D39420

Contributed by @peterbudai!

llvm-svn: 316910
2017-10-30 14:41:34 +00:00
Yaxun Liu 561ac06ff2 CodeGen: Fix insertion position of addrspace cast for alloca
For non-zero alloca addr space, alloca is usually casted to default addr
space immediately.

For non-vla, alloca is inserted at AllocaInsertPt, therefore the addr
space cast should also be insterted at AllocaInsertPt. However,
for vla, alloca is inserted at the current insertion point of IRBuilder,
therefore the addr space cast should also inserted at the current
insertion point of IRBuilder.

Currently clang always insert addr space cast at AllocaInsertPt, which
causes invalid IR.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D39374

llvm-svn: 316909
2017-10-30 14:38:30 +00:00
Sanjay Patel 85b60ff68c [PassManager, SimplifyCFG] add test for PR34603 / D38566; NFC
Sinking common insts and converting to select early can inhibit better folds in other passes.

llvm-svn: 316908
2017-10-30 14:34:30 +00:00
Yaxun Liu c928f2a6d4 [AMDGPU] Emit metadata for hidden arguments for kernel enqueue
Identifies kernels which performs device side kernel enqueues and emit
metadata for the associated hidden kernel arguments. Such kernels are
marked with calls-enqueue-kernel function attribute by
AMDGPUOpenCLEnqueueKernelLowering pass and later on
hidden kernel arguments metadata HiddenDefaultQueue and
HiddenCompletionAction are emitted for them.

Differential Revision: https://reviews.llvm.org/D39255

llvm-svn: 316907
2017-10-30 14:30:28 +00:00
Krasimir Georgiev e56e9a4fef Keep MSVC2015 happy after r316903
llvm-svn: 316906
2017-10-30 14:30:14 +00:00
Clement Courbet b2c3eb8cf1 [CodeGen][ExpandMemcmp] Allow memcmp to expand to vector loads (2).
- Targets that want to support memcmp expansions now return the list of
   supported load sizes.
 - Expansion codegen does not assume that all power-of-two load sizes
   smaller than the max load size are valid. For examples, this is not the
   case for x86(32bit)+sse2.

Fixes PR34887.

llvm-svn: 316905
2017-10-30 14:19:33 +00:00
Krzysztof Parzyszek bef1c56724 [Hexagon] Allow the RDF optimizations to be run in .mir testcases
llvm-svn: 316904
2017-10-30 14:11:52 +00:00
Krasimir Georgiev 9ad83fe7f6 [clang-format] Format raw string literals
Summary:
This patch adds raw string literal formatting.

Reviewers: djasper, klimek

Reviewed By: klimek

Subscribers: klimek, mgorny

Differential Revision: https://reviews.llvm.org/D35943

llvm-svn: 316903
2017-10-30 14:01:50 +00:00
Javed Absar 5cde1ccb29 [GlobalISel|ARM] : Allow legalizing G_FSUB
Adding support for VSUB.
Reviewed by: @rovka
Differential Revision: https://reviews.llvm.org/D39261

llvm-svn: 316902
2017-10-30 13:51:56 +00:00
Gabor Horvath 404fcd3069 [analyzer] Use the signature of the primary template for issue hash calculation
Now when a template is instantiated more times and there is a bug found in the
instantiations the issue hash will be different for each instantiation even if
every other property of the bug (path, message, location) is the same.

This patch aims to resolve this issue. Note that explicit specializations still
generate different hashes but that is intended.

Differential Revision: https://reviews.llvm.org/D38728

llvm-svn: 316900
2017-10-30 12:16:07 +00:00
Gabor Horvath 3bd24f9440 [analyzer] Make issue hash related tests more concise
Extend ExprInspection checker to make it possible to dump the issue hash of
arbitrary expressions. This change makes it possible to make issue hash related
tests more concise and also makes debugging issue hash related problems easier.

Differential Revision: https://reviews.llvm.org/D38844

llvm-svn: 316899
2017-10-30 12:02:23 +00:00
Andrew V. Tischenko f94da596a7 Invalid used of 'w' suffix on push and pop using 64-bit register.
Differential Revision: https://reviews.llvm.org/D38626

llvm-svn: 316898
2017-10-30 12:02:06 +00:00
Diana Picus 6e41e6ac6c [ARM GlobalISel] Fixup r316572. NFC
Just missed a few spots...

llvm-svn: 316897
2017-10-30 11:58:09 +00:00
Ivan A. Kosarev 9f9d157517 [CodeGen] Generate TBAA info for reference loads
Differential Revision: https://reviews.llvm.org/D39177

llvm-svn: 316896
2017-10-30 11:49:31 +00:00
Haojian Wu f5142bf97f [refactor] Fix a clang-tidy warning.
NFC

llvm-svn: 316895
2017-10-30 11:17:09 +00:00
Jina Nahias e63db55c67 Revert "[X86][AVX512] Adding a pattern for broadcastm intrinsic."
This reverts commit r316890.

Change-Id: I683cceee9848ef309b452293086b1f26a941950d
llvm-svn: 316894
2017-10-30 10:35:53 +00:00
George Rimar a6b1fbece1 [ELF] - Stop sorting input sections in createSections().
It does not seem that createSections() is a good place for
applying sorting. Patch changes code to do that inside
sortSections(), which looks more appropriate place.

Differential revision: https://reviews.llvm.org/D39371

llvm-svn: 316893
2017-10-30 10:12:49 +00:00
Gabor Horvath 9a8c8bf60d [analyzer] lock_guard and unique_lock extension for BlockInCriticalSection checker
A patch by zdtorok (Zoltán Dániel Török)!

Differential Revision: https://reviews.llvm.org/D33729

llvm-svn: 316892
2017-10-30 10:09:55 +00:00
Florian Hahn d0208b4b1c Recommit r315288: [SCCP] Propagate integer range info for parameters in IPSCCP.
This version of the patch includes a fix addressing a stage2 LTO buildbot
failure and addressed some additional nits.

Original commit message:
This updates the SCCP solver to use of the ValueElement lattice for
parameters, which provides integer range information. The range
information is used to remove unneeded icmp instructions.

For the following function, f() can be optimized to ret i32 2 with
this change

    source_filename = "sccp.c"
    target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
    target triple = "x86_64-unknown-linux-gnu"

    ; Function Attrs: norecurse nounwind readnone uwtable
    define i32 @main() local_unnamed_addr #0 {
    entry:
      %call = tail call fastcc i32 @f(i32 1)
      %call1 = tail call fastcc i32 @f(i32 47)
      %add3 = add nsw i32 %call, %call1
      ret i32 %add3
    }

    ; Function Attrs: noinline norecurse nounwind readnone uwtable
    define internal fastcc i32 @f(i32 %x) unnamed_addr #1 {
    entry:
      %c1 = icmp sle i32 %x, 100

      %cmp = icmp sgt i32 %x, 300
      %. = select i1 %cmp, i32 1, i32 2
      ret i32 %.
    }

    attributes #1 = { noinline }

Reviewers: davide, sanjoy, efriedma, dberlin

Reviewed By: davide, dberlin

Subscribers: mcrosier, gberry, mssimpso, dberlin, llvm-commits

Differential Revision: https://reviews.llvm.org/D36656

llvm-svn: 316891
2017-10-30 10:07:42 +00:00
Jina Nahias 70280f9a0d [X86][AVX512] Adding a pattern for broadcastm intrinsic.
Differential Revision: https://reviews.llvm.org/D38312

Change-Id: I6551fb13879e098aed74de410e29815cf37d9ab5
llvm-svn: 316890
2017-10-30 09:59:52 +00:00
Max Kazantsev 390fc57771 [IRCE][NFC] Store Length as SCEV in RangeCheck instead of Value
llvm-svn: 316889
2017-10-30 09:35:16 +00:00
Florian Hahn d18443edad Revert r316887 to fix buildbot failures.
llvm-svn: 316888
2017-10-30 09:21:50 +00:00
Florian Hahn 925d3e4a98 Recommit r315288: [SCCP] Propagate integer range info for parameters in IPSCCP.
This version of the patch includes a fix addressing a stage2 LTO buildbot
failure and addressed some additional nits.

Original commit message:
This updates the SCCP solver to use of the ValueElement lattice for
parameters, which provides integer range information. The range
information is used to remove unneeded icmp instructions.

For the following function, f() can be optimized to ret i32 2 with
this change

    source_filename = "sccp.c"
    target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
    target triple = "x86_64-unknown-linux-gnu"

    ; Function Attrs: norecurse nounwind readnone uwtable
    define i32 @main() local_unnamed_addr #0 {
    entry:
      %call = tail call fastcc i32 @f(i32 1)
      %call1 = tail call fastcc i32 @f(i32 47)
      %add3 = add nsw i32 %call, %call1
      ret i32 %add3
    }

    ; Function Attrs: noinline norecurse nounwind readnone uwtable
    define internal fastcc i32 @f(i32 %x) unnamed_addr #1 {
    entry:
      %c1 = icmp sle i32 %x, 100

      %cmp = icmp sgt i32 %x, 300
      %. = select i1 %cmp, i32 1, i32 2
      ret i32 %.
    }

    attributes #1 = { noinline }

Reviewers: davide, sanjoy, efriedma, dberlin

Reviewed By: davide, dberlin

Subscribers: mcrosier, gberry, mssimpso, dberlin, llvm-commits

Differential Revision: https://reviews.llvm.org/D36656

llvm-svn: 316887
2017-10-30 09:04:18 +00:00
Gabor Horvath bde3be43d7 Add missing expected-no-diagnostics comment to test.
llvm-svn: 316886
2017-10-30 09:01:48 +00:00
Gabor Horvath bb81bfb69c [analyzer] Handle ObjC messages conservatively in CallDescription
Differential Revision: https://reviews.llvm.org/D37470

llvm-svn: 316885
2017-10-30 08:47:13 +00:00
Max Kazantsev 1d7c0439b9 [GVN][NFC] Mark instruction for deletion instead of immediate erasing in LoadPRE
It is done to uniformly handle instructions removal.

Differential Revision: https://reviews.llvm.org/D39369

llvm-svn: 316884
2017-10-30 04:48:34 +00:00
Craig Topper 85bcc297c3 [X86] Rearrange code in X86InstrInfo.cpp to put all the foldMemoryOperandImpl methods together without partial/undef register handling in the middle. NFC
I have a future patch that wants to make use of the one of the partial functions in one of the earlier memory folding methods and the current ordering prevents that.

llvm-svn: 316883
2017-10-30 04:39:18 +00:00
Craig Topper c848355335 [X86] Simplify code by removing an unnecessary temporary variable. NFC
llvm-svn: 316882
2017-10-30 03:35:44 +00:00
Craig Topper 730414b0ca [X86] Move some EVEX->VEX code to a helper function to prepare for a future patch. NFC
llvm-svn: 316881
2017-10-30 03:35:43 +00:00
Rui Ueyama 27f95a9ac3 Remove unnecessary code.
Discarded section's Repl always points to itself, so returning
Sec is not different from returning Sec->Repl.

llvm-svn: 316880
2017-10-29 23:41:16 +00:00
Rui Ueyama ea1398eeb3 Move "Assigned" bit from SectionBase to InputSectionBase.
This bit is to manage whether an input section has already been assigned
to some output section by linker scripts or not. So it logically belongs
to InputSectionBase. SectionBase is a common base class for input and
output sections, so that wasn't the right place to define the bit.

llvm-svn: 316879
2017-10-29 23:32:23 +00:00
Rui Ueyama 63edd9f831 Remove an obscure comment.
llvm-svn: 316878
2017-10-29 22:38:00 +00:00
Peter Collingbourne e662436114 ELF: Correctly set edata if there are no .bss sections.
edata needs to be set to the end of the last mapped initialized
section. We were previously mishandling the case where there were no
non-mapped sections by setting it to the end of the last section in
the output file.

Differential Revision: https://reviews.llvm.org/D39399

llvm-svn: 316877
2017-10-29 22:31:48 +00:00
Rui Ueyama da4d26dfa3 Initialize members not by assignment but by the member initializer list.
llvm-svn: 316876
2017-10-29 22:26:52 +00:00
Simon Pilgrim 601ae238b7 [SelectionDAG] Add SEXT/AND/XOR/Or demanded elts support to ComputeNumSignBits
llvm-svn: 316875
2017-10-29 22:03:37 +00:00
Marshall Clow ccbb496b56 Initial triage
llvm-svn: 316874
2017-10-29 21:57:58 +00:00
Marshall Clow 4a9ee9caaa Update status of 2950
llvm-svn: 316873
2017-10-29 21:43:30 +00:00
Philip Pfaffe 53c803871e [Acc] Do not statically dispatch into IslNodeBuilder's createFor
Summary:
When GPUNodeBuilder creates loops inside the kernel, it dispatches to
IslNodeBuilder. This however is surprisingly dangerous, since it accesses the
AST Node's user through the wrong type. This patch fixes this problem by
overriding createFor correctly.

This fixes PR35010.

Reviewers: grosser, bollu, Meinersbur

Reviewed By: Meinersbur

Subscribers: Meinersbur, nemanjai, pollydev, llvm-commits, kbarton

Differential Revision: https://reviews.llvm.org/D39364

llvm-svn: 316872
2017-10-29 21:36:34 +00:00
Simon Pilgrim aa65159b0a [X86][SSE] Split ComputeNumSignBits SEXT/AND/XOR/OR demandedelts test
Max depth was being exceeded which could prevent some combines working

llvm-svn: 316871
2017-10-29 21:35:28 +00:00
Philip Pfaffe 9b1d1e6ae7 Fix two testcases. NFC intended.
Add missing %loadPolly directive to support out of tree builds. One of
the changes is somewhat bigger, because the directive turns on LLVM
names, and the testcase deosn't use those.

llvm-svn: 316870
2017-10-29 21:00:48 +00:00
Sanjay Patel adf38911d8 [(new) Pass Manager] instantiate SimplifyCFG with the same options as the old PM
The old PM sets the options of what used to be known as "latesimplifycfg" on the 
instantiation after the vectorizers have run, so that's what we'redoing here.

FWIW, there's a later SimplifyCFGPass instantiation in both PMs where we do not 
set the "late" options. I'm not sure if that's intentional or not.

Differential Revision: https://reviews.llvm.org/D39407

llvm-svn: 316869
2017-10-29 20:49:31 +00:00
Simon Pilgrim 61921f779f [X86][SSE] ComputeNumSignBits tests showing missing SEXT/AND/XOR/OR demandedelts support
llvm-svn: 316868
2017-10-29 20:49:27 +00:00
Marshall Clow 4e18fe9ac8 Issues to be voted on in ABQ
llvm-svn: 316867
2017-10-29 19:02:00 +00:00
Simon Pilgrim 7613a7b564 [SelectionDAG] Add SRA/SHL demanded elts support to ComputeNumSignBits
Introduce a isConstOrDemandedConstSplat helper function that can recognise a constant splat build vector for at least the demanded elts we care about.

llvm-svn: 316866
2017-10-29 18:19:37 +00:00
Simon Pilgrim b56fb4a2bb [X86][SSE] ComputeNumSignBits tests showing missing SHL/SRA demandedelts support
llvm-svn: 316865
2017-10-29 18:01:31 +00:00
Craig Topper 41d363fea1 [X86] Add a slow-incdec command line to atomic-eflags-reuse.ll
I believe the test_sub_1_cmp_1_setcc_ugt test case is being miscompiled in the fast inc/dec case.

llvm-svn: 316864
2017-10-29 17:15:09 +00:00
Rui Ueyama b6f4e722b1 Fix ubsan error that shift amount 64 is too large.
llvm-svn: 316863
2017-10-29 16:49:42 +00:00
Rui Ueyama ac6472535b Remove a redundant temporary variable.
llvm-svn: 316862
2017-10-29 16:46:39 +00:00
Craig Topper 495a1bc893 [X86] Remove combine that turns X86ISD::LSUB into X86ISD::LADD. Update patterns that depended on this.
If the carry flag is being used, this transformation isn't safe.

This does prevent some test cases from using DEC now, but I'll try to look into that separately.

Fixes PR35068.

llvm-svn: 316860
2017-10-29 06:51:04 +00:00
Craig Topper 7a60e29185 [X86] Fix typo in comment. NFC
llvm-svn: 316859
2017-10-29 06:51:02 +00:00