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139 Commits

Author SHA1 Message Date
Hal Finkel b5aa7e54d9 Generate PPC early conditional returns 
PowerPC has a conditional branch to the link register (return) instruction: BCLR.
This should be used any time when we'd otherwise have a conditional branch to a
return. This adds a small pass, PPCEarlyReturn, which runs just prior to the
branch selection pass (and, importantly, after block placement) to generate
these conditional returns when possible. It will also eliminate unconditional
branches to returns (these happen rarely; most of the time these have already
been tail duplicated by the time PPCEarlyReturn is invoked). This is a nice
optimization for small functions that do not maintain a stack frame.

llvm-svn: 179026
 2013-04-08 16:24:03 +00:00
Hal Finkel 2ed21a8ca6 Remove some obsolete PowerPC/README entries 
llvm-svn: 178657
 2013-04-03 14:25:55 +00:00
Hal Finkel f1af79ab45 Remove "gpr0 allocation" from the PPC README TODO list 
As Chris pointed out, post r178123, this is now done!

llvm-svn: 178165
 2013-03-27 18:39:52 +00:00
Hal Finkel 41e6fd1df9 Remove the TODO statement in the PPC README re: CTR loops 
As Chris points out, this can now be removed!

TODO: check if the associated section on viterbi's inner loop can also be removed.
llvm-svn: 158224
 2012-06-08 20:02:09 +00:00
Wesley Peck 527da1b6e2 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. 
llvm-svn: 119990
 2010-11-23 03:31:01 +00:00
Chris Lattner 2e040ebe19 add a readme. 
llvm-svn: 114303
 2010-09-19 00:34:58 +00:00
Dan Gohman 6f34abd092 Floating-point add, sub, and mul are now spelled fadd, fsub, and fmul, 
respectively.

llvm-svn: 97531
 2010-03-02 01:11:08 +00:00
Dale Johannesen 626b79d6a6 Add the problem I just hacked around in 96015/96020. 
The solution there produces correct code, but is seriously
deficient in several ways.

llvm-svn: 96039
 2010-02-12 23:16:24 +00:00
Chris Lattner e0359b4fe7 move PR5945 here. 
llvm-svn: 94350
 2010-01-24 02:27:03 +00:00
Chris Lattner 1b35bbe813 change the canonical form of "cond ? -1 : 0" to be 
"sext cond" instead of a select.  This simplifies some instcombine
code, matches the policy for zext (cond ? 1 : 0 -> zext), and allows
us to generate better code for a testcase on ppc.

llvm-svn: 94339
 2010-01-24 00:09:49 +00:00
Chris Lattner 97331ae668 add a note 
llvm-svn: 94317
 2010-01-23 18:42:37 +00:00
Chris Lattner 9e4e45a3b6 constant materialization could be improved. 
llvm-svn: 92921
 2010-01-07 17:53:10 +00:00
Dan Gohman 17151155ed Remove the IA-64 backend. 
llvm-svn: 76920
 2009-07-24 00:30:09 +00:00
Chris Lattner 4ec83ea628 clarify: stub emission depends on the version of the linker you use, it has nothing 
to do with the target.  Also, the stub elimination optimization *requires* making the
stub explicit.

llvm-svn: 74682
 2009-07-02 01:24:34 +00:00
Dale Johannesen 4e6044c405 Add darwin stub removal to wishlist. 
llvm-svn: 74667
 2009-07-01 23:36:02 +00:00
Dale Johannesen aae3a4f864 Move some former testcases (low-probability codegen 
optimizations) into this wishlist.

llvm-svn: 59455
 2008-11-17 18:56:34 +00:00
Nate Begeman f69d13b60a Implement ISD::TRAP support on PPC 
llvm-svn: 54644
 2008-08-11 17:36:31 +00:00
Chris Lattner 6b0a189225 add a note 
llvm-svn: 47830
 2008-03-02 19:27:34 +00:00
Chris Lattner bd0bb3f07f Evan implemented this. 
llvm-svn: 47827
 2008-03-02 17:56:29 +00:00
Nate Begeman 3090b0fbd1 additional missing feature 
llvm-svn: 46948
 2008-02-11 04:16:09 +00:00
Chris Lattner 8e07533f20 If someone wants to implement ppc TRAP, they can go for it :) 
llvm-svn: 46019
 2008-01-15 22:15:02 +00:00
Chris Lattner 89f36e6b21 Finally implement correct ordered comparisons for PPC, even though 
the code generated is not wonderful.  This turns a miscompilation into
a code quality bug (noted in the ppc readme).  This fixes PR642, which
is over 2 years old (!).  Nate, please review this.

llvm-svn: 45742
 2008-01-08 06:46:30 +00:00
Chris Lattner f6a8156e4f implement __builtin_return_addr(0) on ppc. 
llvm-svn: 44700
 2007-12-08 06:59:59 +00:00
Chris Lattner 6777b72659 Add some notes about better flag handling. 
llvm-svn: 41808
 2007-09-10 21:43:18 +00:00
Chris Lattner 92c6a65d4e new example 
llvm-svn: 41318
 2007-08-23 15:16:03 +00:00
Chris Lattner 075b4db621 add a note 
llvm-svn: 35530
 2007-03-31 07:06:25 +00:00
Chris Lattner 26ad3e7191 add a note 
llvm-svn: 35334
 2007-03-25 05:10:46 +00:00
Chris Lattner 9c9e2f1af2 add a note 
llvm-svn: 35330
 2007-03-25 04:46:28 +00:00
Chris Lattner c9088b4c8e add a note 
llvm-svn: 34101
 2007-02-09 17:38:01 +00:00
Nate Begeman ba52b94fa2 Remove fixed item 
llvm-svn: 34081
 2007-02-09 04:19:54 +00:00
Chris Lattner 37ebf9317b A relatively simple PPC optimization. 
llvm-svn: 33709
 2007-01-31 19:49:20 +00:00
Nate Begeman 17f250005a Update some of the llvm in the readme 
llvm-svn: 33630
 2007-01-29 21:21:22 +00:00
Chris Lattner 889d934d00 move contents of PR587 to here. 
llvm-svn: 33333
 2007-01-18 07:34:57 +00:00
Chris Lattner 542dfd5510 Rewrite the branch selector to be correct in the face of large functions. 
The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model.  This fixes assembler errors when compiling 403.gcc with
tail merging enabled.

Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion.  Only if branches need expansion are instructions rewritten
and created.  This should make branch select faster, and eliminates the
Bxx instructions from the .td file.

llvm-svn: 31837
 2006-11-18 00:32:03 +00:00
Chris Lattner cd436327f1 add note about ugly codegen with preinc 
llvm-svn: 31617
 2006-11-10 01:33:53 +00:00
Chris Lattner be7033b346 add a note from viterbi 
llvm-svn: 31506
 2006-11-07 18:30:21 +00:00
Chris Lattner 28174f5a3a this doesn't occur any more in mason 
llvm-svn: 31236
 2006-10-27 22:02:19 +00:00
Chris Lattner 4c0cc53da1 the code in question is now: 
cmpw cr0, r7, r3
        ble cr0, LBB1_5 ;bb25
LBB1_8: ;bb17
        cmpw cr0, r8, r5
        bgt cr0, LBB1_2 ;bb

which is just as good as crnand.

llvm-svn: 31235
 2006-10-27 22:00:55 +00:00
Chris Lattner be131662c3 add note 
llvm-svn: 30937
 2006-10-13 20:20:58 +00:00
Nate Begeman d31efd190f Fold AND and ROTL more often 
llvm-svn: 30577
 2006-09-22 05:01:56 +00:00
Chris Lattner fba9e8f422 item done 
llvm-svn: 30518
 2006-09-20 06:41:56 +00:00
Chris Lattner f62f090ea1 This is already done 
llvm-svn: 30512
 2006-09-20 04:59:33 +00:00
Chris Lattner aa3926b7ea Two improvements: 
1. Codegen this comparison:
     if (X == 0x8000)

as:

        cmplwi cr0, r3, 32768
        bne cr0, LBB1_2 ;cond_next

instead of:

        lis r2, 0
        ori r2, r2, 32768
        cmpw cr0, r3, r2
        bne cr0, LBB1_2 ;cond_next


2. Codegen this comparison:
      if (X == 0x12345678)

as:

        xoris r2, r3, 4660
        cmplwi cr0, r2, 22136
        bne cr0, LBB1_2 ;cond_next

instead of:

        lis r2, 4660
        ori r2, r2, 22136
        cmpw cr0, r3, r2
        bne cr0, LBB1_2 ;cond_next

llvm-svn: 30509
 2006-09-20 04:25:47 +00:00
Chris Lattner ab33d350a7 Add a note that we should match rlwnm better 
llvm-svn: 30508
 2006-09-20 03:59:25 +00:00
Chris Lattner 2aa98e0363 add a note 
llvm-svn: 30377
 2006-09-14 20:56:30 +00:00
Chris Lattner 950dffaed6 Add a note 
llvm-svn: 29139
 2006-07-14 04:07:29 +00:00
Chris Lattner a7976d329e Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps 
into i16/i32 load/stores.

llvm-svn: 29089
 2006-07-10 20:56:58 +00:00
Chris Lattner 6353807fdc Add a note about a note 
llvm-svn: 28355
 2006-05-17 19:02:25 +00:00
Nate Begeman ce6646c366 Yet more readme updating 
llvm-svn: 28172
 2006-05-08 20:54:02 +00:00
Nate Begeman 68a45419cc New note about something bad happening in target independent optimizers 
llvm-svn: 28170
 2006-05-08 20:08:28 +00:00