Commit Graph

83933 Commits

Author SHA1 Message Date
Akira Hatanaka 2c64adf672 Add Mips16InstrInfo.cpp and MipsSEInstrInfo.cpp to CMakeLists.txt.
llvm-svn: 161083
2012-07-31 22:11:05 +00:00
Michael J. Spencer 1e18841f62 [obj2yaml] Print the Relocations header.
llvm-svn: 161082
2012-07-31 22:04:08 +00:00
Akira Hatanaka b7fa3c9db0 Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16),
and MipsSEInstrInfo (for mips32/64).

llvm-svn: 161081
2012-07-31 21:49:49 +00:00
Akira Hatanaka 30651805c4 Delete mips64 target machine classes. mips target machines can be used in place
of them.

llvm-svn: 161080
2012-07-31 21:39:17 +00:00
Akira Hatanaka 02de0e4425 Let PEI::calculateFrameObjectOffsets compute the final stack size rather than
computing it in MipsFrameLowering::emitPrologue.

llvm-svn: 161078
2012-07-31 21:28:49 +00:00
Akira Hatanaka 33a25af5a8 Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.
The frame object which points to the dynamically allocated area will not be
needed after changes are made to cease reserving call frames.

llvm-svn: 161076
2012-07-31 20:54:48 +00:00
Manman Ren f288d2f120 MachineSink: Sort the successors before trying to find SuccToSinkTo.
Use stable_sort instead of sort. Follow-up to r161062.

rdar://11980766

llvm-svn: 161075
2012-07-31 20:45:38 +00:00
Jakob Stoklund Olesen 059e647c6d Compute instruction depths through the current trace.
Assuming infinite issue width, compute the earliest each instruction in
the trace can issue, when considering the latency of data dependencies.
The issue cycle is record as a 'depth' from the beginning of the trace.

This is half the computation required to find the length of the critical
path through the trace. Heights are next.

llvm-svn: 161074
2012-07-31 20:44:38 +00:00
Jakob Stoklund Olesen 1dfb101835 Rename CT -> MTM. MachineTraceMetrics is abbreviated MTM.
llvm-svn: 161072
2012-07-31 20:25:13 +00:00
Akira Hatanaka a66d676b20 Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whether
or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and
PseudoSE (mips32/64 pseudo) classes.

llvm-svn: 161071
2012-07-31 19:13:07 +00:00
Akira Hatanaka 3a810eda91 Change name of class MipsInst to InstSE to distinguish it from mips16's
instruction class. SE stands for standard encoding.

llvm-svn: 161069
2012-07-31 18:55:01 +00:00
Akira Hatanaka beda2241a4 When store nodes or memcpy nodes are created to copy the function call
arguments to the stack in MipsISelLowering::LowerCall, use stack pointer and
integer offset operands rather than frame object operands.

llvm-svn: 161068
2012-07-31 18:46:41 +00:00
Chad Rosier 710be7df71 [x86 frame lowering] In 32-bit mode, use ESI as the base pointer.
Previously, we were using EBX, but PIC requires the GOT to be in EBX before 
function calls via PLT GOT pointer.

llvm-svn: 161066
2012-07-31 18:29:21 +00:00
Ted Kremenek cf8cfd7fc2 Use regex instead of special casing clang and llvm libraries.
llvm-svn: 161065
2012-07-31 18:23:44 +00:00
Akira Hatanaka 4ce7c4060d Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as
single-precision load and store.

Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect
to map unaligned floating point load/store nodes to these instructions.

llvm-svn: 161063
2012-07-31 18:16:49 +00:00
Manman Ren 8c549b586c MachineSink: Sort the successors before trying to find SuccToSinkTo.
One motivating example is to sink an instruction from a basic block which has
two successors: one outside the loop, the other inside the loop. We should try
to sink the instruction outside the loop.

rdar://11980766

llvm-svn: 161062
2012-07-31 18:10:39 +00:00
Micah Villmow b67d7a3a33 Conform to LLVM coding style.
llvm-svn: 161061
2012-07-31 18:07:43 +00:00
Micah Villmow 6b12f596ef Don't generate ordered or unordered comparison operations if it is not legal to do so.
llvm-svn: 161053
2012-07-31 16:48:03 +00:00
Chandler Carruth 94ed210702 Implement copy and move assignment for TinyPtrVector. These try to
re-use allocated vectors as much as possible.

llvm-svn: 161041
2012-07-31 09:42:24 +00:00
Sylvestre Ledru ef7d8295b6 Fix some minor typos
llvm-svn: 161037
2012-07-31 07:05:57 +00:00
Craig Topper 9caea12bd8 Use uint8_t to store the InstructionContext table. Saves 768 bytes of static data.
llvm-svn: 161034
2012-07-31 06:15:39 +00:00
Craig Topper 6f142746e7 Tidy up. Move for loop index declarations into for statements. Use unsigned instead of uint16_t for loop indices. Use unsigned instead of uint32_t for arguments to raw_ostream.indent.
llvm-svn: 161033
2012-07-31 06:02:05 +00:00
Craig Topper b61024cfcc Tidy up function argument formatting.
llvm-svn: 161032
2012-07-31 05:42:02 +00:00
Craig Topper 347e8cf3b7 Remove trailing whitespace
llvm-svn: 161031
2012-07-31 05:28:41 +00:00
Craig Topper 0c4253fe29 Remove trailing whitespace
llvm-svn: 161030
2012-07-31 05:27:01 +00:00
Craig Topper c2efce404e Make INSTRUCTION_SPECIFIER_FIELDS match X86DisassemblerCommon.h. Also remove trailing whitespace.
llvm-svn: 161029
2012-07-31 05:18:26 +00:00
Craig Topper fb39f97d4c Tidy up trailing whitespace
llvm-svn: 161027
2012-07-31 04:58:05 +00:00
Craig Topper 5f33d90214 Tidy up trailing whitespace
llvm-svn: 161026
2012-07-31 04:38:27 +00:00
Chandler Carruth c0b8a0c216 Clean up trailing whitespace and unnecessary blank lines.
llvm-svn: 161025
2012-07-31 04:13:57 +00:00
Chandler Carruth a565375a18 Bring TinyPtrVector under test. Somehow we never picked up unit tests
for this class. These tests exercise most of the basic properties, but
the API for TinyPtrVector is very strange currently. My plan is to start
fleshing out the API to match that of SmallVector, but I wanted a test
for what is there first.

Sadly, it doesn't look reasonable to just re-use the SmallVector tests,
as this container can only ever store pointers, and much of the
SmallVector testing is to get construction and destruction right.

Just to get this basic test working, I had to add value_type to the
interface.

While here I found a subtle bug in the combination of 'erase', 'begin',
and 'end'. Both 'begin' and 'end' wanted to use a null pointer to
indicate the "end" iterator of an empty vector, regardless of whether
there is actually a vector allocated or the pointer union is null.
Everything else was fine with this except for erase. If you erase the
last element of a vector after it has held more than one element, we
return the end iterator of the underlying SmallVector which need not be
a null pointer. Instead, simply use the pointer, and poniter + size()
begin/end definitions in the tiny case, and delegate to the inner vector
whenever it is present.

llvm-svn: 161024
2012-07-31 02:48:31 +00:00
Jakob Stoklund Olesen 0c807dfae2 Clear kill flags in removeCopyByCommutingDef().
We are extending live ranges, so kill flags are not accurate. They
aren't needed until they are recomputed after RA anyway.

<rdar://problem/11950722>

llvm-svn: 161023
2012-07-31 02:47:24 +00:00
Manman Ren 2b6a0dfd4c Reverse order of the two branches at end of a basic block if it is profitable.
We branch to the successor with higher edge weight first.
Convert from
     je    LBB4_8  --> to outer loop
     jmp   LBB4_14 --> to inner loop
to
     jne   LBB4_14
     jmp   LBB4_8

PR12750
rdar: 11393714

llvm-svn: 161018
2012-07-31 01:11:07 +00:00
Andrew Trick 79795897b3 Use the latest MachineRegisterInfo APIs. No functionality.
llvm-svn: 161010
2012-07-30 23:48:17 +00:00
Andrew Trick 79df0de4fc Added MachineRegisterInfo::hasOneDef()
llvm-svn: 161009
2012-07-30 23:48:14 +00:00
Andrew Trick 535a23c38b Inline MachineRegisterInfo::hasOneUse
llvm-svn: 161007
2012-07-30 23:48:12 +00:00
Chandler Carruth e9cdc7f0d8 Extend the InstVisitor to visit the specialized classes wrapping
CallInst for intrinsics. This allows users of the InstVisitor that would
like to special case certain very common intrinsics to do so naturally
in keeping with the type hierarchy's utility classes.

llvm-svn: 161006
2012-07-30 23:45:06 +00:00
Jakob Stoklund Olesen 68c2cd059e Avoid looking at stale data in verifyAnalysis().
llvm-svn: 161004
2012-07-30 23:15:12 +00:00
Jakob Stoklund Olesen c14cf57ba9 Allow traces to enter nested loops.
This lets traces include the final iteration of a nested loop above the
center block, and the first iteration of a nested loop below the center
block.

We still don't allow traces to contain backedges, and traces are
truncated where they would leave a loop, as seen from the center block.

llvm-svn: 161003
2012-07-30 23:15:10 +00:00
Jim Grosbach 20666162e9 Keep empty assembly macro argument values in the middle of the list.
Empty macro arguments at the end of the list should be as-if not specified at
all, but those in the middle of the list need to be kept so as not to screw
up the positional numbering. E.g.:
.macro foo
foo_-bash___:
  nop
.endm

foo 1, 2, 3, 4
foo 1, , 3, 4

Should create two labels, "foo_1_2_3_4" and "foo_1__3_4".

rdar://11948769

llvm-svn: 161002
2012-07-30 22:44:17 +00:00
Chandler Carruth 0b01261cb0 Move the SmallVector unit tests to be type-parameterized so that we can
test more than a single instantiation of SmallVector.

Add testing for 0, 1, 2, and 4 element sized "small" buffers. These
appear to be essentially untested in the unit tests until now.

Fix several tests to be robust in the face of a '0' small buffer. As
a consequence of this size buffer, the growth patterns are actually
observable in the test -- yes this means that many tests never caused
a grow to occur before. For some tests I've merely added a reserve call
to normalize behavior. For others, the growth is actually interesting,
and so I captured the fact that growth would occur and adjusted the
assertions to not assume how rapidly growth occured.

Also update the specialization for a '0' small buffer length to have all
the same interface points as the normal small vector.

llvm-svn: 161001
2012-07-30 22:17:52 +00:00
Jakob Stoklund Olesen 984cfe8322 Clarify invalidation strategy in comment.
llvm-svn: 160997
2012-07-30 21:16:22 +00:00
Nick Lewycky 7e9f6d7d58 Fix grammar-o. Fixes PR13482!
llvm-svn: 160996
2012-07-30 21:10:51 +00:00
Jakob Stoklund Olesen f308c128ea Assert that all trace candidate blocks have been visited by the PO.
When computing a trace, all the candidates for pred/succ must have been
visited. Filter out back-edges first, though. The PO traversal ignores
them.

Thanks to Andy for spotting this in review.

llvm-svn: 160995
2012-07-30 21:10:27 +00:00
Jakob Stoklund Olesen a12a7d5f74 Hook into PassManager's analysis verification.
By overriding Pass::verifyAnalysis(), the pass contents will be verified
by the pass manager.

llvm-svn: 160994
2012-07-30 20:57:50 +00:00
Pete Cooper 91244268d7 Consider address spaces for hashing and CSEing DAG nodes. Otherwise two loads from different x86 segments but the same address would get CSEd
llvm-svn: 160987
2012-07-30 20:23:19 +00:00
Eric Christopher d79864c59b Typo.
llvm-svn: 160981
2012-07-30 20:09:37 +00:00
Kevin Enderby 5c490f1b8f Fix a bug in ARMMachObjectWriter::RecordRelocation() in ARMMachObjectWriter.cpp
where the other_half of the movt and movw relocation entries needs to get set
and only with the 16 bits of the other half.

rdar://10038370

llvm-svn: 160978
2012-07-30 18:46:15 +00:00
Jakob Stoklund Olesen 7361846f32 Add MachineInstr::isTransient().
This is a cleaned up version of the isFree() function in
MachineTraceMetrics.cpp.

Transient instructions are very unlikely to produce any code in the
final output. Either because they get eliminated by RegisterCoalescing,
or because they are pseudo-instructions like labels and debug values.

llvm-svn: 160977
2012-07-30 18:34:14 +00:00
Jakob Stoklund Olesen 3df6c46fdd Add MachineTraceMetrics::verify().
This function verifies the consistency of cached data in the
MachineTraceMetrics analysis.

llvm-svn: 160976
2012-07-30 18:34:11 +00:00
Jakob Stoklund Olesen eb488fe165 Verify that the CFG hasn't changed during invalidate().
The MachineTraceMetrics analysis must be invalidated before modifying
the CFG. This will catch some of the violations of that rule.

llvm-svn: 160969
2012-07-30 17:36:49 +00:00
Jakob Stoklund Olesen fee94ca15b Add MachineBasicBlock::isPredecessor().
A->isPredecessor(B) is the same as B->isSuccessor(A), but it can
tolerate a B that is null or dangling. This shouldn't happen normally,
but it it useful for verification code.

llvm-svn: 160968
2012-07-30 17:36:47 +00:00
Nadav Rotem 77f1b9c477 When constant folding GEP expressions, keep the address space information of pointers.
Together with Ran Chachick <ran.chachick@intel.com>

llvm-svn: 160954
2012-07-30 07:25:20 +00:00
Craig Topper efd97044a3 Mark MOVZX16/MOVSX16 as neverHasSideEffects/mayLoad
llvm-svn: 160953
2012-07-30 07:14:07 +00:00
Craig Topper c6b7ef61f4 Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code.
llvm-svn: 160951
2012-07-30 06:48:11 +00:00
Craig Topper 08ead0b14e Remove some unnecessary filter checks. They were already covered by IsCodeGenOnly
llvm-svn: 160950
2012-07-30 06:27:19 +00:00
Craig Topper 6f4ad80dc8 Remove check for sub class of X86Inst from filter function since caller guaranteed it. Replace another sub class check with ShouldBeEmitted flag since it was factored in there already.
llvm-svn: 160949
2012-07-30 05:39:34 +00:00
Craig Topper b58dc17025 Simplify code that filtered certain instructions in two different ways. No functional change.
llvm-svn: 160948
2012-07-30 05:10:05 +00:00
Craig Topper 60a58ac3e2 Remove check for f256mem from has256BitOperands as nothing depended on it and it isn't the only 256-bit memory type anyway.
llvm-svn: 160946
2012-07-30 04:53:00 +00:00
Craig Topper ac172e225d Remove trailing whitespace.
llvm-svn: 160945
2012-07-30 04:48:12 +00:00
Craig Topper 14eac5dda8 Give VCVTTPD2DQ priority over CVTTPD2DQ.
llvm-svn: 160942
2012-07-30 02:20:32 +00:00
Craig Topper f881d385da Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1.
llvm-svn: 160941
2012-07-30 02:14:02 +00:00
Craig Topper 415b3586d0 Fix up patterns for VCVTSS2SD. Specifically give it priority over SSE form. Add an OptForSpeed to explicitly pair up with an OptForSize that was already on another pattern.
llvm-svn: 160939
2012-07-30 01:38:57 +00:00
Craig Topper 28402efcb6 Fix load types on intrinsic forms of SS2SD and SD2SS AVX/SSE convert instruction patterns.
llvm-svn: 160938
2012-07-29 23:26:34 +00:00
Craig Topper b6767f3acd Move more SSE/AVX convert instruction patterns into their definitions.
llvm-svn: 160937
2012-07-29 22:30:06 +00:00
Benjamin Kramer ef2932125d APInt: Simplify code.
No functionality change.

llvm-svn: 160929
2012-07-29 12:33:29 +00:00
Manman Ren f87dd7c01b Revert r160920 and r160919 due to dragonegg and clang selfhost failure
llvm-svn: 160927
2012-07-29 02:44:09 +00:00
Nick Lewycky d2c3bdd269 Add testcases for GlobalOpt changes in r160693 and r160757.
llvm-svn: 160925
2012-07-29 01:15:37 +00:00
Craig Topper fc93281c07 Fold patterns for some of the SSE/AVX convert instructions into their instruction definitions.
llvm-svn: 160922
2012-07-28 18:59:19 +00:00
Craig Topper 024797b9a2 Mark some of the SSE/AVX convert instructions as mayLoad/neverHasSideEffects.
llvm-svn: 160921
2012-07-28 18:36:39 +00:00
Manman Ren 9de95e779c X86 Peephole: fold loads to the source register operand if possible.
Trying to fix the bot by specifying a triple in the failing testing cases.

llvm-svn: 160920
2012-07-28 17:51:24 +00:00
Manman Ren 0fa3ab88ba X86 Peephole: fold loads to the source register operand if possible.
Machine CSE and other optimizations can remove instructions so folding
is possible at peephole while not possible at ISel.

rdar://10554090 and rdar://11873276

llvm-svn: 160919
2012-07-28 16:48:01 +00:00
Craig Topper 44f9b5343d Make CVTSS2SI instruction definition consistent with CVTSD2SI.
llvm-svn: 160914
2012-07-28 08:28:23 +00:00
Craig Topper 1c1aef07b8 Fix up memory load types for SSE scalar convert intrinsic patterns.
llvm-svn: 160913
2012-07-28 07:59:59 +00:00
Manman Ren 32367c063b X86 Peephole: fix PR13475 in optimizeCompare.
It is possible that an instruction can use and update EFLAGS.
When checking the safety, we should check the usage of EFLAGS first before
declaring it is safe to optimize due to the update.

llvm-svn: 160912
2012-07-28 03:15:46 +00:00
Andrew Trick 940534371b Reenable a basic SSA DAG builder optimization.
Jakob fixed ProcessImplicifDefs in r159149.

llvm-svn: 160910
2012-07-28 01:48:15 +00:00
Jakob Stoklund Olesen 0563369755 Add more debug output to MachineTraceMetrics.
llvm-svn: 160905
2012-07-27 23:58:38 +00:00
Jakob Stoklund Olesen 1152202cc2 Keep track of the head and tail of the trace through each block.
This makes it possible to quickly detect blocks that are outside the
trace.

llvm-svn: 160904
2012-07-27 23:58:36 +00:00
Eric Christopher 86ca9f9e11 Add a DW_AT_high_pc for CUs that are a single address range. Update
all tests accordingly.

Fixes PR13351.

Patch by shinichiro hamaji!

llvm-svn: 160899
2012-07-27 22:00:05 +00:00
Jakob Stoklund Olesen 7dfe7abdee Also compute register mask lists under -new-live-intervals.
llvm-svn: 160898
2012-07-27 21:56:39 +00:00
Chad Rosier bd9f2ba4d6 Typos.
llvm-svn: 160897
2012-07-27 21:41:59 +00:00
Evan Cheng 249716e8ae Teach CodeGenPrep to look past bitcast when it's duplicating return instruction
into predecessor blocks to enable tail call optimization.

rdar://11958338

llvm-svn: 160894
2012-07-27 21:21:26 +00:00
Jakob Stoklund Olesen 97e14e02f1 Eliminate the IS_PHI_DEF flag and VNInfo::setIsPHIDef().
A value number is a PHI def if and only if it begins at a block
boundary. This can be derived from the def slot, a separate flag is not
necessary.

llvm-svn: 160893
2012-07-27 21:11:14 +00:00
Jakob Stoklund Olesen 4021a7bf25 Add a -new-live-intervals experimental option.
This option replaces the existing live interval computation with one
based on LiveRangeCalc.cpp. The new algorithm does not depend on
LiveVariables, and it can be run at any time, before or after leaving
SSA form.

llvm-svn: 160892
2012-07-27 20:58:46 +00:00
Andrew Kaylor 8e87a75be7 Fixing problems with X86_64_32 relocations and making the assertions more readable.
llvm-svn: 160889
2012-07-27 20:30:12 +00:00
Jakob Stoklund Olesen bc65e8f94e Add <imp-def> of super-register when lowering SUBREG_TO_REG.
Patch by Tyler Nowicki!

llvm-svn: 160888
2012-07-27 20:19:49 +00:00
Benjamin Kramer 718b007fe9 SmallVector: Crank up verbosity of asserts per Chandler's request.
Also add assertions to validate the iterator in the insert method overloads.

llvm-svn: 160882
2012-07-27 19:05:58 +00:00
Chad Rosier c25f88b703 The TimePassesIsEnabled has since moved to PassManager.cpp.
llvm-svn: 160881
2012-07-27 19:03:02 +00:00
Andrew Kaylor 782d5c434f Test commit, clean up comment
llvm-svn: 160880
2012-07-27 18:39:47 +00:00
Nuno Lopes 85591f899d fix PR13390: do not loop forever with self-referencing self instructions
llvm-svn: 160876
2012-07-27 18:21:15 +00:00
Nuno Lopes 20c7eb3549 fix infinite loop in instcombine in the presence of a (malformed) self-referencing select inst.
This can happen as long as the instruction is not reachable. Instcombine does generate these unreachable malformed selects when doing RAUW

llvm-svn: 160874
2012-07-27 18:03:57 +00:00
Andrew Kaylor 5c01090c49 Test commit, clean up comment
llvm-svn: 160873
2012-07-27 17:52:42 +00:00
Jakob Stoklund Olesen 0c06121e4e Give MCRegisterInfo an implementation file.
Move some functions from MCRegisterInfo.h that don't need to be inline.

This shrinks llc by 8K.

llvm-svn: 160865
2012-07-27 16:25:20 +00:00
Benjamin Kramer 38862ecf79 SmallVector::erase: Assert that iterators are actually inside the vector.
The rationale here is that it's hard to write loops containing vector erases and
it only shows up if the vector contains non-trivial objects leading to crashes
when forming them out of garbage memory.

llvm-svn: 160854
2012-07-27 09:10:25 +00:00
Craig Topper b63501397b Clean up includes.
llvm-svn: 160852
2012-07-27 06:44:02 +00:00
Jakob Stoklund Olesen 4914cced62 Eliminate the large XXXSubRegTable constant arrays.
These tables were indexed by [register][subreg index] which made them,
very large and sparse.

Replace them with lists of sub-register indexes that match the existing
lists of sub-registers. MCRI::getSubReg() becomes a very short linear
search, like getSubRegIndex() already was.

llvm-svn: 160843
2012-07-27 00:10:51 +00:00
Jakob Stoklund Olesen 5995936309 Remove support for 'CompositeIndices' and sub-register cycles.
Now that the weird X86 sub_ss and sub_sd sub-register indexes are gone,
there is no longer a need for the CompositeIndices construct in .td
files. Sub-register index composition can be specified on the
SubRegIndex itself using the ComposedOf field.

Also enforce unique names for sub-registers in TableGen. The same
sub-register cannot be available with multiple sub-register indexes.

llvm-svn: 160842
2012-07-26 23:39:50 +00:00
Akira Hatanaka 97ba7696f8 Pass the correct call frame size to callseq_start node. This is needed to
replace uses of function getMaxCallFrameSize defined in MipsFunctionInfo with
the one MachineFrameInfo has.

llvm-svn: 160841
2012-07-26 23:27:01 +00:00
Pete Cooper abc13af9c6 Simplify demanded bits of select sources where the condition is a constant vector
llvm-svn: 160835
2012-07-26 23:10:24 +00:00
Jakob Stoklund Olesen 7cd08536c2 Remove the X86 sub_ss and sub_sd sub-register indexes completely.
llvm-svn: 160833
2012-07-26 23:07:20 +00:00
Jakob Stoklund Olesen 77cd55b4ee Remove the last mentions of sub_ss and sub_sd from patterns.
I'll remove these two sub-register indexes shortly.

llvm-svn: 160831
2012-07-26 23:03:08 +00:00