Summary: I came across an outstanding FIXME to make the format style customizable. Inspired by the include fixer, I added an new option `-style` to configure the fallback style in case no clang-format configuration file is found. The default remains "llvm".
Reviewers: Prazek, aaron.ballman, hokein, alexfh
Subscribers: cfe-commits, malcolm.parsons
Tags: #clang-tools-extra
Differential Revision: https://reviews.llvm.org/D27142
llvm-svn: 288258
- Fix the bug with transition handling in ExprInspectionChecker's
checkDeadSymbols implementation.
- Test this bug by adding a new function clang_analyzer_numTimesReached() to
catch number of passes through the code, which should be handy for testing
against unintended state splits.
- Add two more functions should help debugging issues quickly without running
the debugger or dumping exploded graphs - clang_analyzer_dump() which dump()s
an SVal argument to a warning message, and clang_analyzer_printState(), which
dump()s the current program state to stderr.
Differential Revision: https://reviews.llvm.org/D26835
llvm-svn: 288257
Summary:
This update introduces i386 support for the Scudo Hardened Allocator, and
offers software alternatives for functions that used to require hardware
specific instruction sets. This should make porting to new architectures
easier.
Among the changes:
- The chunk header has been changed to accomodate the size limitations
encountered on 32-bit architectures. We now fit everything in 64-bit. This
was achieved by storing the amount of unused bytes in an allocation rather
than the size itself, as one can be deduced from the other with the help
of the GetActuallyAllocatedSize function. As it turns out, this header can
be used for both 64 and 32 bit, and as such we dropped the requirement for
the 128-bit compare and exchange instruction support (cmpxchg16b).
- Add 32-bit support for the checksum and the PRNG functions: if the SSE 4.2
instruction set is supported, use the 32-bit CRC32 instruction, and in the
XorShift128, use a 32-bit based state instead of 64-bit.
- Add software support for CRC32: if SSE 4.2 is not supported, fallback on a
software implementation.
- Modify tests that were not 32-bit compliant, and expand them to cover more
allocation and alignment sizes. The random shuffle test has been deactivated
for linux-i386 & linux-i686 as the 32-bit sanitizer allocator doesn't
currently randomize chunks.
Reviewers: alekseyshl, kcc
Subscribers: filcab, llvm-commits, tberghammer, danalbert, srhines, mgorny, modocache
Differential Revision: https://reviews.llvm.org/D26358
llvm-svn: 288255
Summary:
When computing useful bits for a BFM instruction, we need
to take into consideration the case where both operands
of the BFM are equal and provide data that we need to track.
Not doing this can cause us to miss useful bits.
Fixes PR31138 (https://llvm.org/bugs/show_bug.cgi?id=31138)
Reviewers: t.p.northover, jmolloy
Subscribers: evandro, gberry, srhines, pirama, mcrosier, aemerson, llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D27130
llvm-svn: 288253
This is the first part of an effort to add wasm binary
support across all llvm tools.
Patch by Sam Clegg
Differential Revision: https://reviews.llvm.org/D26172
llvm-svn: 288251
Initial support for target shuffle constant folding in cases where all shuffle inputs are constant. We may be able to relax this and merge shuffles with only some constant inputs in the future.
I've added the helper function getTargetConstantBitsFromNode (based off a similar function in X86ShuffleDecodeConstantPool.cpp) that could be reused for other cases requiring constant vector extraction.
Differential Revision: https://reviews.llvm.org/D27220
llvm-svn: 288250
This is the beginning of an effort to get libfuzzer working on
Windows. This is a NFC to just add some macros for platform
detection on Windows.
Patch by Marcos Pividori
Differential Revision: https://reviews.llvm.org/D27229
llvm-svn: 288249
Summary: Further preparation for the expansion of MUL_LOHI added in D24956.
Reviewers: efriedma, RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D27064
llvm-svn: 288248
The core of the function was actually handling them correctly. However, the
early exit was being too optimistic and did not give the function a chance to
fire if the path did not contain dots as well.
Fix that and add a couple of unit tests.
llvm-svn: 288247
Summary:
The usage was previously guarded by HAVE_DLFCN. This breaks on Android with
LLVM_BUILD_STATIC as the platform does not provide a static version of libdl.
Using HAVE_DLOPEN fixes it as the code will only get used if we are actually able
to link an executable using dlopen.
Reviewers: rafael, beanz
Subscribers: tberghammer, danalbert, llvm-commits
Differential Revision: https://reviews.llvm.org/D26504
llvm-svn: 288246
This changes most of the class to use the new Timeout class. The one function
left is RunThreadPlan, which I left for a separate change as the function is
massive. A couple of things to call out:
- I've renamed the affected functions to match the listener interface names. This
should also help catch any places I did not convert at compile time.
- I've deleted the WaitForState function as it was unused.
llvm-svn: 288241
Summary:
Communication classes use the Timeout<> class to specify the timeout. Listener
class was converted to chrono some time ago, but it used a different meaning for
a timeout of zero (Listener: infinite wait, Communication: no wait). Instead,
Listener provided separate functions which performed a non-blocking event read.
This converts the Listener class to the new Timeout class, to improve
consistency. It also allows us to get merge the different GetNextEvent*** and
WaitForEvent*** functions into one. No functional change intended.
Reviewers: jingham, clayborg, zturner
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D27136
llvm-svn: 288238
We were referencing a the process class from a register context, which seems
intuitively wrong. Also, the comment above that code is now definitely incorrect,
as ProcessElfCore now does support floating point registers. Also, the code
wasn't really doing anything, as it was just skipping a zero-initialization of a
field that was most likely zero-initialized anyway. Linux elf core FPR test still
passes after this.
llvm-svn: 288237
Summary:
While adding FPR support to x86 elf core files (D26300), we ended up adding a
very x86-specific function to the general RegisterInfoInterface class, which I
didn't catch in review. This removes that function. The only reason we needed
it was to find the offset of the FXSAVE area. This is the same as the offset of
the first register within that area, so we might as well use that.
Reviewers: clayborg, dvlahovski
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D27222
llvm-svn: 288236
__sanitizer_contiguous_container_find_bad_address computes three regions of a
container to check for poisoning: begin, middle, end. The issue is that in current
design the first region can be significantly larger than kMaxRangeToCheck.
Proposed patch fixes a typo to calculate the first region properly.
Patch by Ivan Baravy.
Differential Revision: https://reviews.llvm.org/D27061
llvm-svn: 288234
Summary: Makes -fprofile-instr-generate and -fprofile-instr-use work
with clang-cl so that profile-guided optimization can be used.
Differential Revision: https://reviews.llvm.org/D27086
llvm-svn: 288230
Previously, on each iteration in ICF, we scan the entire vector of
input sections to find boundaries of groups having the same ID.
This patch changes the algorithm so that we now have a vector of ranges.
Each range contains a starting index and an ending index of the group.
So we no longer have to search boundaries on each iteration.
Performance-wise, this seems neutral. Instead of searching boundaries,
we now have to maintain ranges. But I think this is more readable
than the previous implementation.
Moreover, this makes easy to parallelize the main loop of ICF,
which I'll do in a follow-up patch.
llvm-svn: 288228
Other AST consumers can deserialize interesting decls that we might
codegen, but they won't make it to the final object file and can trigger
assertions in debug information generation after finalization.
llvm-svn: 288221
specifications in this mode in C++17, since they're part of the function type,
so check and diagnose them like we would if exceptions were enabled.
Better ideas welcome.
llvm-svn: 288220
This patch corresponds to review:
https://reviews.llvm.org/D26023
This patch adds support for converting a vector of loads into a single load if
the loads are consecutive (in either direction).
llvm-svn: 288219
This patch corresponds to review:
https://reviews.llvm.org/D25980
This is the 2nd patch in a series of 4 that improve the lowering and combining
for BUILD_VECTOR nodes on PowerPC. This particular patch combines a build vector
of fp-to-int conversions into an fp-to-int conversion of a build vector of fp
values. For example:
Converts (build_vector (fp_to_[su]i $A), (fp_to_[su]i $B), ...)
Into (fp_to_[su]i (build_vector $A, $B, ...))).
Which is a natural match for much cleaner code.
llvm-svn: 288218
Summary: Previously 0 and -1 was matched via tablegen rules. But this could cause problems where a physical register was being used where a virtual register was expected (seen in optimizeSelect and TwoAddressInstructionPass). Instead follow AArch64 and match in DAGToDAGISel.
Reviewers: eliben, majnemer
Subscribers: llvm-commits, aemerson
Differential Revision: https://reviews.llvm.org/D27171
llvm-svn: 288215
This commit caused some miscompiles that did not show up on any of the bots.
Reverting until we can investigate the cause of those failures.
llvm-svn: 288214
DWARF specifies that "line 0" really means "no appropriate source
location" in the line table. Use this for branch targets and some
other cases that have no specified source location, to prevent
inheriting unfortunate line numbers from physically preceding
instructions (which might be from completely unrelated source).
Differential Revision: http://reviews.llvm.org/D24180
llvm-svn: 288212
Jonas Devlieghere