Commit Graph

2648 Commits

Author SHA1 Message Date
Matt Arsenault a0c6dca15b AMDGPU: Add fmed3 half builtin
llvm-svn: 295874
2017-02-22 20:55:59 +00:00
Brad Smith 9aa2bf209b Hook up OpenBSD AArch64 support
llvm-svn: 295786
2017-02-21 23:13:09 +00:00
Simon Dardis df827a7165 [mips] Define macros related to -mabicalls in the preprocessor
Summary:
Historically, NetBSD, FreeBSD and OpenBSD have defined the macro ABICALLS in
the preprocessor when -mabicalls is in effect.

Mainline GCC later defined __mips_abicalls when -mabicalls is in effect.

This patch teaches the preprocessor to define these macros when appropriate.

NetBSD does not require the ABICALLS macro.

This resolves PR/31694.

Thanks to Sean Bruno for highlighting this issue!

Reviewers: slthakur, seanbruno

Reviewed By: seanbruno

Subscribers: joerg, brad, emaste, seanbruno, cfe-commits

Differential Revision: https://reviews.llvm.org/D29032

llvm-svn: 295728
2017-02-21 16:01:00 +00:00
Brad Smith 0561a5a7fe Enable support for __float128 in Clang on OpenBSD/X86
/usr/local/include/c++/4.9.4/type_traits:279:39: error: __float128 is not
supported on this target

llvm-svn: 295635
2017-02-20 03:18:15 +00:00
Matt Arsenault eb952fd93b AMDGPU: Add gfx900 and gfx901 processors
llvm-svn: 295556
2017-02-18 19:02:41 +00:00
Carlo Bertolli 8429d81202 [OpenMP] Prepare Sema for initial implementation for pragma 'distribute parallel for'
https://reviews.llvm.org/D29922

This patch adds two fields for use in the implementation of 'distribute parallel for':

The increment expression for the distribute loop. As the chunk assigned to a team is executed by multiple threads within the 'parallel for' region, the increment expression has to correspond to the value returned by the related runtime call (for_static_init).
The upper bound of the innermost loop ('for' in 'distribute parallel for') is not the globalUB expression normally used for pragma 'for' when found in isolation. It is instead the upper bound of the chunk assigned to the team ('distribute' loop). In this way, we prevent teams from executing chunks assigned to other teams.
The use of these two fields can be see in a related explanatory patch:
https://reviews.llvm.org/D29508

llvm-svn: 295497
2017-02-17 21:29:13 +00:00
Eric Christopher 32ac5e41ef Add a definition for __STRUCT_PARM_ALIGN__ for elfv2 and 64-bit darwin platforms to match what other compilers produce.
llvm-svn: 295156
2017-02-15 07:50:11 +00:00
Dylan McKay 315edb0216 [AVR] Fix __AVR_xxx macro definitions; authored by Peter Wu
Summary:
The -mmcu option for GCC sets macros like __AVR_ATmega328P__ (with the trailing
underscores), be sure to include these underscores for Clangs -mcpu option.

See "AVR Built-in Macros" in https://gcc.gnu.org/onlinedocs/gcc/AVR-Options.html

Reviewers: jroelofs, dylanmckay

Reviewed By: jroelofs, dylanmckay

Subscribers: efriedma, cfe-commits

Differential Revision: https://reviews.llvm.org/D29817

llvm-svn: 294869
2017-02-11 21:06:07 +00:00
Eric Christopher f6ee1f3d69 Temporarily revert "For X86-64 linux and PPC64 linux align int128 to 16 bytes."
until we can get better TargetMachine::isCompatibleDataLayout to compare - otherwise
we can't code generate existing bitcode without a string equality data layout.

This reverts commit r294703.

llvm-svn: 294708
2017-02-10 04:35:21 +00:00
Eric Christopher 4855ba8f24 For X86-64 linux and PPC64 linux align int128 to 16 bytes.
For other platforms we should find out what they need and likely
make the same change, however, a smaller additional change is easier
for platforms we know have it specified in the ABI.

clang support for r294702

llvm-svn: 294703
2017-02-10 03:32:34 +00:00
George Burgess IV fc9705679e Add support for armv7ve flag in clang (PR31358).
This is a followup change to add v7ve support to clang for gcc
compatibility. Please see r294661.

Patch by Manoj Gupta.

Differential Revision: https://reviews.llvm.org/D29773

llvm-svn: 294662
2017-02-09 23:30:10 +00:00
Craig Topper 4574226c3f [X86] Clzero flag addition and inclusion under znver1
1. Adds the command line flag for clzero.
2. Includes the clzero flag under znver1.
3. Defines the macro for clzero.
4. Adds a new file which has the intrinsic definition for clzero instruction.

Patch by Ganesh Gopalasubramanian with some additional tests from me.

Differential revision: https://reviews.llvm.org/D29386

llvm-svn: 294559
2017-02-09 06:10:14 +00:00
Craig Topper d2bf7b03e5 [X86] Add -mprefetchwt1/-mno-prefetchwt1 command line options and __PREFETCHWT1__ define to match gcc.
llvm-svn: 294424
2017-02-08 08:23:40 +00:00
Craig Topper 204ecffdb4 [X86] Add -msgx/-mno-sgx command line options and __SGX__ define to match gcc.
llvm-svn: 294423
2017-02-08 08:23:17 +00:00
Craig Topper b16cb82c93 [X86] Add -mmpx/-mno-mpx command line options and __MPX__ define to match gcc.
llvm-svn: 294419
2017-02-08 07:56:42 +00:00
Craig Topper 8c708cf6bc [X86] Add -mclwb/-mno-clwb command line arguments and __CLWB__ define to match gcc.
In the future, we should also add a clwb intrinsic to the backend, a frontend builtin, and an instrinsic header file.

llvm-svn: 294416
2017-02-08 07:36:58 +00:00
Craig Topper 32c959dab3 [X86] Remove 'umip' feature flag.
This feature flag indicates that the processor has support for removing certain instructions from user mode software. But the feature flag by itself doesn't indicate if the support is enabled in the OS. The affected instructions aren't even instructions the compiler would emit. So I don't think think this feature flag should be in the compiler.

llvm-svn: 294414
2017-02-08 07:13:22 +00:00
Craig Topper 78b4787593 [X86] Add -mclflushopt/-mno-clflushopt command line support and __CLFLUSHOPT__ define to match gcc.
llvm-svn: 294411
2017-02-08 06:48:58 +00:00
Craig Topper 7d494ef610 Use LLVM_FALLTHROUGH instead of FALLTHROUGH comments.
llvm-svn: 294404
2017-02-08 05:44:30 +00:00
Craig Topper c31d9e4a01 [X86] Remove PCOMMIT feature support since Intel has deprecated this instruction with no plans to release products with it.
Intel's documentation for the deprecation https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction

llvm-svn: 294403
2017-02-08 05:44:28 +00:00
Saleem Abdulrasool 5602709b98 Revert "Basic: match GCC behaviour for SuS macro"
This reverts commit SVN r294148.  Seems that it was mistaken, and GCC
does still define `__unix` and `unix` when in GNU mode.

llvm-svn: 294332
2017-02-07 19:00:06 +00:00
Dylan McKay ecb6e7b83c Revert "Revert "[AVR] Allow specifying the CPU on the command line""
This reverts commit 7ac30e0f839fdab6d723ce2ef6a5b7a4cf03d150.

llvm-svn: 294282
2017-02-07 06:04:18 +00:00
Ulrich Weigand 82a86cb155 [SystemZ] Provide predefined __ARCH__ and __VX__ macros
GCC 7 will predefine two new macros on s390x:

- __ARCH__ indicates the ISA architecture level
- __VX__ indicates that the vector facility is available

This adds those macros to clang as well to ensure continued
compatibility with GCC.

llvm-svn: 294197
2017-02-06 17:04:22 +00:00
Diana Picus 37a2d6d699 Revert "[AVR] Allow specifying the CPU on the command line"
This reverts commit r294177. It seems to have broken some buildbots.

llvm-svn: 294180
2017-02-06 11:35:42 +00:00
Dylan McKay 8464c9b579 [AVR] Allow specifying the CPU on the command line
Summary:
This tells clang about all of the different AVR microcontrollers.

It also adds code to define the correct preprocessor macros for each
device.

Reviewers: jroelofs, asl

Reviewed By: asl

Subscribers: asl, cfe-commits

Differential Revision: https://reviews.llvm.org/D28346

llvm-svn: 294177
2017-02-06 09:07:56 +00:00
Dylan McKay d31534cd3a [AVR] Add support for the full set of inline asm constraints
Summary:
Previously the method would simply return false, causing every single
inline assembly constraint to trigger a compile error.

This adds inline assembly constraint support for the AVR target.

This patch is derived from the code in
AVRISelLowering::getConstraintType.

More details can be found on the AVR-GCC reference wiki
http://www.nongnu.org/avr-libc/user-manual/inline_asm.html

Reviewers: jroelofs, asl

Reviewed By: asl

Subscribers: asl, ahatanak, saaadhu, cfe-commits

Differential Revision: https://reviews.llvm.org/D28344

llvm-svn: 294176
2017-02-06 09:01:59 +00:00
Saleem Abdulrasool c5cddc9fa8 Basic: match GCC behaviour for SuS macro
GCC does not generate `__unix` nor `unix` macros.  The latter already
intrudes into the user's namespace and should be avoided.  Use the
canonical spelling of `__unix__` across all the targets.

llvm-svn: 294148
2017-02-05 22:18:15 +00:00
David Blaikie 9ffe5a3525 Prototype of modules codegen
First pass at generating weak definitions of inline functions from module files
(& skipping (-O0) or emitting available_externally (optimizations)
definitions where those modules are used).

External functions defined in modules are emitted into the modular
object file as well (this may turn an existing ODR violation (if that
module were imported into multiple translations) into valid/linkable
code).

Internal symbols (static functions, for example) are not correctly
supported yet. The symbol will be produced, internal, in the modular
object - unreferenceable from the users.

Reviewers: rsmith

Differential Revision: https://reviews.llvm.org/D28845

llvm-svn: 293456
2017-01-30 05:00:26 +00:00
Richard Smith d230de27f8 Remove and replace DiagStatePoint tracking and lookup data structure.
Rather than storing a single flat list of SourceLocations where the diagnostic
state changes (in source order), we now store a separate list for each FileID
in which there is a diagnostic state transition. (State for other files is
built and cached lazily, on demand.) This has two consequences:

1) We can now sensibly support modules, and properly track the diagnostic state
for modular headers (this matters when, for instance, triggering instantiation
of a template defined within a module triggers diagnostics).

2) It's much faster than the old approach, since we can now just do a binary
search on the offsets within the FileID rather than needing to call
isBeforeInTranslationUnit to determine source order (which is surprisingly
slow). For some pathological (but real world) files, this reduces total
compilation time by more than 10%.

For now, the diagnostic state points for modules are loaded eagerly. It seems
feasible to defer this until diagnostic state information for one of the
module's files is needed, but that's not part of this patch.

llvm-svn: 293123
2017-01-26 01:01:01 +00:00
Arpith Chacko Jacob 99a1e0eba5 [OpenMP] Codegen support for 'target teams' on the host.
This patch adds support for codegen of 'target teams' on the host.
This combined directive has two captured statements, one for the
'teams' region, and the other for the 'parallel'.

This target teams region is offloaded using the __tgt_target_teams()
call. The patch sets the number of teams as an argument to
this call.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D29084

llvm-svn: 293005
2017-01-25 02:18:43 +00:00
Arpith Chacko Jacob 86f9e46365 Reverting commit because an NVPTX patch sneaked in. Break up into two
patches.

llvm-svn: 293003
2017-01-25 01:45:59 +00:00
Arpith Chacko Jacob 4dbf368e14 [OpenMP] Codegen support for 'target teams' on the host.
This patch adds support for codegen of 'target teams' on the host.
This combined directive has two captured statements, one for the
'teams' region, and the other for the 'parallel'.

This target teams region is offloaded using the __tgt_target_teams()
call. The patch sets the number of teams as an argument to
this call.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D29084

llvm-svn: 293001
2017-01-25 01:38:33 +00:00
Pavel Labath dcbd614c6c Replace use of chdir with llvm::sys::fs::set_current_path
NFCI

llvm-svn: 292914
2017-01-24 11:14:29 +00:00
Matt Arsenault 09cca093a3 AMDGPU: Update for changed subtarget feature name
llvm-svn: 292838
2017-01-23 22:31:14 +00:00
Petr Hosek 8c69cffe15 [Basic] Remove the 32-bit x86 and ARM targets for Fuchsia
The 32-bit architectures are no longer supported by Fuchsia.

Differential Revision: https://reviews.llvm.org/D28974

llvm-svn: 292671
2017-01-20 22:53:38 +00:00
Arpith Chacko Jacob 19b911cb75 [OpenMP] Codegen support for 'target parallel' on the host.
This patch adds support for codegen of 'target parallel' on the host.
It is also the first combined directive that requires two or more
captured statements.  Support for this functionality is included in
the patch.

A combined directive such as 'target parallel' has two captured
statements, one for the 'target' and the other for the 'parallel'
region.  Two captured statements are required because each has
different implicit parameters (see SemaOpenMP.cpp).  For example,
the 'parallel' has 'global_tid' and 'bound_tid' while the 'target'
does not.  The patch adds support for handling multiple captured
statements based on the combined directive.

When codegen'ing the 'target parallel' directive, the 'target'
outlined function is created using the outer captured statement
and the 'parallel' outlined function is created using the inner
captured statement.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D28753

llvm-svn: 292419
2017-01-18 18:18:53 +00:00
Benjamin Kramer bc9ef590cb [Basic] Remove source manager references from diag state points.
This is just wasted space, we don't support state points from multiple
source managers. Validate that there's no state when resetting the
source manager and use the 'global' reference to the sourcemanager
instead of the ones in the diag state.

llvm-svn: 292402
2017-01-18 15:50:26 +00:00
Arpith Chacko Jacob 42793e000a Revert r292374 to debug Windows buildbot failure.
llvm-svn: 292400
2017-01-18 15:36:05 +00:00
Arpith Chacko Jacob 68019578a3 [OpenMP] Codegen support for 'target parallel' on the host.
This patch adds support for codegen of 'target parallel' on the host.
It is also the first combined directive that requires two or more
captured statements.  Support for this functionality is included in
the patch.

A combined directive such as 'target parallel' has two captured
statements, one for the 'target' and the other for the 'parallel'
region.  Two captured statements are required because each has
different implicit parameters (see SemaOpenMP.cpp).  For example,
the 'parallel' has 'global_tid' and 'bound_tid' while the 'target'
does not.  The patch adds support for handling multiple captured
statements based on the combined directive.

When codegen'ing the 'target parallel' directive, the 'target'
outlined function is created using the outer captured statement
and the 'parallel' outlined function is created using the inner
captured statement.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D28753

llvm-svn: 292374
2017-01-18 15:14:52 +00:00
Dan Gohman 839f215e19 [WebAssembly] Add minimal support for the new wasm object format triple.
llvm-svn: 292269
2017-01-17 21:46:38 +00:00
Joerg Sonnenberger 8450266425 Ensure that clang -pthread creates the right macro. -D_POSIX_THREADS
seems to have been a C&P error from old GCC specs for OpenBSD.

llvm-svn: 292119
2017-01-16 14:07:24 +00:00
Kelvin Li da68118729 [OpenMP] Sema and parsing for 'target teams distribute simd’ pragma
This patch is to implement sema and parsing for 'target teams distribute simd’ pragma.
    
Differential Revision: https://reviews.llvm.org/D28252

llvm-svn: 291579
2017-01-10 18:08:18 +00:00
Craig Topper c45744ad93 AMD family 17h (znver1) enablement
Summary:
This patch enables the following
1. AMD family 17h architecture using "znver1" tune flag (-march, -mcpu).
2. ISAs that are enabled for "znver1" architecture.
3. Checks ADX isa from cpuid to identify "znver1" flag when -march=native is used.
4. ISAs FMA4, XOP are disabled as they are dropped from amdfam17.
5. For the time being, it uses the btver2 scheduler model.
6. Test file is updated to check this flag.

This is linked to llvm review item https://reviews.llvm.org/D28017

Patch by Ganesh Gopalasubramanian. Additional test cases added by Craig Topper.

Reviewers: RKSimon, craig.topper

Subscribers: cfe-commits, RKSimon, ashutosh.nema, llvm-commits

Differential Revision: https://reviews.llvm.org/D28018

llvm-svn: 291544
2017-01-10 06:02:12 +00:00
Justin Lebar 86c4e63ff9 [CUDA] Let NVPTX inherit the host's calling conventions.
Summary:
When compiling device code, we may still see host code with explicit
calling conventions.  NVPTX needs to claim that it supports these CCs,
so that (a) we don't raise noisy warnings, and (b) we don't break
existing code which relies on the existence of these CCs when
specializing templates.  (If a CC doesn't exist, clang ignores it, so
two template specializations which are different only insofar as one
specifies a CC are considered identical and therefore are an error if
that CC is not supported.)

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28323

llvm-svn: 291136
2017-01-05 16:53:38 +00:00
Justin Lebar b662659355 [CUDA] More correctly inherit primitive types from the host during device compilation.
Summary:
CUDA lets users share structs between the host and device, so for that
and other reasons, primitive types such as ptrdiff_t should be the same
on both sides of the compilation.

Our code to do this wasn't entirely successful.  In particular, we did a
bunch of work during the NVPTXTargetInfo constructor, only to override
it in the NVPTX{32,64}TargetInfo constructors.  It worked well enough on
Linux and Mac, but Windows is LLP64, which is different enough to break
it.

This patch removes the NVPTX{32,64}TargetInfo classes entirely and fixes
the bug described above.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28322

llvm-svn: 291135
2017-01-05 16:53:21 +00:00
Dylan McKay 95aa265a6e [AVR] Revert the functional part of r291083
As Senthil points out, this is unnecessary as we already have these
registers in AddlRegNames.

llvm-svn: 291090
2017-01-05 07:17:46 +00:00
Dylan McKay f0f33a8b1a [AVR] Support r26 through r31 in inline assembly
These are synonyms for the X,Y, and Z registers.

llvm-svn: 291083
2017-01-05 05:31:12 +00:00
Dylan McKay 924fa3abdc Add AVR target and toolchain to Clang
Summary:
Authored by Senthil Kumar Selvaraj

This patch adds barebones support in Clang for the (experimental) AVR target. It uses the integrated assembler for assembly, and the GNU linker for linking, as lld doesn't know about the target yet.

The DataLayout string is the same as the one in AVRTargetMachine.cpp. The alignment specs look wrong to me, as it's an 8 bit target and all types only need 8 bit alignment. Clang failed with a datalayout mismatch error when I tried to change it, so I left it that way for now.

Reviewers: rsmith, dylanmckay, cfe-commits, rengolin

Subscribers: rengolin, jroelofs, wdng

Differential Revision: https://reviews.llvm.org/D27123

llvm-svn: 291082
2017-01-05 05:20:27 +00:00
Kelvin Li 1851df563d [OpenMP] Sema and parsing for 'target teams distribute parallel for simd’ pragma
This patch is to implement sema and parsing for 'target teams distribute parallel for simd’ pragma.

Differential Revision: https://reviews.llvm.org/D28202

llvm-svn: 290862
2017-01-03 05:23:48 +00:00
Kelvin Li 80e8f56284 [OpenMP] Sema and parsing for 'target teams distribute parallel for’ pragma
This patch is to implement sema and parsing for 'target teams distribute parallel for’ pragma.

Differential Revision: https://reviews.llvm.org/D28160

llvm-svn: 290725
2016-12-29 22:16:30 +00:00