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933 Commits

Author SHA1 Message Date
Jim Grosbach 72dfd20aba ARM assembly parsing for two-operand form of 'mul' instruction. 
Ongoing rdar://10435114.

llvm-svn: 144688
 2011-11-15 20:02:06 +00:00
Jim Grosbach 68c899c211 Testcase for r144684. 
llvm-svn: 144685
 2011-11-15 19:56:17 +00:00
Jim Grosbach 6efa7b9852 Thumb2 assembly parsing for mul.w in IT block fix. 
When the 3rd operand is not a low-register, and the first two operands are
the same low register, the parser was incorrectly trying to use the 16-bit
instruction encoding.

rdar://10449281

llvm-svn: 144679
 2011-11-15 19:29:45 +00:00
Jim Grosbach a498af2b1d ARM parsing datatype suffix variants for non-writeback VST1 instructions. 
rdar://10435076

llvm-svn: 144593
 2011-11-14 23:43:46 +00:00
Jim Grosbach 72838a0345 ARM parsing datatype suffix variants for non-writeback VLD1 instructions. 
rdar://10435076

llvm-svn: 144592
 2011-11-14 23:32:59 +00:00
Jim Grosbach 3d6c0e0bb2 ARM parsing optional datatype suffix for VAND/VEOR/VORR instructions. 
rdar://10435076

llvm-svn: 144587
 2011-11-14 23:11:19 +00:00
Jim Grosbach 3e2c6f380c ARM VLDR/VSTR instructions don't need a size suffix. 
Canonicallize on the non-suffixed form, but continue to accept assembly that
has any correctly sized type suffix.

llvm-svn: 144583
 2011-11-14 23:03:21 +00:00
Jim Grosbach 609d113874 ARM optional size suffix for VLDR/VSTR syntax. 
llvm-svn: 144427
 2011-11-11 23:34:43 +00:00
Jim Grosbach 85a2343b01 ARM allow Q registers in vldm/vstm register lists. 
rdar://9672822

llvm-svn: 144407
 2011-11-11 21:27:40 +00:00
Jim Grosbach 9bded9dc24 Thumb2 parsing for push/pop w/ hi registers in the reglist. 
rdar://10130228.

llvm-svn: 144331
 2011-11-10 23:17:11 +00:00
Jim Grosbach 5a5ce63742 Thumb MUL assembly parsing for 3-operand form. 
Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.

rdar://10428630

llvm-svn: 144322
 2011-11-10 22:10:12 +00:00
Jim Grosbach c14871cc67 ARM assembly parsing for LSR/LSL/ROR(immediate). 
More of rdar://9704684

llvm-svn: 144301
 2011-11-10 19:18:01 +00:00
Jim Grosbach 61db5a59f7 ARM assembly parsing for ASR(immediate). 
Start of rdar://9704684

llvm-svn: 144293
 2011-11-10 16:44:55 +00:00
Jim Grosbach 25bc090170 Thumb2 assembly parsing STMDB w/ optional .w suffix. 
rdar://10422955

llvm-svn: 144242
 2011-11-09 23:44:23 +00:00
Benjamin Kramer 69d57cf9c4 Simplify some uses of utohexstr. 
As a side effect hex is printed lowercase instead of uppercase now.

llvm-svn: 144013
 2011-11-07 21:00:59 +00:00
Jim Grosbach b009a872d7 Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm". 
When '~imm' is encodable as a t2_so_imm but plain 'imm' is not. For example,
  mov r2, #-3
becomes
  mvn r2, #2

rdar://10349224

llvm-svn: 143235
 2011-10-28 22:36:30 +00:00
Jim Grosbach 7a49575d7f Thumb2 ADD/SUB instructions encoding selection outside IT block. 
Outside an IT block, "add r3, #2" should select a 32-bit wide encoding
rather than generating an error indicating the 16-bit encoding is only
legal in an IT block (outside, the 'S' suffic is required for the 16-bit
encoding).

rdar://10348481

llvm-svn: 143201
 2011-10-28 16:57:07 +00:00
Jim Grosbach 080a499ee0 ARM Allow 'q' registers in VLD/VST vector lists. 
Just treat it as if the constituent D registers where specified.

rdar://10348896

llvm-svn: 143167
 2011-10-28 00:06:50 +00:00
Jim Grosbach 6ed3845530 Thumb2 t2LDMDB[_UPD] assembly parsing to recognize .w suffix. 
rdar://10348844

llvm-svn: 143110
 2011-10-27 17:33:59 +00:00
Jim Grosbach ba7f90c7df Thumb2 t2MVNi assembly parsing to recognize ".w" suffix. 
rdar://10348584

llvm-svn: 143108
 2011-10-27 17:16:55 +00:00
Jim Grosbach 61fdba048f Thumb2 ldr pc-relative encoding fixes. 
We were parsing label references to the i12 encoding, which isn't right.
They need to go to the pci variant instead.

More of rdar://10348687

llvm-svn: 143068
 2011-10-26 22:22:01 +00:00
Jim Grosbach 17ec1a19e5 ARM assembly parsing and encoding for VLD1 with writeback. 
Four entry register lists.

llvm-svn: 142882
 2011-10-25 00:14:01 +00:00
Jim Grosbach 92fd05ecdc ARM assembly parsing and encoding for VLD1 w/ writeback. 
Three entry register list variation.

llvm-svn: 142876
 2011-10-24 23:26:05 +00:00
Jim Grosbach 3ea0657d54 ARM assembly parsing and encoding for VLD1 w/ writeback. 
One and two length register list variants.

llvm-svn: 142861
 2011-10-24 22:16:58 +00:00
Jim Grosbach 3adec13c3e Update test for r142801. 
llvm-svn: 142806
 2011-10-24 17:26:26 +00:00
Jim Grosbach 11c0b347c6 Assembly parsing for 4-register sequential variant of VLD2. 
llvm-svn: 142704
 2011-10-21 23:58:57 +00:00
Jim Grosbach 118b38cbf1 Assembly parsing for 2-register sequential variant of VLD2. 
llvm-svn: 142691
 2011-10-21 22:21:10 +00:00
Jim Grosbach 846bcff7c7 Assembly parsing for 4-register variant of VLD1. 
llvm-svn: 142682
 2011-10-21 20:35:01 +00:00
Jim Grosbach c4360fe575 Assembly parsing for 3-register variant of VLD1. 
llvm-svn: 142675
 2011-10-21 20:02:19 +00:00
Jim Grosbach 2f2e3c4737 ARM VLD parsing and encoding. 
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle
VLD1 instructions that take a two-register register list.

Adjust the instruction definitions to only have the single encoded register
as an operand. The super-register from the pseudo is kept as an implicit def,
so passes which come after pseudo-expansion still know that the instruction
defines the other subregs.

llvm-svn: 142670
 2011-10-21 18:54:25 +00:00
Owen Anderson 16c8fc5191 Revert r142618, r142622, and r142624, which were based on an incorrect reading of the ARMv7 docs. 
llvm-svn: 142626
 2011-10-20 22:23:58 +00:00
Owen Anderson 48da0ed477 Fix tests for corrected MSR encodings. 
llvm-svn: 142622
 2011-10-20 21:53:19 +00:00
Jim Grosbach 9036c5cf2b ARM VLD1/VST1 (one register, no writeback) assembly parsing and encoding. 
llvm-svn: 142583
 2011-10-20 15:04:25 +00:00
Jim Grosbach 3ad44e50b3 Tidy up formatting. 
llvm-svn: 142582
 2011-10-20 14:57:47 +00:00
Jim Grosbach 8db25984a9 ARM VTBX (one register) assembly parsing and encoding. 
llvm-svn: 142581
 2011-10-20 14:48:50 +00:00
Jim Grosbach 43f1d206b9 Tidy up formatting. 
llvm-svn: 142422
 2011-10-18 21:09:01 +00:00
Jim Grosbach 1f63e04b2c Tidy up formatting. 
llvm-svn: 142421
 2011-10-18 21:08:16 +00:00
Jim Grosbach 4e5c764b65 Enable more encoded immediate tests. 
llvm-svn: 142415
 2011-10-18 20:20:51 +00:00
Jim Grosbach 89f9e1dca4 More vmov lane testcases. 
llvm-svn: 142414
 2011-10-18 20:19:48 +00:00
Jim Grosbach e9f204c197 ARM vmla/vmls assembly parsing for the lane index operand. 
llvm-svn: 142413
 2011-10-18 20:14:56 +00:00
Jim Grosbach 712f3670fd ARM vmov assembly parsing for the lane index operand. 
llvm-svn: 142412
 2011-10-18 20:10:47 +00:00
Jim Grosbach 611450071c ARM vmla/vmls assembly parsing for the lane index operand. 
llvm-svn: 142389
 2011-10-18 18:27:07 +00:00
Owen Anderson 40ec1da2ab Another failing encoding. 
llvm-svn: 142388
 2011-10-18 18:23:03 +00:00
Jim Grosbach 32b83a4e16 Fix NEON mul encoding tests. Wrong file contents previously. 
llvm-svn: 142387
 2011-10-18 18:14:55 +00:00
Jim Grosbach c8eff0327a ARM vqdmulh assembly parsing for the lane index operand. 
llvm-svn: 142386
 2011-10-18 18:12:09 +00:00
Jim Grosbach d1bc6da657 Remove duplicate test. 
llvm-svn: 142383
 2011-10-18 18:05:50 +00:00
Jim Grosbach b3ecff77cd Tidy up formatting. 
llvm-svn: 142382
 2011-10-18 18:05:16 +00:00
Jim Grosbach e6fbca3a61 ARM vmul assembly parsing for the lane index operand. 
llvm-svn: 142381
 2011-10-18 18:01:52 +00:00
Jim Grosbach f416cb16c0 Tidy up. 
llvm-svn: 142380
 2011-10-18 18:01:09 +00:00
Owen Anderson c91064551a Add a few more testcases. 
llvm-svn: 142379
 2011-10-18 17:57:31 +00:00
Owen Anderson 2a498c1107 Add several FIXME cases for ARM encodings. 
llvm-svn: 142377
 2011-10-18 17:50:22 +00:00
Jim Grosbach 8206790ab0 Tests for 142365. 
llvm-svn: 142368
 2011-10-18 17:23:34 +00:00
Jim Grosbach 95135982cd Tidy up formatting. 
llvm-svn: 142367
 2011-10-18 17:22:53 +00:00
Jim Grosbach e4454e0de2 ARM assembly parsing and encoding for VMOV.i64. 
llvm-svn: 142356
 2011-10-18 16:18:11 +00:00
Jim Grosbach 8211c051ca ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32. 
llvm-svn: 142321
 2011-10-18 00:22:00 +00:00
Jim Grosbach 26bfc9e5da Enable a few more NEON immediate tests. 
llvm-svn: 142313
 2011-10-17 23:50:19 +00:00
Jim Grosbach cda32ae372 ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16. 
llvm-svn: 142303
 2011-10-17 23:09:09 +00:00
Jim Grosbach 741cd73aab ARM NEON "vmov.i8" immediate assembly parsing and encoding. 
NEON immediates are "interesting". Start of the work to handle parsing them
in an 'as' compatible manner. Getting the matcher to play nicely with
these and the floating point immediates from VFP is an extra fun wrinkle.

llvm-svn: 142293
 2011-10-17 22:26:03 +00:00
Owen Anderson 220f2643fa Update test for disabling of code/data marker labels in ELF. 
llvm-svn: 142003
 2011-10-14 21:12:55 +00:00
Jim Grosbach 54a20ed0f1 Thumb2 assembly parsing and encoding for LDC/STC. 
llvm-svn: 141811
 2011-10-12 20:54:17 +00:00
Jim Grosbach 84cf2b8c98 ARM encoding tests for STC. 
llvm-svn: 141787
 2011-10-12 17:36:13 +00:00
Jim Grosbach 483995875f ARM parsing and encoding for the <option> form of LDC/STC instructions. 
llvm-svn: 141786
 2011-10-12 17:34:41 +00:00
Jim Grosbach 9398141c48 ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions. 
Fill out the rest of the encoding information, update to properly mark
the LDC/STC instructions as predicable while the LDC2/STC2 instructions are
not, and adjust the parser accordingly.

llvm-svn: 141721
 2011-10-11 21:55:36 +00:00
Jim Grosbach c87d60a58c Enable ARM mode VDUP(scalar) tests. 
llvm-svn: 141447
 2011-10-07 23:57:03 +00:00
Jim Grosbach d0637bfc68 ARM NEON assembly parsing and encoding for VDUP(scalar). 
llvm-svn: 141446
 2011-10-07 23:56:00 +00:00
Jim Grosbach 0947102623 Tidy up tests. Un-XFAIL file and mark individual tests as FIXME instead. 
llvm-svn: 141321
 2011-10-06 22:04:05 +00:00
Jim Grosbach 4887469138 Fix and clean up tests. Un-XFAIL. 
llvm-svn: 141318
 2011-10-06 21:32:50 +00:00
Jim Grosbach ceb4c7523f Fix and clean up tests. Un-XFAIL. 
llvm-svn: 141316
 2011-10-06 21:28:30 +00:00
Owen Anderson 10c5b12f99 Support a valid, but not very useful, encoding of CPSIE where none of the AIF bits are set. 
llvm-svn: 141190
 2011-10-05 17:16:40 +00:00
Owen Anderson 0ca562ec4c Teach the MC to output code/data region marker labels in MachO and ELF modes. These are used by disassemblers to provide better disassembly, particularly on targets like ARM Thumb that like to intermingle data in the TEXT segment. 
llvm-svn: 141135
 2011-10-04 23:26:17 +00:00
Jim Grosbach 28a0bc5562 Tidy up formatting. 
llvm-svn: 141123
 2011-10-04 21:43:51 +00:00
Jim Grosbach 4879f70ab9 Un-XFAIL file. Comment out individual failing instructions. 
llvm-svn: 141117
 2011-10-04 21:16:42 +00:00
Jim Grosbach f3e1fc3f86 Tidy up formatting. 
llvm-svn: 141115
 2011-10-04 20:52:57 +00:00
Jim Grosbach 8a829e8ecb Un-XFAIL file. Fix incorrect CHECK lines. General format cleanup. 
llvm-svn: 141114
 2011-10-04 20:50:05 +00:00
Jim Grosbach 8bc8bfdcad Un-XFAIL file. Fix incorrect CHECK line. General format cleanup. 
llvm-svn: 141113
 2011-10-04 20:46:49 +00:00
Jim Grosbach 610aa62edc Tidy up formatting. 
llvm-svn: 141111
 2011-10-04 20:42:35 +00:00
Jim Grosbach 388c0f61e8 Un-XFAIL file. Fix incorrect CHECK line. 
llvm-svn: 141110
 2011-10-04 20:42:09 +00:00
Jim Grosbach 2644375abe Un-XFAIL the file. Disable only the individual tests that aren't working yet. 
llvm-svn: 141108
 2011-10-04 20:34:11 +00:00
Jim Grosbach 83e84faa8f Un-XFAIL the file. Disable only the individual tests that aren't working yet. 
llvm-svn: 141099
 2011-10-04 18:43:15 +00:00
Jim Grosbach 2d9eb707af Tidy up. Formatting. 
llvm-svn: 141096
 2011-10-04 17:49:45 +00:00
Jim Grosbach b85400aa58 Tidy up. These tests are covered in the .s file tests now. 
llvm-svn: 141047
 2011-10-03 23:40:13 +00:00
Jim Grosbach e7fbce7acb ARM assembly parsing and encoding for VMOV immediate. 
llvm-svn: 141046
 2011-10-03 23:38:36 +00:00
Jim Grosbach 46b6646059 ARM parsing/encoding for VCMP/VCMPE. 
llvm-svn: 141038
 2011-10-03 22:30:24 +00:00
Jim Grosbach 4ab23b5273 ARM assembly parsing and encoding for VMRS/FMSTAT. 
llvm-svn: 141025
 2011-10-03 21:12:43 +00:00
Jim Grosbach c3fc62b492 Update test for 141010. 
llvm-svn: 141022
 2011-10-03 20:58:08 +00:00
Jim Grosbach b817655b77 Tidy up a bit. Formatting. 
llvm-svn: 141010
 2011-10-03 17:59:31 +00:00
James Molloy 21efa7d6e1 Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.

llvm-svn: 140696
 2011-09-28 14:21:38 +00:00
Jim Grosbach c63af1b7b6 ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w. 
Add inst alias to handle these assembly forms. Add tests, too.

rdar://10178799

llvm-svn: 140647
 2011-09-27 22:18:54 +00:00
Owen Anderson d20cd25c69 Remove incorrect testcases. 
llvm-svn: 140572
 2011-09-26 22:13:55 +00:00
Owen Anderson 4916840eb8 Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset of #-0. 
llvm-svn: 140426
 2011-09-23 22:25:02 +00:00
Owen Anderson fbe52c0192 Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused. 
llvm-svn: 140284
 2011-09-21 23:53:44 +00:00
Jim Grosbach a316da1466 Nuke obsolete test file. 
llvm-svn: 140127
 2011-09-20 01:03:51 +00:00
Jim Grosbach c70d9dfaea Thumb2 assembly parsing and encoding for WFE/WFI/YIELD. 
llvm-svn: 140126
 2011-09-20 00:48:56 +00:00
Jim Grosbach b35198021a Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH. 
llvm-svn: 140125
 2011-09-20 00:46:54 +00:00
Jim Grosbach 5aaeb91ca6 Thumb2 assembly parsing and encoding for USUB8/USUB16. 
llvm-svn: 140120
 2011-09-20 00:31:57 +00:00
Jim Grosbach 716f17399e Thumb2 assembly parsing and encoding for USAX. 
llvm-svn: 140119
 2011-09-20 00:30:45 +00:00
Jim Grosbach 42f7b647fa Thumb2 assembly parsing and encoding for USAT16. 
llvm-svn: 140118
 2011-09-20 00:28:25 +00:00
Jim Grosbach e0493ade65 Thumb2 assembly parsing and encoding for USAT. 
llvm-svn: 140117
 2011-09-20 00:27:36 +00:00
Jim Grosbach e65c2ab453 Tidy up. 
llvm-svn: 140114
 2011-09-20 00:24:37 +00:00
Jim Grosbach db6d378f80 Thumb2 assembly parsing and encoding for UQSAD8/USADA8. 
llvm-svn: 140113
 2011-09-20 00:23:51 +00:00
Jim Grosbach 6286f75161 Thumb2 assembly parsing and encoding for UQSUB16/UQSUB8. 
llvm-svn: 140112
 2011-09-20 00:20:44 +00:00
Jim Grosbach 62f8eee0eb Thumb2 assembly parsing and encoding for UQASX/UQSAX. 
llvm-svn: 140111
 2011-09-20 00:18:52 +00:00
Jim Grosbach 4b0e7d9457 Thumb2 assembly parsing and encoding for UQADD16/UQADD8. 
llvm-svn: 140110
 2011-09-20 00:15:03 +00:00
Jim Grosbach 788a8cd4e6 Tidy up a bit. 
llvm-svn: 140096
 2011-09-19 23:34:18 +00:00
Jim Grosbach fc5451832a Thumb2 assembly parsing and encoding for UMAAL/UMLAL/UMULL. 
llvm-svn: 140095
 2011-09-19 23:31:02 +00:00
Jim Grosbach 1ab5e56324 Thumb2 assembly parsing and encoding for UHSUB16/UHSUB8. 
llvm-svn: 140089
 2011-09-19 23:15:36 +00:00
Jim Grosbach 15d97fd89b Thumb2 assembly parsing and encoding for UHASX/UHSAX. 
llvm-svn: 140088
 2011-09-19 23:13:25 +00:00
Jim Grosbach 3a64050470 Thumb2 assembly parsing and encoding for UHADD16/UHADD8. 
llvm-svn: 140087
 2011-09-19 23:08:24 +00:00
Jim Grosbach dd00b9f452 Thumb2 assembly parsing and encoding for UBFX. 
llvm-svn: 140086
 2011-09-19 23:06:38 +00:00
Jim Grosbach a6e6504e2a Thumb2 assembly parsing and encoding for UASX. 
llvm-svn: 140085
 2011-09-19 23:05:22 +00:00
Jim Grosbach f5028fd141 Fix copy/past-o. Gotta remember that 'modify' step... 
llvm-svn: 140082
 2011-09-19 22:53:00 +00:00
Jim Grosbach c704263440 Thumb2 assembly parsing and encoding for UADD16/UADD8. 
llvm-svn: 140081
 2011-09-19 22:52:27 +00:00
Jim Grosbach c74e2c3b07 Thumb2 assembly parsing and encoding for TST. 
llvm-svn: 140080
 2011-09-19 22:46:06 +00:00
Jim Grosbach 05541f45f3 Thumb2 assembly parsing and encoding for TBB/TBH. 
llvm-svn: 140078
 2011-09-19 22:21:13 +00:00
Jim Grosbach 52faf4bff9 Thumb2 assembly parsing and encoding for TEQ. 
llvm-svn: 140070
 2011-09-19 21:41:21 +00:00
Jim Grosbach ee9ff79319 Remove FIXME. TBB/TBH are Thumb mode only instructions. 
llvm-svn: 140048
 2011-09-19 20:30:29 +00:00
Jim Grosbach 8221319707 Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH. 
llvm-svn: 140047
 2011-09-19 20:29:33 +00:00
Jim Grosbach 264abdecf0 Thumb2 assembly parsing and encoding for SXTAB/SXTAB16/SXTAH. 
llvm-svn: 140029
 2011-09-19 17:56:37 +00:00
Jim Grosbach ec7c23eed3 Thumb2 assembly parsing and encoding for SVC. 
llvm-svn: 140025
 2011-09-19 17:40:35 +00:00
Jim Grosbach aa4c0d3986 Thumb2 assembly parsing and encoding for SUB(register). 
llvm-svn: 140024
 2011-09-19 17:37:48 +00:00
Jim Grosbach d0c435c23c Thumb2 assembly parsing and encoding for SUB(immediate). 
llvm-svn: 139966
 2011-09-16 22:58:42 +00:00
Jim Grosbach 45715a7b9d Thumb2 assembly parsing and encoding for STRT. 
llvm-svn: 139963
 2011-09-16 22:27:12 +00:00
Jim Grosbach 0876856aa0 Thumb2 assembly parsing and encoding for LDRHT/STRHT. 
llvm-svn: 139962
 2011-09-16 22:26:01 +00:00
Jim Grosbach 5c06de5bb9 Thumb2 assembly parsing and encoding for STREX/STREXB/STREXH/STREXD. 
llvm-svn: 139961
 2011-09-16 22:22:07 +00:00
Jim Grosbach bb24913d7b Thumb2 assembly parsing and encoding for STRD. 
llvm-svn: 139960
 2011-09-16 22:19:38 +00:00
Jim Grosbach dfb9c30319 Simplify comment. There's no Thumb LDRD(register) encoding. That's ARM only. 
llvm-svn: 139959
 2011-09-16 22:18:42 +00:00
Jim Grosbach c0f032a570 Thumb2 assembly parsing and encoding for STRBT. 
llvm-svn: 139957
 2011-09-16 22:15:51 +00:00
Jim Grosbach a46765300d Thumb2 assembly parsing and encoding for STRH. 
llvm-svn: 139956
 2011-09-16 22:12:19 +00:00
Jim Grosbach d372cb7312 Remove test of undocumented format. 
llvm-svn: 139955
 2011-09-16 22:09:58 +00:00
Jim Grosbach 85348bd8cd Thumb2 assembly parsing and encoding for STRB. 
llvm-svn: 139954
 2011-09-16 22:09:19 +00:00
Jim Grosbach b0c04e7335 Shuffle a few more thumb2 tests to match the comment headings. 
llvm-svn: 139952
 2011-09-16 22:01:18 +00:00
Jim Grosbach 21a073e4d3 Thumb2 tests for STR(literal), STR(register) and STR pre/post indexed immediate. 
llvm-svn: 139951
 2011-09-16 21:59:13 +00:00
Jim Grosbach 42042e405a Shuffle a few tests around. 
llvm-svn: 139950
 2011-09-16 21:57:10 +00:00
Jim Grosbach 92606beeae Thumb2 assembly parsing and encoding for STR(immediate). 
Add aliases for STRB/STRH while there. Tests forthcoming for those.

llvm-svn: 139942
 2011-09-16 21:06:12 +00:00
Jim Grosbach bb9825ffe3 Thumb2 assembly parsing and encoding for STMDB. 
llvm-svn: 139940
 2011-09-16 20:58:38 +00:00
Jim Grosbach 099c9767c3 Thumb2 assembly parsing and encoding for STMIA. 
llvm-svn: 139938
 2011-09-16 20:50:13 +00:00
Jim Grosbach 4646a740ab Thumb2 assembly parsing and encoding for SSUB16/SSUB8. 
llvm-svn: 139931
 2011-09-16 18:52:36 +00:00
Jim Grosbach 8aee874bf1 Thumb2 assembly parsing and encoding for SSAX. 
llvm-svn: 139929
 2011-09-16 18:37:10 +00:00
Jim Grosbach 2a2d50b7ad Thumb2 assembly parsing and encoding for SSAT16. 
llvm-svn: 139927
 2011-09-16 18:33:22 +00:00
Jim Grosbach 9d9c99ff07 Thumb2 assembly parsing and encoding for SSAT. 
llvm-svn: 139926
 2011-09-16 18:32:30 +00:00
Jim Grosbach e6e7cd146a Thumb2 assembly parsing and encoding for SRS. 
llvm-svn: 139925
 2011-09-16 18:25:22 +00:00
Jim Grosbach 5d1d50b8f7 Thumb2 assembly parsing and encoding for SMMUSD/SMUSDX. 
llvm-svn: 139923
 2011-09-16 18:08:48 +00:00
Jim Grosbach 0f90d9e161 Thumb2 assembly parsing and encoding for SMMULWB/SMULWT. 
llvm-svn: 139922
 2011-09-16 18:07:18 +00:00
Jim Grosbach d73c6458de Thumb2 assembly parsing and encoding for SMMULL. 
llvm-svn: 139921
 2011-09-16 18:05:48 +00:00
Jim Grosbach 4eea5d6284 Fix comment. 
llvm-svn: 139919
 2011-09-16 18:03:00 +00:00
Jim Grosbach 8e968d996b Thumb2 assembly parsing and encoding for SMULBB/SMULBT/SMULTB/SMULTT. 
llvm-svn: 139918
 2011-09-16 18:02:36 +00:00
Jim Grosbach 8124284140 Thumb2 assembly parsing and encoding for SMMUAD'dib. 
llvm-svn: 139917
 2011-09-16 17:58:21 +00:00
Jim Grosbach 601597f329 Thumb2 assembly parsing and encoding for SMMUL/SMMULR. 
llvm-svn: 139916
 2011-09-16 17:56:06 +00:00
Jim Grosbach 1adc9c103c Thumb2 assembly parsing and encoding for SMMLS/SMMLSR. 
llvm-svn: 139911
 2011-09-16 17:16:55 +00:00
Jim Grosbach ffec9d7bd5 Thumb2 assembly parsing and encoding for SMMLA/SMMLAR. 
llvm-svn: 139910
 2011-09-16 17:15:18 +00:00
Jim Grosbach c1826a9de0 Thumb2 assembly parsing and encoding for SMLSLD/SMLSLDX. 
llvm-svn: 139909
 2011-09-16 17:10:44 +00:00
Jim Grosbach 92738fe1b4 Thumb2 assembly parsing and encoding for SMLSD/SMLSDX. 
llvm-svn: 139908
 2011-09-16 17:08:45 +00:00
Jim Grosbach 53bc90d190 Thumb2 assembly parsing and encoding for SMLAWB/SMLAWT. 
llvm-svn: 139907
 2011-09-16 17:03:01 +00:00
Jim Grosbach 7a0b90b187 Thumb2 assembly parsing and encoding for SMLALD/SMLALDX. 
llvm-svn: 139906
 2011-09-16 16:58:03 +00:00
Jim Grosbach e0891d6915 Thumb2 assembly parsing and encoding for SMLALBB/SMLALBT/SMLALTB/SMLALTT. 
llvm-svn: 139905
 2011-09-16 16:53:25 +00:00
Jim Grosbach f9799d2c2d Thumb2 assembly parsing and encoding for SMLAL. 
llvm-svn: 139902
 2011-09-16 16:38:00 +00:00
Jim Grosbach b1feced676 Thumb2 assembly parsing and encoding for SMLAD/SMLADX. 
llvm-svn: 139884
 2011-09-16 00:09:37 +00:00
Jim Grosbach 5798cfddd7 Thumb2 assembly parsing and encoding for SMLABB/SMLABT/SMLATB/SMLATT. 
llvm-svn: 139881
 2011-09-16 00:00:23 +00:00
Jim Grosbach 6568ab142e Thumb2 assembly parsing and encoding for SHSUB16/SHSUB8. 
llvm-svn: 139880
 2011-09-15 23:58:56 +00:00
Jim Grosbach c38642b3e1 Thumb2 assembly parsing and encoding for SHADD16/SHADD8. 
llvm-svn: 139871
 2011-09-15 22:36:10 +00:00
Jim Grosbach b08ce9b4c4 Thumb2 assembly parsing and encoding for SHASX/SHSAX. 
llvm-svn: 139870
 2011-09-15 22:34:29 +00:00
Jim Grosbach e2481db60f Thumb2 assembly parsing and encoding for SEV.W. 
llvm-svn: 139866
 2011-09-15 22:24:20 +00:00
Jim Grosbach 9086a1ed4e Thumb2 assembly parsing and encoding for SEL. 
llvm-svn: 139861
 2011-09-15 22:01:09 +00:00
Jim Grosbach 0be3ede9e1 Thumb2 assembly parsing and encoding for SBFX. 
llvm-svn: 139858
 2011-09-15 21:58:42 +00:00
Jim Grosbach d2868cf016 Add some missing 'CHECK' lines and tidy up others. 
llvm-svn: 139849
 2011-09-15 21:17:38 +00:00
Jim Grosbach 8620d97ad9 Thumb2 assembly parsing and encoding for SBC. 
llvm-svn: 139844
 2011-09-15 21:04:10 +00:00
Jim Grosbach 10725a202b Thumb2 assembly parsing and encoding for SASX. 
llvm-svn: 139843
 2011-09-15 21:01:23 +00:00
Jim Grosbach 4e91164049 Thumb2 assembly parsing and encoding for SADD16/SADD8. 
llvm-svn: 139841
 2011-09-15 20:57:39 +00:00
Jim Grosbach eaa5265285 Thumb2 assembly parsing and encoding for RSB. 
llvm-svn: 139839
 2011-09-15 20:54:14 +00:00
Jim Grosbach 82dd698575 Thumb2 assembly parsing and encoding for RRX. 
llvm-svn: 139831
 2011-09-15 19:52:43 +00:00
Jim Grosbach 8082169d7c Thumb2 assembly parsing and encoding for ROR. 
llvm-svn: 139830
 2011-09-15 19:50:04 +00:00
Jim Grosbach 4cbe06e7f8 Thumb2 assembly parsing and encoding for REV16/REVSH. 
llvm-svn: 139828
 2011-09-15 19:46:13 +00:00
Jim Grosbach ab154f0b65 Thumb2 assembly parsing and encoding for REV. 
llvm-svn: 139813
 2011-09-15 18:13:30 +00:00
Jim Grosbach 5c5c42bf76 Thumb2 assembly parsing and encoding for RBIT. 
llvm-svn: 139811
 2011-09-15 18:07:14 +00:00
Jim Grosbach 5e18a31da4 Thumb2 assembly parsing and encoding for signed saturating arithmetic insns. 
llvm-svn: 139810
 2011-09-15 18:06:15 +00:00
Jim Grosbach 3661859214 Re-order test. 
llvm-svn: 139795
 2011-09-15 16:04:13 +00:00
Jim Grosbach 16680e1d33 Thumb2 assembly parsing and encoding for PLI. 
llvm-svn: 139757
 2011-09-14 23:29:05 +00:00
Jim Grosbach 2e2f6db24b Thumb2 assembly parsing and encoding for PLD. 
llvm-svn: 139756
 2011-09-14 23:26:12 +00:00
Jim Grosbach 801e06b768 Thumb2 assembly parsing and encoding for PKH. 
llvm-svn: 139754
 2011-09-14 23:16:41 +00:00
Owen Anderson d7791b961c Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs. 
llvm-svn: 139747
 2011-09-14 22:46:14 +00:00
Jim Grosbach 61326e08ec Thumb2 assembly parsing and encoding for ORR. 
llvm-svn: 139742
 2011-09-14 21:43:57 +00:00
Jim Grosbach 1fdddf767f Thumb2 assembly parsing and encoding for ORN. 
llvm-svn: 139741
 2011-09-14 21:29:54 +00:00
Jim Grosbach 36acc8e984 Thumb2 assembly parsing and encoding for NOP.W. 
llvm-svn: 139740
 2011-09-14 21:26:25 +00:00
Jim Grosbach 752d6fd529 Thumb2 assembly parsing and encoding for MVN. 
llvm-svn: 139739
 2011-09-14 21:24:41 +00:00
Jim Grosbach 9c8b9932d6 Thumb2 assembly parsing and encoding for MUL. 
llvm-svn: 139735
 2011-09-14 21:00:40 +00:00
Jim Grosbach 0ecd395095 Thumb2 assembly parsing and encoding for MSR/MRS. 
Fix a bug in handling default flags for both ARM and Thumb encodings.

llvm-svn: 139721
 2011-09-14 20:03:46 +00:00
Jim Grosbach e9d80bbc1d Thumb2 assembly parsing and encoding for MRC/MRC2/MRRC/MRRC2. 
llvm-svn: 139717
 2011-09-14 19:28:49 +00:00
Jim Grosbach c39c2dfe15 Thumb2 assembly parsing and encoding for MOVT. 
llvm-svn: 139715
 2011-09-14 19:15:15 +00:00
Jim Grosbach 18b8b17579 Thumb2 assembly parsing for MOV in IT block. 
Select the right 16 vs. 32 bit encoding in an IT block.

llvm-svn: 139714
 2011-09-14 19:12:11 +00:00
Jim Grosbach 3ac26b138b ARM fix assembly parser handling of ranges in register lists. 
Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.

rdar://8883573

llvm-svn: 139707
 2011-09-14 18:08:35 +00:00
Owen Anderson 44ae2da4ec Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally. 
llvm-svn: 139610
 2011-09-13 17:59:19 +00:00
Owen Anderson c3c60a0882 Fix encoding of Thumb2 shifted register operands with RRX shifts. 
llvm-svn: 139606
 2011-09-13 17:34:32 +00:00
Owen Anderson 1b7090c9b3 Fix a failing ELF Thumb test. I _think_ this is right, but it's not totally clear to me what this test is doing. Could someone on an ELF platform check? 
llvm-svn: 139549
 2011-09-12 22:40:31 +00:00
Owen Anderson 4a9eb5f8dc Fix encoding of PC-relative LDRSHW with an immediate offset. 
llvm-svn: 139537
 2011-09-12 20:36:51 +00:00
Jim Grosbach b908b7af31 Thumb2 parsing and encoding for MOV(immediate). 
Some aliases for MOV(register) also to keep existing T1 tests happy when
run in thumbv7 mode.

llvm-svn: 139440
 2011-09-10 00:15:36 +00:00
Owen Anderson 5bfb0e0a85 Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands. 
llvm-svn: 139422
 2011-09-09 22:24:36 +00:00
Owen Anderson 29cfe6c368 Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches. 
llvm-svn: 139415
 2011-09-09 21:48:23 +00:00
Jim Grosbach 62c33955e2 Thumb2 assembly parsing and encoding for MLA and MLS. 
llvm-svn: 139399
 2011-09-09 20:24:45 +00:00
Jim Grosbach b4c32d92ea Thumb2 assembly parsing and encoding for MCR, MCR2, MCRR, MCRR2. 
llvm-svn: 139397
 2011-09-09 20:19:28 +00:00
Jim Grosbach 54175d519e Tidy up formatting a bit. 
llvm-svn: 139396
 2011-09-09 20:17:49 +00:00
Jim Grosbach 89b1775256 Thumb2 assembly parsing and encoding for LSL. 
llvm-svn: 139395
 2011-09-09 20:05:38 +00:00
Jim Grosbach 2119a62aae Thumb2 assembly parsing and encoding for LDRT. 
llvm-svn: 139393
 2011-09-09 20:02:15 +00:00
Jim Grosbach 9b11580719 Thumb2 assembly parsing and encoding for LDRSHT. 
llvm-svn: 139392
 2011-09-09 20:01:18 +00:00
Jim Grosbach d2165b829f Thumb2 assembly parsing and encoding for LDRSH. 
llvm-svn: 139391
 2011-09-09 19:54:30 +00:00
Jim Grosbach f1b71de4ea Thumb2 assembly parsing and encoding for LDRSBT. 
llvm-svn: 139390
 2011-09-09 19:49:06 +00:00
Jim Grosbach 779a2bee7b Thumb2 assembly parsing and encoding for LDRSB. 
llvm-svn: 139389
 2011-09-09 19:42:40 +00:00
Jim Grosbach 5af572426d Thumb2 assembly parsing and encoding for LDRH. 
llvm-svn: 139386
 2011-09-09 19:13:53 +00:00
Jim Grosbach 732f90a61c Shuffle a bit. 
llvm-svn: 139385
 2011-09-09 19:09:54 +00:00
Jim Grosbach a05627ebaf Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. 
llvm-svn: 139381
 2011-09-09 18:37:27 +00:00
Jim Grosbach a042ed5cae Add FIXME. 
llvm-svn: 139371
 2011-09-09 16:45:31 +00:00
Jim Grosbach 7db8d697cf Thumb2 assembly parsing and encoding for LDRD(immediate). 
Refactor operand handling for STRD as well. Tests for that forthcoming.

llvm-svn: 139322
 2011-09-08 22:07:06 +00:00
Jim Grosbach 69a4def038 Add tests for Thumb2 LDRB indexed addressing w/ writeback. 
llvm-svn: 139292
 2011-09-08 16:49:36 +00:00
Jim Grosbach 3343da5424 Thumb2 assembly parsing and encoding for LDR post-indexed. 
More cleanup of the general indexed addressing T2 instructions. Still more to
do, especially for stores.

llvm-svn: 139272
 2011-09-08 01:01:32 +00:00
Jim Grosbach c086f689f8 Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback. 
Adjust encoding of writeback load/store instructions to better reflect the
way the operand types are represented.

llvm-svn: 139270
 2011-09-08 00:39:19 +00:00
Jim Grosbach 2392c53e73 Thumb2 assembly parsing and encoding for LDRBT. 
llvm-svn: 139267
 2011-09-07 23:39:14 +00:00
Jim Grosbach f40ca22cd3 Thumb2 assembly parsing and encoding for LDRB(register). 
llvm-svn: 139266
 2011-09-07 23:17:00 +00:00
Jim Grosbach e0ebc1c396 Thumb2 assembly parsing and encoding for LDR(register). 
llvm-svn: 139264
 2011-09-07 23:10:15 +00:00
Jim Grosbach c8e3656b43 Thumb2 assembly parsing and encoding for LDRB(immediate). 
llvm-svn: 139258
 2011-09-07 21:41:25 +00:00
Jim Grosbach e2d68844bc Thumb2 assembly parsing and encoding for LDR(literal). 
Need branch relocation support to distinguish this encoding from the
16-bit Thumb1 encoding w/o the explicit .w suffix. That comes later, though.

llvm-svn: 139257
 2011-09-07 21:33:16 +00:00
Jim Grosbach fed3ab5bc1 Add tests for Thumb2 LDR(immediate) from r139254. 
llvm-svn: 139255
 2011-09-07 21:06:46 +00:00
Jim Grosbach 1c7406767e Thumb2 parsing and encoding for LDMDB. 
llvm-svn: 139251
 2011-09-07 19:57:53 +00:00
Jim Grosbach a31f223af8 Thumb2 parsing and encoding for LDMIA. 
Choose 32-bit vs. 16-bit encoding when there's no .w suffix in post-processing
as match classes are insufficient to handle the context-sensitiveness of
the writeback operand's legality for the 16-bit encodings.

llvm-svn: 139242
 2011-09-07 18:05:34 +00:00
Jim Grosbach 83a6188f18 Thumb2 parsing and encoding for ISB. 
llvm-svn: 139200
 2011-09-06 22:53:27 +00:00
Jim Grosbach 958feffa11 Thumb2 parsing and encoding for EOR. 
llvm-svn: 139199
 2011-09-06 22:44:50 +00:00
Jim Grosbach ed9399995a Thumb2 parsing and encoding for DSB. 
llvm-svn: 139194
 2011-09-06 22:19:40 +00:00
Jim Grosbach e95f46384e Thumb2 parsing and encoding for DMB. 
llvm-svn: 139193
 2011-09-06 22:14:58 +00:00
Jim Grosbach c048b905b4 Thumb2 parsing and encoding for DBG. 
llvm-svn: 139191
 2011-09-06 22:06:40 +00:00
Jim Grosbach 565e2f5752 Thumb2 parsing and encoding for CMN and CMP. 
llvm-svn: 139188
 2011-09-06 21:44:58 +00:00
Jim Grosbach 70532e289f Thumb2 parsing and encoding for CLZ. 
llvm-svn: 139177
 2011-09-06 20:44:17 +00:00
Jim Grosbach 803898f119 Thumb2 parsing and encoding for CLREX. 
llvm-svn: 139172
 2011-09-06 20:27:04 +00:00
Jim Grosbach 6952281037 Thumb2 parsing and encoding for CDP/CDP2. 
llvm-svn: 139168
 2011-09-06 20:12:23 +00:00
Jim Grosbach f347d1d772 Thumb2 parsing and encoding for CBZ/CBNZ. 
llvm-svn: 139054
 2011-09-02 23:46:10 +00:00
Jim Grosbach 34842ceb97 Thumb2 parsing and encoding for BXJ. 
llvm-svn: 139053
 2011-09-02 23:43:09 +00:00
Jim Grosbach 9e55023ca7 Thumb2 parsing and encoding for BIC. 
llvm-svn: 139052
 2011-09-02 23:37:54 +00:00
Jim Grosbach 93e3fd29b2 Thumb2 parsing and encoding for BFI. 
llvm-svn: 139051
 2011-09-02 23:28:46 +00:00
Jim Grosbach be31448d99 Thumb2 parsing and encoding for BFC. 
llvm-svn: 139050
 2011-09-02 23:25:46 +00:00
Jim Grosbach a0d34d3b5e Thumb2 parsing and encoding of B instruction. 
Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.

llvm-svn: 139049
 2011-09-02 23:22:08 +00:00
Jim Grosbach a216debb37 Thumb2 parsing and encoding for ASR. 
For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.

llvm-svn: 139040
 2011-09-02 21:28:54 +00:00
Jim Grosbach 370e923434 Thumb2 parsing and encoding for AND (register). 
llvm-svn: 139021
 2011-09-02 18:41:35 +00:00
Jim Grosbach 2761155203 Thumb2 parsing and encoding for ADD (register). 
llvm-svn: 139017
 2011-09-02 18:14:46 +00:00
Jim Grosbach b861b2b475 Tests for Thumb2 AND (immediate) instruction. 
llvm-svn: 139013
 2011-09-02 17:44:27 +00:00
Jim Grosbach c302f5cce7 Add FIXME. Thumb2 ADR encoding choice is non-trivial. 
llvm-svn: 139008
 2011-09-02 17:21:59 +00:00
Jim Grosbach f6d5d60f99 ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code. 
llvm-svn: 138952
 2011-09-01 18:22:13 +00:00
Owen Anderson 35d240f9e8 t2Bcc is allowed to have a predicate without a preceding IT instruction. 
llvm-svn: 138946
 2011-09-01 17:47:45 +00:00
Jim Grosbach 1d3c137839 Thumb2 assembly parsing and encoding for ADD(immediate). 
llvm-svn: 138922
 2011-09-01 00:28:52 +00:00
Owen Anderson a455a0b1e7 Fix encoding for tBcc with immediate offset operand. 
llvm-svn: 138889
 2011-08-31 20:26:14 +00:00
Jim Grosbach 6a69d6902f Run the Thumb1 parser tests in Thumb2 mode, as well. 
Thumb2 is a superset of Thumb1, so all of the encodings should still work.

llvm-svn: 138883
 2011-08-31 19:50:28 +00:00
Jim Grosbach 6eb213c919 Thumb NOP encoding varies depending on ARCH revision. 
llvm-svn: 138876
 2011-08-31 18:35:46 +00:00
Owen Anderson 5c160fd243 Fix roundtripping of Thumb BL/BLX instructions with immediate offsets instead of labels. 
llvm-svn: 138874
 2011-08-31 18:30:20 +00:00
Jim Grosbach af8c3cc710 Thumb2 parsing and encoding for ADC(register). 
Also add instruction aliases for non-.w versions of SBC since they're the
same.

llvm-svn: 138871
 2011-08-31 18:23:08 +00:00