Chris Lattner
68e62a5184
Allow jit-beta to work
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llvm-svn: 25578
2006-01-24 04:50:48 +00:00
Chris Lattner
de02d7727f
Add explicit #includes of <iostream>
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llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Evan Cheng
468fecdc99
Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual).
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Some assemblers can't recognize the aliases.
llvm-svn: 25494
2006-01-21 02:55:41 +00:00
Chris Lattner
335b46dd20
LowerReturn now doesn't have to handle f32 returns.
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llvm-svn: 25484
2006-01-20 18:41:25 +00:00
Evan Cheng
0c5de2864f
Stop doing that accidental commit.
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llvm-svn: 25474
2006-01-20 01:14:05 +00:00
Evan Cheng
cce748d316
A few more SH{L|R}D peepholes.
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llvm-svn: 25473
2006-01-20 01:13:30 +00:00
Evan Cheng
9c30bd5e25
Didn't mean to commit the last one.
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llvm-svn: 25469
2006-01-19 23:27:08 +00:00
Evan Cheng
8591b9f254
Added i16 SH{L|R}D patterns.
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llvm-svn: 25468
2006-01-19 23:26:24 +00:00
Evan Cheng
3d2cc7e2e9
Avoid generating a redundant setcc.
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llvm-svn: 25457
2006-01-19 08:52:46 +00:00
Evan Cheng
91007126c2
adc and sbb need an incoming flag to ensure it reads the carry flag
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from add / sub.
llvm-svn: 25444
2006-01-19 06:53:20 +00:00
Evan Cheng
a7bfbe996e
Two peepholes:
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(or (x >> c) | (y << (32 - c))) ==> (shrd x, y, c)
(or (x << c) | (y >> (32 - c))) ==> (shld x, y, c)
llvm-svn: 25438
2006-01-19 01:56:29 +00:00
Evan Cheng
6135a7a546
Didn't mean to check that in.
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llvm-svn: 25436
2006-01-19 01:52:56 +00:00
Evan Cheng
267ba5965e
A obvious typo
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llvm-svn: 25435
2006-01-19 01:46:14 +00:00
Evan Cheng
621674a19d
SRA shift amount must be in i8
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llvm-svn: 25416
2006-01-18 09:26:46 +00:00
Evan Cheng
4b3774e0a2
If a call return type is i1, insert a truncate from X86::AL to i1.
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llvm-svn: 25415
2006-01-18 08:08:38 +00:00
Evan Cheng
feaed4d107
Fix lowering of calls which return f32 values.
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llvm-svn: 25413
2006-01-17 21:58:21 +00:00
Evan Cheng
14417ed99c
Zero extending load from i1 to i8.
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llvm-svn: 25391
2006-01-17 07:02:46 +00:00
Evan Cheng
0d5b69f734
SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom
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expand it), so ask legalizer to expand i32 UINT_TO_FP.
llvm-svn: 25386
2006-01-17 02:32:49 +00:00
Evan Cheng
561881f30a
Added a FIXME comment about why FST is currently flagged to fpGETRESULT.
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llvm-svn: 25381
2006-01-17 00:37:42 +00:00
Evan Cheng
bec9d720b0
Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should
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read a flag.
llvm-svn: 25378
2006-01-17 00:19:47 +00:00
Evan Cheng
c14bb1026b
More typo's
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llvm-svn: 25375
2006-01-16 23:26:53 +00:00
Evan Cheng
64eeed27d9
Some typo's
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llvm-svn: 25374
2006-01-16 22:48:46 +00:00
Evan Cheng
911c68d7a8
Fix FP_TO_INT**_IN_MEM lowering.
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llvm-svn: 25368
2006-01-16 21:21:29 +00:00
Chris Lattner
b2eacf48aa
transfer some notes from my email to somewhere useful.
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llvm-svn: 25361
2006-01-16 17:53:00 +00:00
Evan Cheng
2494ce49f0
Added patterns for 8-bit multiply
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llvm-svn: 25338
2006-01-15 10:05:20 +00:00
Chris Lattner
78c358d1ad
Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
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llvm-svn: 25333
2006-01-15 09:00:21 +00:00
Chris Lattner
8869c6f782
silence a warning
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llvm-svn: 25322
2006-01-14 20:11:13 +00:00
Nate Begeman
2fba8a3aaa
bswap implementation
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llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Evan Cheng
3bc25e8a54
A typo.
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llvm-svn: 25307
2006-01-14 01:18:49 +00:00
Evan Cheng
392c7d2779
Add truncstore i1 patterns.
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llvm-svn: 25296
2006-01-13 21:45:19 +00:00
Chris Lattner
5f9c134bac
Fix a bug in my last X86 checkin, pointed out by cozmic
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llvm-svn: 25293
2006-01-13 20:19:44 +00:00
Evan Cheng
dba84bbc1e
LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be
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flipped around.
llvm-svn: 25290
2006-01-13 19:51:46 +00:00
Chris Lattner
1a8d918ef1
Enable X86 support for savestack/restorestack
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llvm-svn: 25278
2006-01-13 18:00:54 +00:00
Chris Lattner
8e2f52e645
expand unsupported stacksave/stackrestore nodes
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llvm-svn: 25272
2006-01-13 02:42:53 +00:00
Evan Cheng
f00374e4a8
Minor update.
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llvm-svn: 25263
2006-01-13 01:20:42 +00:00
Evan Cheng
d7faa4bae1
More typo's. I need new eye glasses...
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llvm-svn: 25261
2006-01-13 01:17:24 +00:00
Evan Cheng
731423f36a
Oops. Typo.
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llvm-svn: 25260
2006-01-13 01:06:49 +00:00
Evan Cheng
fb22e86c4d
Fix a SETCC / BRCOND folding bug.
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llvm-svn: 25259
2006-01-13 01:03:02 +00:00
Evan Cheng
6305e50ee1
Fix sint_to_fp (fild*) support.
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llvm-svn: 25257
2006-01-12 22:54:21 +00:00
Evan Cheng
c993d4522d
Specify transformation from GlobalAddress to TargetGlobalAddress and
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ExternalSymbol to TargetExternalSymbol.
llvm-svn: 25253
2006-01-12 19:36:31 +00:00
Evan Cheng
84dc9b55f0
X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be
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linked together).
llvm-svn: 25247
2006-01-12 08:27:59 +00:00
Evan Cheng
b94db9e9a4
* Materialize GlobalAddress and ExternalSym with MOV32ri rather than
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LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.
llvm-svn: 25246
2006-01-12 07:56:47 +00:00
Evan Cheng
6d2ab04463
Added ROTL and ROTR.
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llvm-svn: 25232
2006-01-11 23:20:05 +00:00
Evan Cheng
ae986f1f1e
Support for MEMCPY and MEMSET.
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llvm-svn: 25226
2006-01-11 22:15:48 +00:00
Evan Cheng
2ae799aff0
Select DYNAMIC_STACKALLOC
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llvm-svn: 25225
2006-01-11 22:15:18 +00:00
Nate Begeman
1b8121b227
Add bswap, rotl, and rotr nodes
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Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Evan Cheng
bc7a0f44bd
* Add special entry code main() (to set x87 to 64-bit precision).
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* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
call parmater passing.
llvm-svn: 25207
2006-01-11 06:09:51 +00:00
Chris Lattner
7c551268d0
implement FP_REG_KILL insertion for the dag-dag instruction selector
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llvm-svn: 25192
2006-01-11 01:15:34 +00:00
Chris Lattner
29852a58b0
Fit into 80 cols
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llvm-svn: 25191
2006-01-11 00:46:55 +00:00
Evan Cheng
339edad775
SSE cmov support.
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llvm-svn: 25190
2006-01-11 00:33:36 +00:00