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Author SHA1 Message Date
Jan Vesely b283ea0f0f AMDGPU/GCN: Promote i16 ctpop 
i16 capable ASICs do not support i16 operands for this instruction.
Add tablegen pattern to merge chained i16 additions.

Differential Revision: https://reviews.llvm.org/D43985

llvm-svn: 326535
 2018-03-02 02:50:22 +00:00