e91900097e
Fix PR4533, which is about buggy codegen in x86-64 -static mode.
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Basically, using:
lea symbol(%rip), %rax
is not valid in -static mode, because the current RIP may not be
within 32-bits of "symbol" when an app is built partially pic and
partially static. The fix for this is to compile it to:
lea symbol, %rax
It would be better to codegen this as:
movq $symbol, %rax
but that will come next.
The hard part of fixing this bug was fixing abi-isel, which was actively
testing for the wrong behavior. Also, the RUN lines are completely impossible
to understand what they are testing. To help with this, convert the -static
x86-64 codegen tests to use filecheck. This is much more stable and makes it
more clear what the codegen is expected to be.
llvm-svn: 75382
2009-07-11 20:29:19 +00:00
20adc670b2
We get the P modifier wrong in a lot of cases, just add some more rigorous testing.
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In addition to fixing this, I still need to do some more testing on darwin.
llvm-svn: 75362
2009-07-11 08:30:22 +00:00
017288a4fc
Don't put IT instruction before conditional branches.
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llvm-svn: 75361
2009-07-11 07:26:20 +00:00
0794c6a083
Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible.
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llvm-svn: 75360
2009-07-11 07:08:13 +00:00
cd4cdd1157
Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically.
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A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.
llvm-svn: 75359
2009-07-11 06:43:01 +00:00
e3c4765bac
convert test to use FileCheck, which is much more precise and faster than
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the previous RUN lines. Hopefully this will be an inspiration for future
tests :)
llvm-svn: 75261
2009-07-10 18:34:47 +00:00
0f9cce7951
Add a thumb2 pass to insert IT blocks.
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llvm-svn: 75218
2009-07-10 01:54:42 +00:00
223ac25930
Remove a bogus assertion.
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llvm-svn: 75206
2009-07-10 00:23:48 +00:00
9ce44e2521
Handle 'a' modifier on inline assembly operands.
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This is part of the fix for pr4521.
llvm-svn: 75201
2009-07-09 23:54:51 +00:00
2b77eef160
Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned
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value. Adjust other code to deal with that correctly. Make
DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT take advantage of
this new flexibility to simplify the code and make it deal with unusual
vectors (like <4 x i1>) correctly. Fixes PR3037.
llvm-svn: 75176
2009-07-09 22:01:03 +00:00
7452c968e4
Targets sometimes assign fixed stack object to spill certain callee-saved
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registers based on dynamic conditions. For example, X86 EBP/RBP, when used as
frame register has to be spilled in the first fixed object. It should inform
PEI this so it doesn't get allocated another stack object. Also, it should not
be spilled as other callee-saved registers but rather its spilling and restoring
are being handled by emitPrologue and emitEpilogue. Avoid spilling it twice.
llvm-svn: 75116
2009-07-09 06:53:48 +00:00
dab7b06de9
Improved tracking of value number kills. VN kills are now represented
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as an (index,bool) pair. The bool flag records whether the kill is a
PHI kill or not. This code will be used to enable splitting of live
intervals containing PHI-kills.
A slight change to live interval weights introduced an extra spill
into lsr-code-insertion (outside the critical sections). The test
condition has been updated to reflect this.
llvm-svn: 75097
2009-07-09 03:57:02 +00:00
44f6bcfa0b
remove eh, convert to FileCheck style
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llvm-svn: 75087
2009-07-09 01:07:22 +00:00
212f44d180
we have no tests for dllimport/export. Add one.
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llvm-svn: 75085
2009-07-09 00:53:44 +00:00
ade55bc8dd
* add some assertions for sanity checking.
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* remove some old code that was needed when we'd put ESP in the scale instead of
the base of some instructions.
* Fix a bug with the P modifier in inline asm that caused us to drop it.
llvm-svn: 75077
2009-07-09 00:27:29 +00:00
da0cf0b134
add a test for dale's recent change.
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llvm-svn: 75074
2009-07-09 00:00:16 +00:00
f65129cb6a
switch test to FileCheck-style and test the P and non-P cases.
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llvm-svn: 75071
2009-07-08 23:44:06 +00:00
334e561e35
rename a test to make it a feature test.
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llvm-svn: 75070
2009-07-08 23:40:57 +00:00
22c2fba978
Use common code for both ARM and Thumb-2 instruction and register info.
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llvm-svn: 75067
2009-07-08 23:10:31 +00:00
1d298fd75b
Implement NEON vst1 instruction.
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llvm-svn: 75037
2009-07-08 20:32:02 +00:00
d5ffa8ffb6
add some more check for vector compares.
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llvm-svn: 75024
2009-07-08 18:51:25 +00:00
072198a2a1
convert a test to "FileCheck" style.
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llvm-svn: 75023
2009-07-08 18:48:24 +00:00
f731a2df6b
Implement NEON vld1 instructions.
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llvm-svn: 75019
2009-07-08 18:11:30 +00:00
121563c615
Add rev16 test... xfail for now
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llvm-svn: 75012
2009-07-08 16:15:06 +00:00
af7451b674
Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
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llvm-svn: 75010
2009-07-08 16:09:28 +00:00
04bf64d43c
eliminate the v[if]cmp versions of these tests, now that [if]cmp+sext works.
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llvm-svn: 74980
2009-07-08 00:49:35 +00:00
dc84b31d94
Change these tests to use [fi]cmp+sext instead of v[fi]cmp. No
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functionality change.
llvm-svn: 74979
2009-07-08 00:46:57 +00:00
4ac607332d
dag combine sext(setcc) -> vsetcc before legalize. To make this safe,
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VSETCC must define all bits, which is different than it was documented
to before. Since all targets that implement VSETCC already have this
behavior, and we don't optimize based on this, just change the
documentation. We now get nice code for vec_compare.ll
llvm-svn: 74978
2009-07-08 00:31:33 +00:00
fc74e8241a
add support for legalizing an icmp where the result is illegal (4xi1) but
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the input is legal (4 x i32)
llvm-svn: 74964
2009-07-07 23:03:54 +00:00
cbbf747b7b
add a trivial test that vector compares work.
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llvm-svn: 74963
2009-07-07 22:51:09 +00:00
30220d8f98
implement support for spliting and scalarizing vector setcc's. This
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finishes off enough support for vector compares to get the icmp/fcmp
version of 2008-07-23-VSetCC.ll passing.
llvm-svn: 74961
2009-07-07 22:47:46 +00:00
87d4f309f5
verify that the fcmp version of this works just as well as the
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vfcmp version. We actually get better code for this silly testcase.
llvm-svn: 74954
2009-07-07 22:07:47 +00:00
d0611f9a37
Add Thumb2 movcc instructions.
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llvm-svn: 74946
2009-07-07 20:39:03 +00:00
39d8075edc
Add missing tests.
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llvm-svn: 74945
2009-07-07 20:38:08 +00:00
d0f6324cdc
Add Thumb2 pkhbt / pkhtb.
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llvm-svn: 74895
2009-07-07 05:35:52 +00:00
b24e51e2d9
Add some more Thumb2 multiplication instructions.
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llvm-svn: 74889
2009-07-07 01:17:28 +00:00
40398233b7
Add bfc to armv6t2.
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llvm-svn: 74868
2009-07-06 22:23:46 +00:00
e63b0e6f79
Added ARM::mls for armv6t2.
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llvm-svn: 74866
2009-07-06 22:05:45 +00:00
ba2410b7ca
Avoid adding a duplicate def. This fixes PR4478.
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llvm-svn: 74857
2009-07-06 21:34:05 +00:00
0e8bde5910
Add thumb2 sign / zero extend with rotate instructions.
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llvm-svn: 74755
2009-07-03 01:43:10 +00:00
53cdf022b6
Added indexed stores.
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llvm-svn: 74740
2009-07-03 00:06:39 +00:00
8ecd7eb3f7
Sign extending pre/post indexed loads.
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llvm-svn: 74736
2009-07-02 23:16:11 +00:00
84c6cda2ef
Thumb2 pre/post indexed loads.
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llvm-svn: 74696
2009-07-02 07:28:31 +00:00
87bb642676
@GOTPCREL is also rip-relative. Fix fast-isel to do the right thing.
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This fixes an llvm-gcc bootstrap problem I introduced.
llvm-svn: 74691
2009-07-02 04:22:01 +00:00
d1c5951615
Fix yet-another bug I introduced into fastisel, this time handling
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constant pool references that weren't getting properly rip-relative.
llvm-svn: 74689
2009-07-02 03:14:25 +00:00
1f50b61329
Fix codegen for references to available_externally symbols. This fixes
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PR4482.
llvm-svn: 74613
2009-07-01 16:53:44 +00:00
04f72fc955
CommuteChangesDestination() should check if to-be-commuted instruction defines any register. Also teaches the default commuteInstruction() to commute instruction without definitions (e.g. X86::test / ARM::tsp).
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llvm-svn: 74602
2009-07-01 08:29:08 +00:00
2a5efe14a7
Remove special handling of implicit_def. Fix a couple more bugs in liveintervalanalysis and coalescer handling of implicit_def.
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Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def.
llvm-svn: 74601
2009-07-01 08:19:36 +00:00
f95fa1b721
Fix some fast-isel problems selecting global variable addressing in
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pic mode.
llvm-svn: 74582
2009-07-01 03:27:19 +00:00
d379e896ff
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
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llvm-svn: 74580
2009-07-01 01:59:31 +00:00
Chris Lattner