Commit Graph

403848 Commits

Author SHA1 Message Date
Sanjay Patel 7e30404c3b [DAGCombiner] add fold for vselect based on mask of signbit, part 2
This is the 'or' sibling for the fold added with:
D113212

https://alive2.llvm.org/ce/z/tgnp7K

Note that neither of these transforms is poison-safe,
but it does not seem to matter at this level. We have
had the scalar version of D113212 for a long time, so
this is just making optimizer behavior consistent.

We do not have the scalar version of *this* fold,
however, so that is another follow-up.
2021-11-05 15:02:12 -04:00
Sanjay Patel 4d513f2527 [AArch] add tests for vselect; NFC
These are copy/pasted from the related test patterns in D113212.
2021-11-05 15:02:12 -04:00
Sanjay Patel fc852462d1 [x86] add tests for vector select; NFC 2021-11-05 15:02:11 -04:00
River Riddle 4070f305f9 [mlir][DialectConversion] Legalize all live argument conversions
Previously we didn't materialize conversions for arguments in certain
cases as the implicit type propagation was being heavily relied on
by many patterns. Now that those patterns have been fixed to
properly handle type conversions, we can drop the special behavior.

Differential Revision: https://reviews.llvm.org/D113233
2021-11-05 18:43:56 +00:00
Yonghong Song 3466e00716 Reland "[Attr] support btf_type_tag attribute"
This is to revert commit f95bd18b5f (Revert "[Attr] support
btf_type_tag attribute") plus a bug fix.

Previous change failed to handle cases like below:
    $ cat reduced.c
    void a(*);
    void a() {}
    $ clang -c reduced.c -O2 -g

In such cases, during clang IR generation, for function a(),
CGCodeGen has numParams = 1 for FunctionType. But for
FunctionTypeLoc we have FuncTypeLoc.NumParams = 0. By using
FunctionType.numParams as the bound to access FuncTypeLoc
params, a random crash is triggered. The bug fix is to
check against FuncTypeLoc.NumParams before accessing
FuncTypeLoc.getParam(Idx).

Differential Revision: https://reviews.llvm.org/D111199
2021-11-05 11:25:17 -07:00
Florian Hahn f64580f8d2
[AArch64][GISel] Optimize 8 and 16 bit variants of uaddo.
Try simplify G_UADDO with 8 or 16 bit operands to wide G_ADD and TBNZ if
result is only used in the no-overflow case. It is restricted to cases
where we know that the high-bits of the operands are 0. If there's an
overflow, then the the 9th or 17th bit must be set, which can be checked
using TBNZ.

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D111888
2021-11-05 19:11:15 +01:00
Deepak Panickal 97c899f3c5 [mlir] Add callback to provide a pass pipeline to MlirOptMain
The callback can be used to provide a default pass pipeline.

Reviewed By: mehdi_amini, rriddle

Differential Revision: https://reviews.llvm.org/D113144
2021-11-05 17:46:35 +00:00
Shao-Ce SUN 5c3d7184b4 [RISCV] Support Zfhmin extension
According to RISC-V Unprivileged ISA 15.6.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D111866
2021-11-06 01:41:02 +08:00
Jon Chesterfield 4f4c826e75 [libomptarget] Drop remote plugin cmake version requirement to match llvm
LLVM docs at https://llvm.org/docs/CMake.html#quick-start state 3.13.4

Reviewed By: atmnpatel

Differential Revision: https://reviews.llvm.org/D113271
2021-11-05 17:34:28 +00:00
Zarko Todorovski 1b7528554f [AIX][Clang] Fix XL product name in AIX XL compatibility warning
Correct the XLC/C++ version in the warning message to use the information from
XL's -qversion output.

Reviewed By: rzurob

Differential Revision: https://reviews.llvm.org/D112847
2021-11-05 13:17:30 -04:00
Aart Bik 2f0ee17017 [mlir][sparse] test for SIMD reduction chaining in consecutive vector loops
Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D113197
2021-11-05 10:14:17 -07:00
Martin Liska 78d3e0a4f1 sanitizer: Fix -Wpedantic GCC warning
Fixes:
sanitizer_stacktrace.h:212:5: warning: ISO C++ forbids braced-groups within expressions [-Wpedantic]

Differential Revision: https://reviews.llvm.org/D113292
2021-11-05 18:05:23 +01:00
Fangrui Song 26a8ceba3e [llvm-readobj] Display DT_RELRSZ/DT_RELRENT as " (bytes)"
to match RELSZ/RELENT.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D113206
2021-11-05 10:02:49 -07:00
Nico Weber c68183b81e [gn build] Use `=` for of -fdebug-compilation-dir
-f flags usually use the `=` form. -fdebug-compilation-dir= has been
around for a few months now (since 0c2bb6b446, both LLVM 12.0
and 13.0 have it), so using it shouldn't be a big problem -- especially
since use_relative_paths_in_debug_info is opt-in anyways.
2021-11-05 12:43:20 -04:00
Arthur Eubanks 7f62759697 [polly] Properly create and initialize new PM analysis managers
If we don't properly initialize all the analysis managers, we may be
missing analyses that other analyses depend on.

Fixes broken polly test, e.g.
https://lab.llvm.org/buildbot/#/builders/10/builds/7501.
2021-11-05 09:32:54 -07:00
Zarko Todorovski a83a6c22e6 [clang] [Objective C] Inclusive language: use objcmt-allowlist-dir-path=<arg> instead of objcmt-white-list-dir-path=<arg>
Trying to update some options that don't at least have an inclusive language version.
This patch adds `objcmt-allowlist-dir-path` as a default alternative.

Reviewed By: akyrtzi

Differential Revision: https://reviews.llvm.org/D112591
2021-11-05 12:27:05 -04:00
Roman Lebedev 0b36431810
[NFCI] InstructionTest: trim `InstructionsTest.ShuffleMaskIsReplicationMask_*` complexity
These tests have pretty high O() complexity due to their nature,
which leads to potentially-long runtimes.

While in release build for me they took ~1 and ~2 sec,
as noted in https://reviews.llvm.org/D113214#inline-1080479
they take minutes in debug build.

Fine-tune the amount of permutations they deal with,
without affecting the test coverage. After this,
they take <~10ms each for me (in release build),
hopefully that is good-enough for debug build too.
2021-11-05 19:22:48 +03:00
Roman Lebedev 3151fca9f3
[NFC] Fix typo in comment for `isReplicationMask()`
This was mentioned in https://reviews.llvm.org/D113214#inline-1080385
but i forgot to stage the change before committing.
2021-11-05 19:22:47 +03:00
Kazu Hirata 2c4ba3e9d3 [Target] Use make_early_inc_range (NFC) 2021-11-05 09:14:32 -07:00
Whitney Tsang 93421108d2 Add NoOpLoopNestPass and LOOPNEST_PASS macro
Having a NoOpLoopNestPass can ensure that only outermost loop is invoked
for a LoopNestPass with a lit test.

There are some existing passes that are implemented as LoopNestPass, but
they are still using LOOP_PASS macro.
It would be easier to identify LoopNestPasses with a LOOPNEST_PASS
macro.

Differential Revision: https://reviews.llvm.org/D113185
2021-11-05 16:11:48 +00:00
Craig Topper 085accea3c [RISCV] Enable FP extensions and ABI on fixed-vectors-bitcast.ll.
This improves our type coverage. We were only testing integer
insert and extract before due to the FP types not being enabled for
arguments and returns.

Differential Revision: https://reviews.llvm.org/D113217
2021-11-05 08:41:34 -07:00
Michael Liao af2ae2cf42 [BranchRelaxation] Fix warning on unused variable. NFC. 2021-11-05 11:18:27 -04:00
David Green 08056e1888 [InstCombine] Generalize sadd.sat combine to compute sign bits.
There is a combine in instcombine to transform a saturated add/sub into
a saddsat/ssubsat, currently handling inputs which are both sign
extended (https://alive2.llvm.org/ce/z/68qpTn). This can generalize to,
for example ashr of at least the bitwidth (https://alive2.llvm.org/ce/z/4TFyX-
and https://alive2.llvm.org/ce/z/qDWzFs for example). Which means it
generalizes further to "the number of sign bits", needing to be enough
to truncate to the size of the saturate. (An example using `or` for
instance: https://alive2.llvm.org/ce/z/EI_h_A).

So this patch makes use of ComputeNumSignBits (with the newly added
ComputeMinSignedBits) in matchSAddSubSat to generalize the fold to any
inputs with enough sign bits known, truncating the inputs to the new
size of the saturate.

Differential Revision: https://reviews.llvm.org/D112298
2021-11-05 15:05:09 +00:00
Valentin Clement ea55503d7c
[fir] Add fir.extract_value and fir.insert_value conversion
This patch add the conversion pattern for fir.extract_value
and fir.insert_value. fir.extract_value is lowered to llvm.extractvalue
anf fir.insert_value is lowered to llvm.insertvalue.
This patch also adds the type conversion for the BoxType and RecordType
needed to have some comprehensive tests.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D112961

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2021-11-05 15:53:42 +01:00
Nico Weber cf838ebfa5 [gn build] Reformat all files
Ran `git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format`.
No behavior change.
2021-11-05 10:51:04 -04:00
Alex Lorenz a00944ebea [clang] 'unused-but-set-variable' warning should not apply to __block objective-c pointers
The __block Objective-C pointers can be set but not used due to a commonly used lifetime extension pattern in Objective-C.

Differential Revision: https://reviews.llvm.org/D112850
2021-11-05 07:48:07 -07:00
Nico Weber 565cbc2ca2 [gn build] Use build-machine-independent paths in coverage information
This is possible after D106314 / 8773822c57.

Makes the required prepare-code-coverage-artifact.py invocation a bit longer,
but that seems like a good tradeoff.

Differential Revision: https://reviews.llvm.org/D113282
2021-11-05 10:47:49 -04:00
Tres Popp 2672094266 Extend timeout of llvm/unittests:ir_tests
This test became much slower after 01d8759ac9
2021-11-05 15:44:19 +01:00
David Green 61225c0818 [ValueTracking][InstCombine] Introduce and use ComputeMinSignedBits
This introduces a new ComputeMinSignedBits method for ValueTracking that
returns the BitWidth - SignBits + 1 from ComputeSignBits, and represents
the minimum bit size for the value as a signed integer.  Similar to the
existing APInt::getMinSignedBits method, this can make some of the
reasoning around ComputeSignBits more natural.

See https://reviews.llvm.org/D112298
2021-11-05 14:41:37 +00:00
Simon Pilgrim 9e6506299a [DAG] FoldConstantVectorArithmetic - remove SDNodeFlags argument
Another minor step towards merging FoldConstantVectorArithmetic into FoldConstantArithmetic.

We don't use SDNodeFlags in any constant folding inside DAG, so passing the Flags argument is a waste of time - an alternative would be to wire up FoldConstantArithmetic to take SDNodeFlags just-in-case we someday start using it, but we don't have any way to test it and I'd prefer to avoid dead code.

Differential Revision: https://reviews.llvm.org/D113276
2021-11-05 14:36:17 +00:00
Roman Lebedev ad617183bb
[X86] `X86TTIImpl::getInterleavedMemoryOpCostAVX512()`: mask is i8 not i1
Even though AVX512's masked mem ops (unlike AVX1/2) have a mask
that is a `VF x i1`, replication of said masks happens after
promotion of it to `VF x i8`, so we should use `i8`, not `i1`,
when calculating the cost of mask replication.
2021-11-05 17:27:02 +03:00
Sanjay Patel 4fc1fc4005 [DAGCombiner] add fold for vselect based on mask of signbit
(X s< 0) ? Y : 0 --> (X s>> BW-1) & Y

We canonicalize to the icmp+select form in IR, and we already have this fold
for scalar select in SDAG, so I think it's an oversight that we don't have
the fold for vectors. It seems neutral for AArch64 and saves some instructions
on x86.

Whether we should also have the sibling folds for the inverse condition or
all-ones true value may depend on target-specific factors such as whether
there's an "and-not" instruction.

Differential Revision: https://reviews.llvm.org/D113212
2021-11-05 10:06:16 -04:00
Sanjay Patel 1e7afa2a0d [AArch64] add tests for vector select; NFC 2021-11-05 10:06:16 -04:00
Sanjay Patel 8918814032 [x86] add tests for vector select; NFC 2021-11-05 10:06:15 -04:00
Sanjay Patel 05f64b5ac9 [InstCombine] add signbit tests for icmp with trunc; NFC 2021-11-05 10:06:15 -04:00
LLVM GN Syncbot 6cd309bd02 [gn build] Port 7a98761d74 2021-11-05 13:54:25 +00:00
Roman Lebedev 01d8759ac9
[IR][ShuffleVector] Introduce `isReplicationMask()` matcher
Avid readers of this saga may recall from previous installments,
that replication mask replicates (lol) each of the `VF` elements
in a vector `ReplicationFactor` times. For example, the mask for
`ReplicationFactor=3` and `VF=4` is: `<0,0,0,1,1,1,2,2,2,3,3,3>`.
More importantly, replication mask is used by LoopVectorizer
when using masked interleaved memory operations.

As discussed in previous installments, while it is used by LV,
and we **seem** to support masked interleaved memory operations on X86,
it's support in cost model leaves a lot to be desired:
until basically yesterday even for AVX512 we had no cost model for it.

As it has been witnessed in the recent
AVX2 `X86TTIImpl::getInterleavedMemoryOpCost()`
costmodel patches, while it is hard-enough to query the cost
of a particular assembly sequence [from llvm-mca],
afterwards the check lines LV costmodel tests must be updated manually.
This is, at the very least, boring.

Okay, now we have decent costmodel coverage for interleaving shuffles,
but now basically the same mind-killing sequence has to be performed
for replication mask. I think we can improve at least the second half
of the problem, by teaching
the `TargetTransformInfoImplCRTPBase::getUserCost()` to recognize
`Instruction::ShuffleVector` that are repetition masks,
adding exhaustive test coverage
using `-cost-model -analyze` + `utils/update_analyze_test_checks.py`

This way we can have good exhaustive coverage for cost model,
and only basic coverage for the LV costmodel.

This patch adds precise undef-aware `isReplicationMask()`,
with exhaustive test coverage.
* `InstructionsTest.ShuffleMaskIsReplicationMask` shows that
   it correctly detects all the known masks.
* `InstructionsTest.ShuffleMaskIsReplicationMask_undef`
  shows that replacing some mask elements in a known replication mask
  still allows us to recognize it as a replication mask.
  Note, with enough undef elts, we may detect a different tuple.
* `InstructionsTest.ShuffleMaskIsReplicationMask_Exhaustive_Correctness`
  shows that if we detected the replication mask with given params,
  then if we actually generate a true replication mask with said params,
  it matches element-wise ignoring undef mask elements.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D113214
2021-11-05 16:53:47 +03:00
Roman Lebedev 7a98761d74
[NFC] Move CombinationGenerator from Exegesis to ADT
Reviewed By: courbet

Differential Revision: https://reviews.llvm.org/D113213
2021-11-05 16:53:46 +03:00
David Sherwood 657a1dcd0d [AArch64] Add target DAG combine for UUNPKHI/LO
When created a UUNPKLO/HI node with an undef input then the
output should also be undef. I've added a target DAG combine
function to ensure we avoid creating an unnecessary uunpklo/hi
instruction.

Differential Revision: https://reviews.llvm.org/D113266
2021-11-05 13:50:59 +00:00
Quinn Pham c71fbdd87b [NFC] Inclusive language: Remove instances of master in URLs
[NFC] This patch fixes URLs containing "master". Old URLs were either broken or
redirecting to the new URL.

Reviewed By: #libc, ldionne, mehdi_amini

Differential Revision: https://reviews.llvm.org/D113186
2021-11-05 08:48:41 -05:00
Simon Pilgrim f2703c3c33 [DAG] FoldConstantArithmetic - rename NumOps -> NumElts. NFC.
NumOps represents the number of elements for vector constant folding, rename this NumElts so in future we can the consistently use NumOps to represent the number of operands of the opcode.

Minor cleanup before trying to begin generalizing FoldConstantArithmetic to support opcodes other than binops.
2021-11-05 13:32:34 +00:00
Nico Weber a160aba95f [gn build] (manually) port df0ba47c36 2021-11-05 09:17:59 -04:00
Jingu Kang a7b1872593 [AArch64] Fix a bug from a pattern for uaddv(uaddlp(x)) ==> uaddlv
A pattern has selected wrong uaddlv MI. It should be as below.

uaddv(uaddlp(v8i8)) ==> uaddlv(v8i8)

Differential Revision: https://reviews.llvm.org/D113263
2021-11-05 12:48:18 +00:00
Alfredo Dal'Ava Junior 1cb9f37a17 [FreeBSD] Do not mark __stack_chk_guard as dso_local
This symbol is defined in libc.so so it is definitely not DSO-Local.
Marking it as such causes problems on some platforms (such as PowerPC).

Differential revision: https://reviews.llvm.org/D109090
2021-11-05 07:29:50 -05:00
Martin Liska 13a442ca49 Enable -Wformat-pedantic and fix fallout.
Differential Revision: https://reviews.llvm.org/D113172
2021-11-05 13:12:35 +01:00
Simon Pilgrim c1e7911c3b [DAG] FoldConstantArithmetic - fold bitlogic(bitcast(x),bitcast(y)) -> bitcast(bitlogic(x,y))
To constant fold bitwise logic ops where we've legalized constant build vectors to a different type (e.g. v2i64 -> v4i32), this patch adds a basic ability to peek through the bitcasts and perform the constant fold on the inner operands.

The MVE predicate v2i64 regressions will be addressed by future support for basic v2i64 type support.

One of the yak shaving fixes for D113192....

Differential Revision: https://reviews.llvm.org/D113202
2021-11-05 12:00:59 +00:00
David Green cd8cb5377a [InstCombine] Add additional tests for converting to sadd.sat with sign bits. NFC 2021-11-05 12:00:03 +00:00
Valentin Clement 8c23990949
[fir] Add fir.select and fir.select_rank FIR to LLVM IR conversion patterns
The `fir.select` and `fir.select_rank` are lowered to llvm.switch.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D113089

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2021-11-05 12:54:51 +01:00
Fraser Cormack 3a11fb572c [LangRef][VP] Document vp.gather and vp.scatter intrinsics
This patch fleshes out the missing documentation for the final two VP
intrinsics introduced in D99355: `llvm.vp.gather` and `llvm.vp.scatter`.
It does so mostly by deferring to the `llvm.masked.gather` and
`llvm.masked.scatter` intrinsics, respectively.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D112997
2021-11-05 11:36:03 +00:00
Alex Zinenko 6981e5ec91 [mlir][python] fix constructor generation for optional operands in presence of segment attribute
The ODS-based Python op bindings generator has been generating incorrect
specification of the operand segment in presence if both optional and variadic
operand groups: optional groups were treated as variadic whereas they require
separate treatement. Make sure it is the case. Also harden the tests around
generated op constructors as they could hitherto accept the code for both
optional and variadic arguments.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D113259
2021-11-05 12:40:27 +01:00