61 Commits

Author	SHA1	Message	Date
Chris Lattner	414832fea6	Const correctness fixes ... llvm-svn: 7349	2003-07-26 23:24:56 +00:00
Chris Lattner	a7c5e0fba3	Fix bug: Jello/2003-06-04-bzip2-bug.ll ... llvm-svn: 6624	2003-06-05 17:15:04 +00:00
Vikram S. Adve	7366fa1aa6	(1) Added special register class containing (for now) %fsr. ... Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". llvm-svn: 6341	2003-05-27 00:05:23 +00:00
Chris Lattner	1103e8349d	Use a kill, not a dead definition, update comment ... llvm-svn: 6131	2003-05-12 17:37:30 +00:00
Chris Lattner	51ae817fd6	* Keep LiveVariable information more up-to-date and consistent ... * *** Finally mark values that are inputs to PHIs as killed when appropriate. This should make the generated code quite a bit better. For example, the local-ra will not have to spill PHI inputs at the end of predecessor BB's anymore. llvm-svn: 6117	2003-05-12 14:28:28 +00:00
Chris Lattner	2e50ac75a0	Fix bug where we could iterate off the end of a basic block ... llvm-svn: 6116	2003-05-12 14:26:38 +00:00
Chris Lattner	bd854dafec	Fix N^2 algorithm ... llvm-svn: 6112	2003-05-12 04:08:54 +00:00
Chris Lattner	00ee7cfa83	* Fix several comments ... * Update LiveVar info better, fixing bug: Jello/2003-05-11-PHIRegAllocBug.ll llvm-svn: 6110	2003-05-12 03:55:21 +00:00
Chris Lattner	176866caed	Fix problems with empty basic blocks ... llvm-svn: 5326	2003-01-16 18:06:43 +00:00
Chris Lattner	b4d58d7f9e	Rename MachineInstrInfo -> TargetInstrInfo ... llvm-svn: 5272	2003-01-14 22:00:31 +00:00
Chris Lattner	cab0b442f2	New files ... llvm-svn: 5262	2003-01-13 20:01:16 +00:00