Commit Graph

493 Commits

Author SHA1 Message Date
Paul C. Anagnostopoulos fe9101c3d8 [TableGen] Make the NUL character invalid in .td files
Now uses tr instead of sed.

Differential Revision: https://reviews.llvm.org/D102254
2021-05-13 10:17:45 -04:00
Paul C. Anagnostopoulos 46402eb103 Revert "[TableGen] Make the NUL character invalid in .td files"
At least one build uses a 'sed' that does not understand \x00.

This reverts commit cf9647011c4f05e1eb4423c6637d84e2f26b2042.
2021-05-11 10:43:13 -04:00
Paul C. Anagnostopoulos 6ca2bdb03c [TableGen] Make the NUL character invalid in .td files
Differential Revision: https://reviews.llvm.org/D101923
2021-05-11 09:20:42 -04:00
Craig Topper 6430430958 [TableGen] Use sign rotated VBR for OPC_EmitInteger.
This allows for a much more efficient encoding for small negative
numbers by storing the sign bit first and negating the rest of
the bits. This was already being used for OPC_CheckInteger.

For every in tree target this affects, the table got smaller.
R600GenDAGISel.inc saw the largest reduction of 7K.

I did have to add a new opcode for StringIntegers used for
register class ids and subregister indices since we don't have the
integer value to encode. The enum name is emitted directly into
the table. Previously assumed the enum would expand to a positive
7-bit number. We might be able to just shift that right by 1 and
assume it is a positive 6 bit number, but that will need more
investigation.
2021-05-02 12:40:44 -07:00
Paul C. Anagnostopoulos 985ab6e1fa [TableGen] Fix two bugs in 'defm' when complex 'assert' is involved.
This patch fixes two bugs that arise when a 'defm' inherits from a multiclass
and also from a class with assertions.

Differential Revision: https://reviews.llvm.org/D101626
2021-04-30 11:31:06 -04:00
Dominik Montada 97ed1b6036 [GISel] Teach TableGen to check predicates of immediate operands in patterns
Reviewed By: dsanders

Differential Revision: https://reviews.llvm.org/D91703
2021-04-30 10:18:45 +02:00
Paul C. Anagnostopoulos 952c6ddd8b [TableGen] Add the !find bang operator
!find searches a source string for a target string and returns the position.

Differential Revision: https://reviews.llvm.org/D101318
2021-04-28 09:51:00 -04:00
Paul C. Anagnostopoulos a5aaec8f4e [TableGen] Add support for the 'assert' statement in multiclasses
This is step 3 of adding the 'assert' statement.

Differential Revision: https://reviews.llvm.org/D99751
2021-04-19 09:01:42 -04:00
paperchalice 6445d5ba84 [TableGen] Allow mnemonics aliases with uppercase
Differential Revision: https://reviews.llvm.org/D96691
2021-04-16 09:58:20 -04:00
Daniel Sanders be50657c6a [TableGen] Resolve concrete but not complete field access initializers
This fixes the resolution of Rec10.Zero in ListSlices.td.

As part of this, correct the definition of complete for ListInit such that
it's complete iff all the elements in the list are complete rather than
always being complete regardless of the elements. This is the reason
Rec10.TwoFive from ListSlices.td previously resolved despite being
incomplete like Rec10.Zero was

Depends on D100247

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D100253
2021-04-13 15:14:56 -07:00
Paul C. Anagnostopoulos 489cdedd11 [TableGen] Fix bug in recent change to ListInit::convertInitListSlice()
Differential Revision: https://reviews.llvm.org/D100247
2021-04-12 09:44:39 -04:00
Alex Richardson 107189a26e [TableGen] Report an error message on a missing comma
I recently forgot a comma in a defm argument list and tablegen just
failed with exit code 1 without printing an error message. I believe
this issue was introduced in a9fc44c557.

This change prints the following instead:
.../clang/include/clang/Driver/Options.td:569:3: error: Expected comma before next argument

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D100178
2021-04-09 18:48:49 +01:00
Paul C. Anagnostopoulos 3f919ff250 Revert "[TableGen] Add support for the 'assert' statement in multiclasses"
This reverts commit 3b9a15d910.
2021-04-08 13:58:58 -04:00
Paul C. Anagnostopoulos 14580ce2fd [TableGen] Make behavior of list slice suffix consistent across all values
Differential Revision: https://reviews.llvm.org/D99883
2021-04-08 08:38:44 -04:00
Paul C. Anagnostopoulos 3b9a15d910 [TableGen] Add support for the 'assert' statement in multiclasses 2021-04-08 08:36:03 -04:00
Paul C. Anagnostopoulos 5f473a04af [TableGen] Add support for the 'assert' statement in class definitions.
Differential Revision: https://reviews.llvm.org/D99275
2021-03-29 09:20:29 -04:00
Valentin Clement d709dcc090 [openacc][openmp] Reduce number of generated file and prefer inclusion of .inc
Follow up from D92955 and D83636. This patch makes the base cpp files
OMP.cpp and ACC.cpp normal files and they now include the XXX.inc file
generated by tablegen. This reduces the number of file generated by the
DirectiveEmitter backend and makes it closer to the proposal in D83636.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D93560
2021-03-23 09:16:53 -04:00
Serge Pavlov 61fa35c3f7 [TableGen] Allow BitsInit to init integer in pseudo expansion
Differential Revision: https://reviews.llvm.org/D99057
2021-03-23 11:50:55 +07:00
Paul C. Anagnostopoulos a9fc44c557 [TableGen] Improve handling of template arguments
This requires changes to TableGen files and some C++ files due to
incompatible multiclass template arguments that slipped through
before the improved handling.
2021-03-19 09:57:53 -04:00
Jay Foad b8bf94df25 [TableGen] Fix excessive compile time issue in FixedLenDecoderEmitter
This patch reduces the time taken for clang to compile the generated
disassembler for an out-of-tree target with InsnType bigger than 64 bits
from 4m30s to 48s.

D67686 did a similar thing for CodeEmitterGen.

The idea is to tweak the API of the APInt-like InsnType class so that
we don't need so many temporary InsnTypes. This takes advantage of the
rule stated in D52100 that currently "no string of bits extracted
from the encoding may exceeed 64-bits", so we can use uint64_t for some
temporaries.

D52100 goes on to say that "fields are still permitted to exceed 64-bits
so long as they aren't one contiguous string of bits". This patch breaks
that by always using a "uint64_t tmp" in the generated decodeToMCInst,
but it should be easy to fix in FilterChooser::emitBinaryParser by
choosing to use a different type of tmp based on the known total field
width.

Differential Revision: https://reviews.llvm.org/D98046
2021-03-17 09:28:50 +00:00
Praveen 1d7960a601 [Flang][OpenMP][OpenACC] Add function for mapping parser clause classes with the corresponding clause kind.
1. Generate the mapping for clauses between the parser class and the
   corresponding clause kind for OpenMP and OpenACC using tablegen.

2. Add a common function to get the OmpObjectList from the OpenMP
   clauses to avoid repetition of code.

Reviewed by: Kiranchandramohan @kiranchandramohan , Valentin Clement @clementval

Differential Revision: https://reviews.llvm.org/D98603
2021-03-17 12:20:43 +05:30
Bjorn Pettersson 5ac3b37599 [TableGen/GlobalISel] Emit MI_predicate custom code for PatFrags (not only PatFrag)
When GlobalISelEmitter::emitCxxPredicateFns emitted code for MI
predicates it used "PatFrag" when searching for definitions. With
this patch it will search for all "PatFrags" instead. Since PatFrag
derives from PatFrags the difference is that we now include all
definitions using PatFrags directly as well. Thus making it possible
to use GISelPredicateCode together with a PatFrags definition.

It might be noted that the matcher code was emitted also for PatFrags
in the past. But then one ended up with errors since the custom code
in testMIPredicate_MI was missing.

Differential Revision: https://reviews.llvm.org/D98486
2021-03-16 12:44:09 +01:00
Andrew Savonichev d791695cb5 [MCA] Add support for in-order CPUs
This patch adds a pipeline to support in-order CPUs such as ARM
Cortex-A55.

In-order pipeline implements a simplified version of Dispatch,
Scheduler and Execute stages as a single stage. Entry and Retire
stages are common for both in-order and out-of-order pipelines.

Differential Revision: https://reviews.llvm.org/D94928
2021-03-04 14:08:19 +03:00
Krzysztof Parzyszek d96b5e606a [TableGen] Add IntrNoMerge as intrinsic property
There is a function attribute 'nomerge' in addition to 'noduplicate'
and 'convergent'. Both 'noduplicate' and 'convergent' have corresponding
intrinsic properties. This patch adds an intrinsic property for the
'nomerge' attribute.

Differential Revision: https://reviews.llvm.org/D96364
2021-03-02 09:04:50 -08:00
Craig Topper 61d4d9a5d3 [TableGen][SelectionDAG] Improve efficiency of encoding negative immediates for isel's CheckInteger opcode.
CheckInteger uses an int64_t encoded using a variable width encoding
that is optimized for encoding a number with a lot of leading zeros.
Negative numbers have no leading zeros so use the largest encoding
requiring 9 bytes.

I believe its most like we want to check for positive and negative
numbers near 0. -1 is quite common due to its use in the 'not'
idiom.

To optimize for this, we can borrow an idea from the bitcode format
and move the sign bit to bit 0 with the magnitude stored in the
upper bits. This will drastically increase the number of leading
zeros for small magnitudes. Then we can run this value through
VBR encoding.

This gives a small reduction in the table size on all in tree
targets except VE where size increased by about 300 bytes due
to intrinsic ids now requiring 3 bytes instead of 2. Since the
intrinsic enum space is shared by all targets this an unfortunate
consquence of where VE is currently located in the range.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D96317
2021-02-18 08:53:17 -08:00
Paul C. Anagnostopoulos 49d663d546 Revert "[TableGen] Improve algorithms for processing template arguments"
This reverts commit e589207d5aaee6cbf1d7c7de8867a17727d14aca.
2021-02-18 09:26:26 -05:00
Paul C. Anagnostopoulos d248cce44e [TableGen] Improve algorithms for processing template arguments
Rework template argument checking so that all arguments are type-checked
and cast if necessary.

Add a test.

Differential Revision: https://reviews.llvm.org/D96416
2021-02-18 09:15:26 -05:00
Jay Foad 7e9ceed9a2 [TableGen][GlobalISel] Allow duplicate RendererFns
Allow different GICustomOperandRenderers to use the same RendererFn.
This avoids the need for targets to define a bunch of identical C++
renderer functions with different names.

Without this fix TableGen would have emitted code that tried to define
the GICR enumeration with duplicate enumerators.

Differential Revision: https://reviews.llvm.org/D96587
2021-02-12 15:05:32 +00:00
J-Y You 267b573b55 [TableGen] Fix anonymous record self-reference in foreach and multiclass
If we instantiate self-referenced anonymous records in foreach and
multiclass, the NAME value will point to incorrect record. It's because
anonymous name is resolved too early.

This patch adds AnonymousNameInit to represent an anonymous record name.
When instantiating an anonymous record, it will update the referred name.

Differential Revision: https://reviews.llvm.org/D95309
2021-02-01 10:59:07 -05:00
J-Y You 5046c5be84 [TableGen] Fix instantiating multiclass in foreach
If multiclass argument comes from loop varaible and argument is record type,
it will not recognize the type. This patch ensures that loop variables are
resolved correctly.

Differential Revision: https://reviews.llvm.org/D95308
2021-01-29 10:25:33 -05:00
Christudasan Devadasan 892e4567e1 Support a list of CostPerUse values
This patch allows targets to define multiple cost
values for each register so that the cost model
can be more flexible and better used during the
register allocation as per the target requirements.

For AMDGPU the VGPR allocation will be more efficient
if the register cost can be associated dynamically
based on the calling convention.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D86836
2021-01-29 10:14:52 +05:30
Paul C. Anagnostopoulos f3449ed607 [TableGen] [DetailedRecords] Print record name that is null string as ""
Differential Revision: https://reviews.llvm.org/D95312

Add a test for the backend.
2021-01-27 10:41:46 -05:00
Craig Topper b11b6ab3e0 [RISCV] Add way to mark CompressPats that should only be used for compressing.
There can be muliple patterns that map to the same compressed
instruction. Reversing those leads to multiple ways to uncompress
an instruction, but its not easily controllable which one will
be chosen by the tablegen backend.

This patch adds a flag to mark patterns that should only be used
for compressing. This allows us to leave one canonical pattern
for uncompressing.

The obvious benefit of this is getting c.mv to uncompress to
the addi patern that is aliased to the mv pseudoinstruction. For
the add/and/or/xor/li patterns it just removes some unreachable
code from the generated code.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D94894
2021-01-20 09:20:15 -08:00
Paul C. Anagnostopoulos 4f5f29d409 Revert "[TableGen] Improve algorithm for inheriting class template args and fields"
This reverts commit c056f82434.

That commit causes build failures.
2021-01-20 09:47:13 -05:00
Paul C. Anagnostopoulos c056f82434 [TableGen] Improve algorithm for inheriting class template args and fields
Differential Revision: https://reviews.llvm.org/D94822
2021-01-20 09:31:43 -05:00
Valentin Clement 6bd0a4451c [flang][directive] Get rid of flangClassValue in TableGen
The TableGen emitter for directives has two slots for flangClass information and this was mainly
to be able to keep up with the legacy openmp parser at the time. Now that all clauses are encapsulated in
AccClause or OmpClause, these two strings are not necessary anymore and were the the source of couple
of problem while working with the generic structure checker for OpenMP.
This patch remove the flangClassValue string from DirectiveBase.td and use the string flangClass as the
placeholder for the encapsulated class.

Reviewed By: sameeranjoshi

Differential Revision: https://reviews.llvm.org/D94821
2021-01-19 10:28:46 -05:00
Paul C. Anagnostopoulos a022be6253 [TableGen] Enhance !cast<string> to handle bit and bits types.
Add a test for this.

Differential Revision: https://reviews.llvm.org/D94529
2021-01-14 10:20:35 -05:00
Paul C. Anagnostopoulos a675947712 [TableGen] Improve error message for semicolon after braced body.
Add a test for this message.

Differential Revision: https://reviews.llvm.org/D94412
2021-01-12 09:38:05 -05:00
Paul C. Anagnostopoulos 6e2b6351d2 [TableGen] Add the assert statement, step 1
Differential Revision: https://reviews.llvm.org/D93911

This first step adds the assert statement and supports it at top level
and in record definitions. Later steps will support it in class
definitions and multiclasses.
2021-01-08 09:47:51 -05:00
Gabriel Hjort Åkerlund 3c1d015edc [GlobalISel][TableGen] Fix ConstrainOperandRC bug
TableGen would pick the largest RC for constraining the operands, which
could potentially be an unallocatable RC. This patch removes selection
of unallocatable RCs.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D93945
2021-01-05 09:30:04 +01:00
Paul C. Anagnostopoulos 4820af99dd [TableGen] Fix bug in !interleave operator
I forgot to account for unresolved elements of the list.

Differential Revision: https://reviews.llvm.org/D93814
2020-12-28 12:17:24 -05:00
Paul C. Anagnostopoulos e122a71a0a [TableGen] Add the !substr() bang operator
Update the documentation and add a test.

Build failed: Change SIZE_MAX to std::numeric_limits<int64_t>::max().

Differential Revision: https://reviews.llvm.org/D93419
2020-12-23 10:59:33 -05:00
Valentin Clement 8f933a4e93 [openacc] Use TableGen enum for default clause value
Use the TableGen feature to have enum values for clauses.
Next step will be to extend the MLIR part used currently by OpenMP
to use the same enum on the dialect side.

This patch also add function that convert the enum to StringRef to be
used on the dump-parse-tree from flang.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D93576
2020-12-21 15:07:27 -05:00
Paul C. Anagnostopoulos 554eb1f6dc Revert "[TableGen] Add the !substr() bang operator"
This reverts commit 3a675c777d.
2020-12-21 10:46:25 -05:00
Paul C. Anagnostopoulos 3a675c777d [TableGen] Add the !substr() bang operator
Update the documentation and add a test.

Differential Revision: https://reviews.llvm.org/D93419
2020-12-21 09:41:59 -05:00
Valentin Clement f4c8b80318 [openmp] Remove clause from OMPKinds.def and use OMP.td info
Remove the OpenMP clause information from the OMPKinds.def file and use the
information from the new OMP.td file. There is now a single source of truth for the
directives and clauses.

To avoid generate lots of specific small code from tablegen, the macros previously
used in OMPKinds.def are generated almost as identical. This can be polished and
possibly removed in a further patch.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D92955
2020-12-17 14:08:12 -05:00
clementval 456c885df3 Revert "[openmp] Remove clause from OMPKinds.def and use OMP.td info"
This reverts commit a7b2847216.

failing buildbot on warnings
2020-12-10 10:34:59 -05:00
Valentin Clement a7b2847216 [openmp] Remove clause from OMPKinds.def and use OMP.td info
Remove the OpenMP clause information from the OMPKinds.def file and use the
information from the new OMP.td file. There is now a single source of truth for the
directives and clauses.

To avoid generate lots of specific small code from tablegen, the macros previously
used in OMPKinds.def are generated almost as identical. This can be polished and
possibly removed in a further patch.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D92955
2020-12-10 10:19:09 -05:00
Paul C. Anagnostopoulos 415fab6f67 [TableGen] Eliminate the 'code' type
Update the documentation.

Rework various backends that relied on the code type.

Differential Revision: https://reviews.llvm.org/D92269
2020-12-03 10:19:11 -05:00
Gabriel Hjort Åkerlund 5e9e335a24 [GlobalISel][TableGen] Fix seg fault for zero instruction
Tablegen seg faulted when parsing a Pat where the destination part has
no output (zero instruction), due to a register class lookup using
nullptr.

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D90829
2020-11-24 07:47:58 +01:00