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Author SHA1 Message Date
David Green 48cef1fa8e [ARM] Create VMOVRRD from adjacent vector extracts 
This adds a combine for extract(x, n); extract(x, n+1)  ->
VMOVRRD(extract x, n/2). This allows two vector lanes to be moved at the
same time in a single instruction, and thanks to the other VMOVRRD folds
we have added recently can help reduce the amount of executed
instructions. Floating point types are very similar, but will include a
bitcast to an integer type.

This also adds a shouldRewriteCopySrc, to prevent copy propagation from
DPR to SPR, which can break as not all DPR regs can be extracted from
directly.  Otherwise the machine verifier is unhappy.

Differential Revision: https://reviews.llvm.org/D100244
 2021-04-20 15:15:43 +01:00
David Green 1551d8dd48 [ARM] Remove unused check labels. NFC 2020-11-12 08:37:46 +00:00
David Green 781e3aff8c [ARM] Add test for MVE and no floats. NFC 
Adds a simple test that MVE with no floating point will be promoted correctly
to software float calls.

llvm-svn: 365496
 2019-07-09 14:43:17 +00:00