Commit Graph

5444 Commits

Author SHA1 Message Date
Federico Lebrón 2141705337 Fix operator!= for Dialects.
Currently the global operator!=(bool, bool) is selected due to the implicit bool
conversion operator. Since this is never the desired semantics, we give it a
standard operator!= and make the bool conversion explicit.

Depends On D86809

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86810
2020-09-10 19:18:24 +00:00
Federico Lebrón d867be5de3 Allow Dialects to be initialized via nullptr.
This allows Dialect to follow the MLIR style of nullable objects, and in fact is expected by `Dialect::operator bool() const` which already tests whether `def == nullptr`. This just wasn't a reachable situation, because the constructor was dereferencing the pointer unconditionally.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86807
2020-09-10 19:14:53 +00:00
Federico Lebrón a39423084c Make struct dialects have the same field name as everything else, 'dialect'.
Also make the behavior of getting a dialect more forgiving, in the case where
there isn't a dialect associated with an attribute.

Depends On D86807

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D86809
2020-09-10 19:13:42 +00:00
Eugene Burmako 5638df1950 Introduce linalg.vecmat
This patch adds a new named structured op to accompany linalg.matmul and
linalg.matvec. We needed it for our codegen, so I figured it would be useful
to add it to Linalg.

Reviewed By: nicolasvasilache, mravishankar

Differential Revision: https://reviews.llvm.org/D87292
2020-09-10 18:48:14 +02:00
Frederik Gossen 018f6936db [MLIR][Standard] Simplify `tensor_from_elements`
Define assembly format and add required traits.

Differential Revision: https://reviews.llvm.org/D87366
2020-09-10 14:42:51 +00:00
aartbik 3c42c0dcf6 [mlir] [VectorOps] Enable 32-bit index optimizations
Rationale:
After some discussion we decided that it is safe to assume 32-bit
indices for all subscripting in the vector dialect (it is unlikely
the dialect will be used; or even work; for such long vectors).
So rather than detecting specific situations that can exploit
32-bit indices with higher parallel SIMD, we just optimize it
by default, and let users that don't want it opt-out.

Reviewed By: nicolasvasilache, bkramer

Differential Revision: https://reviews.llvm.org/D87404
2020-09-10 00:26:27 -07:00
Jakub Lichman fea175b59f [mlir][Linalg] Small refactoring of ConvOpVectorization
This commit addresses comments that were requested on D86619
after it was landed.

Differential Revision: https://reviews.llvm.org/D87354
2020-09-10 07:05:30 +00:00
MaheshRavishankar a7b2977aa6 [mlir][Linalg] Add Utility method to get loop ranges for a LinalgOp.
Also refactor the getViewSizes method to work on LinalgOp instead of
being a templated version. Keeping the templated version for
compatibility.

Differential Revision: https://reviews.llvm.org/D87303
2020-09-09 22:55:39 -07:00
David Blaikie 3e4e0fb243 mlir/Transforms/BufferPlacement.h: Add missing override 2020-09-09 18:18:06 -07:00
Sean Silva be35264ab5 Wordsmith RegionBranchOpInterface verification errors
I was having a lot of trouble parsing the messages. In particular, the
messages like:

```
<stdin>:3:8: error: 'scf.if' op  along control flow edge from Region #0 to scf.if source #1 type '!npcomprt.tensor' should match input #1 type 'tensor<?xindex>'
```

In particular, one thing that kept catching me was parsing the "to scf.if
source #1 type" as one thing, but really it is
"to parent results: source type #1".

Differential Revision: https://reviews.llvm.org/D87334
2020-09-09 12:50:23 -07:00
Jakub Lichman 53ffeea6d5 [mlir][Linalg] Reduction dimensions specified in TC definition of ConvOps.
This commit specifies reduction dimensions for ConvOps. This prevents
running reduction loops in parallel and enables easier detection of kernel dimensions
which we will need later on.

Differential Revision: https://reviews.llvm.org/D87288
2020-09-09 15:17:07 +00:00
Jakub Lichman edf244217a [mlir][Linalg] Integration tests for convolutions added.
This commit introduces end-to-end integration tests for
convolutions that test multiple ways of ConvOps lowering.

Differential Revision: https://reviews.llvm.org/D87277
2020-09-09 11:37:28 +00:00
Christian Sigg 3a577f5446 Rename MemRefDescriptor::getElementType() to MemRefDescriptor::getElementPtrType().
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D87284
2020-09-09 11:45:39 +02:00
Marcel Koester feb0b9c3bb [mlir] Added support for loops to BufferPlacement transformation.
The current BufferPlacement transformation cannot handle loops properly. Buffers
passed via backedges will not be freed automatically introducing memory leaks.
This CL adds support for loops to overcome these limitations.

Differential Revision: https://reviews.llvm.org/D85513
2020-09-09 10:53:35 +02:00
Frederik Gossen 5106a8b8f8 [MLIR][Shape] Lower `shape_of` to `dynamic_tensor_from_elements`
Take advantage of the new `dynamic_tensor_from_elements` operation in `std`.
Instead of stack-allocated memory, we can now lower directly to a single `std`
operation.

Differential Revision: https://reviews.llvm.org/D86935
2020-09-09 07:55:13 +00:00
Frederik Gossen 133322d2e3 [MLIR][Standard] Update `tensor_from_elements` assembly format
Remove the redundant parenthesis that are used for none of the other operation
formats.

Differential Revision: https://reviews.llvm.org/D86287
2020-09-09 07:45:46 +00:00
Frederik Gossen 6a494e117c [MLIR] Add debug support for ignored patterns
The rewrite engine's cost model may determine some patterns to be irrelevant
ahead of their application. These patterns were silently ignored previously and
now cause a message in `--debug` mode.

Differential Revision: https://reviews.llvm.org/D87290
2020-09-09 07:18:30 +00:00
Rahul Joshi 8893d0816c [MLIR] Change Operation::create() methods to use Value/Type/Block ranges.
- Introduce a new BlockRange class to represent range of blocks (constructible from
  an ArrayRef<Block *> or a SuccessorRange);
- Change Operation::create() methods to use TypeRange for result types, ValueRange for
  operands and BlockRange for successors.

Differential Revision: https://reviews.llvm.org/D86985
2020-09-08 14:19:05 -07:00
Mehdi Amini 97e77ac0ed Add more explicit error message when creating a type or attribute for an unregistered dialect (NFC)
Differential Revision: https://reviews.llvm.org/D87177
2020-09-08 16:59:26 +00:00
Lubomir Litchev e2394245eb Add an option for unrolling loops up to a factor.
Currently, there is no option to allow for unrolling a loop up to a specific factor (specified by the user).
The code for doing that is there and there are benefits when unrolling is done  to smaller loops (smaller than the factor specified).

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D87111
2020-09-08 09:23:38 -07:00
Benjamin Kramer 51d30c3429 [mlir][VectorOps] Fix more GCC5 weirdness
VectorToSCF.cpp:515:47: error: specialization of 'template<class TransferOpTy> mlir::LogicalResult mlir::VectorTransferRewriter<TransferOpTy>::matchAndRewrite(mlir::Operation*, mlir::PatternRewriter&) const' in different namespace [-fpermissive]
2020-09-08 15:41:39 +02:00
Ehsan Toosi 4e9f4d0b9d [mlir] Fix bug in copy removal
A crash could happen due to copy removal. The bug is fixed and two more
test cases are added.

Differential Revision: https://reviews.llvm.org/D87128
2020-09-08 14:17:13 +02:00
Benjamin Kramer df63eedef6 [mlir][VectorOps]
Put back anonymous namespace to work around GCC5 bug.

VectorToSCF.cpp:241:61: error: specialization of 'template<class ConcreteOp> mlir::LogicalResult {anonymous}::NDTransferOpHelper<ConcreteOp>::doReplace()' in different namespace [-fpermissive]
2020-09-08 14:03:30 +02:00
Ehsan Toosi 847299d3f0 [mlir] remove BufferAssignmentPlacer from BufferAssignmentOpConversionPattern
BufferPlacement has been removed, as allocations are no longer placed during the conversion.

Differential Revision: https://reviews.llvm.org/D87079
2020-09-08 13:04:22 +02:00
Benjamin Kramer 307dc7b236 [mlir][VectorOps] Clean up outdated comments. NFCI.
While there
- De-templatify code that can use function_ref
- Make BoundCaptures usable when they're const
- Address post-submit review comment (static function into global namespace)
2020-09-08 12:02:00 +02:00
Jakub Lichman 83d82d1fb1 [mlir] Fix of broken build on windows caused by using uint 2020-09-08 09:42:25 +00:00
Benjamin Kramer 239eff502b [mlir][VectorOps] Redo the scalar loop emission in VectoToSCF to pad instead of clipping
This replaces the select chain for edge-padding with an scf.if that
performs the memory operation when the index is in bounds and uses the
pad value when it's not. For transfer_write the same mechanism is used,
skipping the store when the index is out of bounds.

The integration test has a bunch of cases of how I believe this should
work.

Differential Revision: https://reviews.llvm.org/D87241
2020-09-08 11:15:25 +02:00
Jakub Lichman 67b37f571c [mlir] Conv ops vectorization pass
In this commit a new way of convolution ops lowering is introduced.
The conv op vectorization pass lowers linalg convolution ops
into vector contractions. This lowering is possible when conv op
is first tiled by 1 along specific dimensions which transforms
it into dot product between input and kernel subview memory buffers.
This pass converts such conv op into vector contraction and does
all necessary vector transfers that make it work.

Differential Revision: https://reviews.llvm.org/D86619
2020-09-08 08:47:42 +00:00
Nicolas Vasilache 9be6178449 [mlir][Vector] Make VectorToSCF deterministic
Differential Revision: https://reviews.llvm.org/D87273
2020-09-08 04:18:22 -04:00
Mehdi Amini 8dcd6ea644 Update SVG images to be properly cropped (NFC) 2020-09-08 00:56:10 +00:00
Mehdi Amini 63d1dc6665 Add a doc/tutorial on traversing the IR
Reviewed By: stephenneuendorffer

Differential Revision: https://reviews.llvm.org/D87221
2020-09-08 00:07:03 +00:00
Mehdi Amini 0a63679267 Add documentation for getDependentDialects() in the PassManagement infra docs
Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D87181
2020-09-07 23:59:11 +00:00
Frederik Gossen a70f2eb3e3 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.
Merge the two lowering passes because they are not useful by themselves. The new
pass lowers to `std` and `scf` is considered an auxiliary dialect.

See also
https://llvm.discourse.group/t/conversions-with-multiple-target-dialects/1541/12

Differential Revision: https://reviews.llvm.org/D86779
2020-09-07 14:39:37 +00:00
Alex Zinenko 1e1a4a4819 [mlir] Take ValueRange instead of ArrayRef<Value> in StructuredIndexed
This was likely overlooked when ValueRange was first introduced. There is no
reason why StructuredIndexed needs specifically an ArrayRef so use ValueRange
for better type compatibility with the rest of the APIs.

Reviewed By: nicolasvasilache, mehdi_amini

Differential Revision: https://reviews.llvm.org/D87127
2020-09-07 15:17:39 +02:00
David Truby 973800dc7c Revert "[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings."
This reverts commit 15acdd7543.
2020-09-07 13:37:32 +01:00
Nicolas Vasilache 1c849ec40a [MLIR] Fix Win test due to partial order of CHECK directives
Differential Revision: https://reviews.llvm.org/D87230
2020-09-07 08:14:35 -04:00
Frederik Gossen 15acdd7543 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.
Merge the two lowering passes because they are not useful by themselves. The new
pass lowers to `std` and `scf` is considered an auxiliary dialect.

See also
https://llvm.discourse.group/t/conversions-with-multiple-target-dialects/1541/12

Differential Revision: https://reviews.llvm.org/D86779
2020-09-07 12:12:36 +00:00
Frederik Gossen 136eb79a88 [MLIR][Standard] Add `dynamic_tensor_from_elements` operation
With `dynamic_tensor_from_elements` tensor values of dynamic size can be
created. The body of the operation essentially maps the index space to tensor
elements.

Declare SCF operations in the `scf` namespace to avoid name clash with the new
`std.yield` operation. Resolve ambiguities between `linalg/shape/std/scf.yield`
operations.

Differential Revision: https://reviews.llvm.org/D86276
2020-09-07 11:44:43 +00:00
Nicolas Vasilache 8d64df9f13 [mlir][Vector] Revisit VectorToSCF.
Vector to SCF conversion still had issues due to the interaction with the natural alignment derived by the LLVM data layout. One traditional workaround is to allocate aligned. However, this does not always work for vector sizes that are non-powers of 2.

This revision implements a more portable mechanism where the intermediate allocation is always a memref of elemental vector type. AllocOp is extended to use the natural LLVM DataLayout alignment for non-scalar types, when the alignment is not specified in the first place.

An integration test is added that exercises the transfer to scf.for + scalar lowering with a 5x5 transposition.

Differential Revision: https://reviews.llvm.org/D87150
2020-09-07 05:19:43 -04:00
Stella Laurenzo 7403e3ee32 Extend PyConcreteType to support intermediate base classes.
* Resolves todos from D87091.
* Also modifies PyConcreteAttribute to follow suite (should be useful for ElementsAttr and friends).
* Adds a test to ensure that the ShapedType base class functions as expected.

Differential Revision: https://reviews.llvm.org/D87208
2020-09-06 23:39:47 -07:00
zhanghb97 54d432aa6b [mlir] Add Shaped Type, Tensor Type and MemRef Type to python bindings.
Based on the PyType and PyConcreteType classes, this patch implements the bindings of Shaped Type, Tensor Type and MemRef Type subclasses.
The Tensor Type and MemRef Type are bound as ranked and unranked separately.
This patch adds the ***GetChecked C API to make sure the python side can get a valid type or a nullptr.
Shaped type is not a kind of standard types, it is the base class for vectors, memrefs and tensors, this patch binds the PyShapedType class as the base class of Vector Type, Tensor Type and MemRef Type subclasses.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D87091
2020-09-06 11:45:54 -07:00
Uday Bondhugula 430b47a17d [MLIR] Remove unused arg from affine tiling validity check
Drop unused function arg from affine loop tiling validity check.
2020-09-05 18:04:20 +05:30
Lei Zhang 7d53fecb67 [spirv] Add more target and resource limit fields
These fields will be used to choose/influence patterns for
SPIR-V code generation.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D87106
2020-09-04 10:26:34 -04:00
Marius Brehler 4f7cdc10a8 [mlir] Refactor standalone-translate to use mlirTranslateMain()
This refactors the standalone-translate executable to use mlirTranslateMain() declared in Translation.h and further applies D87129.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D87131
2020-09-04 15:26:44 +02:00
Marius Brehler c633842f13 [mlir] Fix includes in mlir-translate
Drops the include on InitAllDialects.h, as dialects are now initialized in the translation passes.

Differential Revision: https://reviews.llvm.org/D87129
2020-09-04 15:22:38 +02:00
Benjamin Kramer 0c2a4d3c1c [mlir][VectorOps] Simplify code. NFCI. 2020-09-04 11:10:20 +02:00
Alex Zinenko aec9e20a3e [mlir] introduce type constraints for operands of LLVM dialect operations
Historically, the operations in the MLIR's LLVM dialect only checked that the
operand are of LLVM dialect type without more detailed constraints. This was
due to LLVM dialect types wrapping LLVM IR types and having clunky verification
methods. With the new first-class modeling, it is possible to define type
constraints similarly to other dialects and use them to enforce some
correctness rules in verifiers instead of having LLVM assert during translation
to LLVM IR. This hardening discovered several issues where MLIR was producing
LLVM dialect operations that cannot exist in LLVM IR.

Depends On D85900

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85901
2020-09-04 10:01:59 +02:00
Mehdi Amini 23bcfbcc98 Add comment to describe a field member (NFC)
Address post-review comment.
2020-09-04 05:25:35 +00:00
aartbik 060c9dd1cc [mlir] [VectorOps] Improve SIMD compares with narrower indices
When allowed, use 32-bit indices rather than 64-bit indices in the
SIMD computation of masks. This runs up to 2x and 4x faster on
a number of AVX2 and AVX512 microbenchmarks.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D87116
2020-09-03 21:43:38 -07:00
Lei Zhang 8d420fb3a0 [spirv][nfc] Simplify resource limit with default values
These deafult values are gotten from Vulkan required limits.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D87090
2020-09-03 13:29:26 -04:00