Zoran Jovanovic
|
cca29e8f6e
|
[mips][microMIPSr6] Implement SUB and SUBU instructions
Differential Revision: http://reviews.llvm.org/D8764
llvm-svn: 236118
|
2015-04-29 16:22:46 +00:00 |
|
Zoran Jovanovic
|
5f34d44354
|
[mips][microMIPSr6] Implement ADD, ADDU and ADDIU instructions
Differential Revision: http://reviews.llvm.org/D8704
llvm-svn: 236111
|
2015-04-29 15:11:07 +00:00 |
|
Jozef Kolek
|
8e086cedfa
|
[mips][microMIPSr6] Implement CACHE and PREF instructions
Implement CACHE and PREF instructions using mapping.
Differential Revision: http://reviews.llvm.org/D8893
llvm-svn: 235379
|
2015-04-21 11:17:25 +00:00 |
|
Jozef Kolek
|
207d248eba
|
[mips][microMIPSr6] Implement BITSWAP instruction
Implement BITSWAP instruction using mapping.
Differential Revision: http://reviews.llvm.org/D8857
llvm-svn: 235321
|
2015-04-20 18:14:59 +00:00 |
|
Jozef Kolek
|
676d60125c
|
[mips][microMIPSr6] Implement disassembler support
Implement disassembler support for microMIPS32r6.
Differential Revision: http://reviews.llvm.org/D8490
llvm-svn: 235307
|
2015-04-20 14:40:38 +00:00 |
|
Jozef Kolek
|
5de4a6c0af
|
[mips][microMIPSr6] Implement BALC and BC instructions
This patch implements BALC and BC instructions using mapping.
Differential Revision: http://reviews.llvm.org/D8388
llvm-svn: 235302
|
2015-04-20 13:04:14 +00:00 |