3bea9bfa04
MC: Sketch registry support for target specific assembler backends.
...
llvm-svn: 96762
2010-02-21 21:53:53 +00:00
31a9212b0b
It turned out that we failed to emit proper symbol stubs on non-x86/darwin for ages (we emitted a reference to a stub, but no stub was emitted). The code inside x86-32/macho target objfile lowering should actually be the generic one - move it there.
...
This (I really, really hope) should fix EH issues on ppc/darwin
and arm/darwin.
llvm-svn: 96755
2010-02-21 20:28:15 +00:00
455201ba71
Remove a bunch of duplicated code, where there was one version taking a std::ostream
...
and another taking a raw_ostream, but otherwise identical. Use raw_ostream everywhere.
llvm-svn: 96746
2010-02-21 19:15:19 +00:00
951d27e544
Enable assertion to detect cyclic valno references.
...
This changes the stack overflow in PR6363 to an assertion failure.
llvm-svn: 96744
2010-02-21 18:51:48 +00:00
e96503faa1
IT turns out that during jumpless setcc lowering eq and ne were swapped.
...
This fixes PR6348
llvm-svn: 96734
2010-02-21 12:28:58 +00:00
3c29aff9ff
fix and un-xfail X86/vec_ss_load_fold.ll
...
llvm-svn: 96720
2010-02-21 04:53:34 +00:00
a07c9c7c56
Undo r96654. The printing of ARM shift instructions in canonical forms can be
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handled in ARMInstPrinter.cpp.
And added PLD/PLDW/PLI (Preload Data/Instruction) for disassembly only.
llvm-svn: 96719
2010-02-21 04:42:01 +00:00
18a32ce0f3
rename SelectScalarSSELoad -> SelectScalarSSELoadXXX and rewrite
...
it to follow the mode needed by the new isel. Instead of returning
the input and output chains, it just returns the (currently only one,
which is a silly limitation) node that has input and output chains.
Since we want the old thing to still work, add a new
SelectScalarSSELoad to emulate the old interface. The XXX suffix
and the wrapper will eventually go away.
llvm-svn: 96715
2010-02-21 03:17:59 +00:00
986ab3fb1d
Eliminate some uses of immAllOnes, just use -1, it does
...
the same thing and is more efficient for the matcher.
llvm-svn: 96712
2010-02-21 03:12:16 +00:00
4eebb94094
Rename getSDiv to getExactSDiv to reflect its behavior in cases where
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the division would have a remainder.
llvm-svn: 96693
2010-02-19 19:35:48 +00:00
85af256779
Check for overflow when scaling up an add or an addrec for
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scaled reuse.
llvm-svn: 96692
2010-02-19 19:32:49 +00:00
fbc9d8d424
Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in
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the armv6 nightly tests.
llvm-svn: 96691
2010-02-19 18:59:53 +00:00
cf9c64e6e3
Add a comment.
...
llvm-svn: 96688
2010-02-19 18:49:22 +00:00
7e47767763
Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254.
...
Also, FileCheck'ize a test.
llvm-svn: 96686
2010-02-19 18:17:13 +00:00
6b1e2a829d
Teach ScalarEvolution how to compute a tripcount for a loop with
...
true or false as its exit condition. These are usually eliminated by
SimplifyCFG, but the may be left around during a pass which wishes
to preserve the CFG.
llvm-svn: 96683
2010-02-19 18:12:07 +00:00
336c0a1c87
Revert Anton's most recent EH patch (r96637), since it breaks a lot of
...
ARM and Thumb tests.
llvm-svn: 96680
2010-02-19 17:10:59 +00:00
d0bf6f640f
Revert commits 96556 and 96640, because commit 96556 breaks the
...
dragonegg self-host build. I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier. The
symptom of the 96556 miscompile is the following crash:
llvm[3]: Compiling AlphaISelLowering.cpp for Release build
cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
Stack dump:
0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
g++: Internal error: Aborted (program cc1plus)
This occurs when building LLVM using LLVM built by LLVM (via
dragonegg). Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM. Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.
Found by bisection.
r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines
Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines
Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.
e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2
llvm-svn: 96672
2010-02-19 11:30:41 +00:00
1d6827adef
recommit 96626, evidence that it broke things appears
...
to be spurious
llvm-svn: 96662
2010-02-19 07:14:22 +00:00
1ca8af9b76
Added entries for ASR, LSL, LSR, ROR, and RRX so that the disassembler prints
...
out the canonical form (A8.6.98) instead of the pseudo-instruction as provided
via MOVs.
DBG_ARM_DISASM=YES llvm-mc -triple=arm-unknown-unknown --disassemble
0xc0 0x00 0xa0 0xe1
Opcode=29 Name=ASR Format=ARM_FORMAT_LDMISCFRM
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------
asr r0, r0, #1
llvm-svn: 96654
2010-02-19 02:12:06 +00:00
1f790c28d0
Revert 96626, which causes build failure on ppc Darwin.
...
llvm-svn: 96653
2010-02-19 01:54:37 +00:00
d2d9252f35
Transform (xor (setcc), (setcc)) == / != 1 to
...
(xor (setcc), (setcc)) != / == 1.
e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2
llvm-svn: 96640
2010-02-19 00:34:39 +00:00
9baeb02000
Use the same encoding for EH stuff uniformly on all MachO targets.
...
This hopefulyl should unbreak EH on PPC/Darwin.
llvm-svn: 96637
2010-02-19 00:29:36 +00:00
aa34003f6f
Radar 7636153. In the presence of large call frames, it's not sufficient
...
for ARM to just check if a function has a FP to determine if it's safe
to simplify the stack adjustment pseudo ops prior to eliminating frame
indices. Allow targets to override the default behavior and does so for ARM
and Thumb2.
llvm-svn: 96634
2010-02-19 00:16:24 +00:00
2446f57503
When determining the set of interesting reuse factors, consider
...
strides in foreign loops. This helps locate reuse opportunities
with existing induction variables in foreign loops and reduces
the need for inserting new ones. This fixes rdar://7657764.
llvm-svn: 96629
2010-02-19 00:05:23 +00:00
60b3326435
Indvars needs to explicitly notify ScalarEvolution when it is replacing
...
a loop exit value, so that if a loop gets deleted, ScalarEvolution
isn't stick holding on to dangling SCEVAddRecExprs for that loop. This
fixes PR6339.
llvm-svn: 96626
2010-02-18 23:26:33 +00:00
688a90e2d7
Added LDRD_PRE/POST & STRD_PRE/POST for disassembly only.
...
llvm-svn: 96619
2010-02-18 22:31:18 +00:00
1feba3c980
replaceUsesOfWithOnConstant implementation for unions.
...
llvm-svn: 96616
2010-02-18 21:43:45 +00:00
c43d264cc0
Hoist this loop-invariant logic out of the loop.
...
llvm-svn: 96614
2010-02-18 21:34:02 +00:00
c953acbd7f
Always normalize spill weights, also for intervals created by spilling.
...
Moderate the weight given to very small intervals.
The spill weight given to new intervals created when spilling was not
normalized in the same way as the original spill weights calculated by
CalcSpillWeights. That meant that restored registers would tend to hang around
because they had a much higher spill weight that unspilled registers.
This improves the runtime of a few tests by up to 10%, and there are no
significant regressions.
llvm-svn: 96613
2010-02-18 21:33:05 +00:00
5ffef745c2
Make CodePlacementOpt detect special EH control flow by
...
checking whether AnalyzeBranch disagrees with the CFG
directly, rather than looking for EH_LABEL instructions.
EH_LABEL instructions aren't always at the end of the
block, due to FP_REG_KILL and other things. This fixes
an infinite loop compiling MultiSource/Benchmarks/Bullet.
llvm-svn: 96611
2010-02-18 21:25:53 +00:00
82ab3f8727
Destroy MDNodes gracefully while deleting llvm context.
...
llvm-svn: 96609
2010-02-18 20:53:16 +00:00
654528e8a7
Generate DBG_VALUE from dbg.value intrinsics. These currently
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comes out as comments but will eventually generate DWARF.
llvm-svn: 96601
2010-02-18 18:51:15 +00:00
a124a46748
Remap the call sites of a shared function in interrupt line functions.
...
llvm-svn: 96591
2010-02-18 18:00:35 +00:00
32db8a17c5
Re-factoring.
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llvm-svn: 96589
2010-02-18 17:32:25 +00:00
3d928db087
Uniformize the way these options are printed. Requested by
...
Russell Wallace.
llvm-svn: 96580
2010-02-18 14:37:52 +00:00
1804b4f9eb
Remove terminating dot in description. Inconsistency pointed
...
out by Russell Wallace.
llvm-svn: 96579
2010-02-18 14:10:41 +00:00
142b9edaf1
Refer to -help instead of --help since this is what tools themselves say.
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Also, have tools output -help-hidden rather than refer to --help-hidden,
for consistency, and likewise adjust documentation. This doesn't change
every mention of --help, only those which seemed clearly safe.
llvm-svn: 96578
2010-02-18 14:08:13 +00:00
fd47c79774
add a missing type cast.
...
llvm-svn: 96574
2010-02-18 06:33:42 +00:00
c6c13a3515
Use NEON vmin/vmax instructions for floating-point selects.
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Radar 7461718.
llvm-svn: 96572
2010-02-18 06:05:53 +00:00
74c904589e
Added LDRSBT, LDRHT, LDRSHT for disassembly only. And fixed encoding errors
...
of AI3ldsbpo, AI3ldhpo, and AI3ldshpo in ARMInstrFormats.td in the process.
llvm-svn: 96565
2010-02-18 03:27:42 +00:00
0ceb68a552
Some dag combiner goodness:
...
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
llvm-svn: 96556
2010-02-18 02:13:50 +00:00
f3d79a5025
Added for disassembly only the variants of DMB, DSB, and ISB.
...
llvm-svn: 96540
2010-02-18 00:19:08 +00:00
1d7179ad63
MC/Mach-O: Update fixup values for change to X86 offsets.
...
llvm-svn: 96532
2010-02-17 23:45:16 +00:00
cb2deb2aaf
Remove the NEON N2VSInt instruction class: it's only used in one place and
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since it has no pattern, there's not much point in distinguishing an "N2VS"
class for intrinsics anyway.
llvm-svn: 96525
2010-02-17 22:42:54 +00:00
1d793a5e0e
Added CLREX (Clear-Exclusive) for disassembly only.
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A8.6.30
llvm-svn: 96523
2010-02-17 22:37:58 +00:00
004d280d5e
More cleanup for NEON:
...
* Use "S" abbreviation for scalar single FP registers in class and pattern
names, instead of keeping the "D" (for "double") abbreviation and tacking on
an "s" elsewhere in the name.
* Move the scalar single FP register classes and patterns to be more
consistent with other definitions in the file.
* Rename "VNEGf32d" definition to "VNEGfd" for consistency.
* Deleted the N2VDIntsPat pattern; N2VSPat is good enough.
llvm-svn: 96521
2010-02-17 22:23:11 +00:00
5454e0633e
Added RFE for disassembly only.
...
B6.1.8 RFE Return From Exception loads the PC and the CPSR from the word at the
specified address and the following word respectively.
llvm-svn: 96519
2010-02-17 21:39:10 +00:00
b7941b0703
Make the non-temporal bit "significant" in MemSDNodes so they aren't
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CSE'd or otherwise combined with temporal MemSDNodes.
llvm-svn: 96505
2010-02-17 20:21:42 +00:00
34d6a4ff17
Remember to define super registers in mips calls.
...
llvm-svn: 96504
2010-02-17 20:18:50 +00:00
eb85711e43
Add Regex::sub, for doing regular expression substitution with backreferences.
...
llvm-svn: 96503
2010-02-17 20:08:42 +00:00
5d583da601
Dead code elimination.
...
llvm-svn: 96496
2010-02-17 19:13:56 +00:00
bdceca6f49
"Fix and issue in SparcAsmPrinter where multiple identical .LLGETPCHn symbols could be emitted in the same file (it was uniqued by block number, but not by function number). " Patch by Nathan Keynes!
...
llvm-svn: 96495
2010-02-17 18:57:19 +00:00
1fa9c2cce4
move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter,
...
and add a sparc implementation that knows about delay slots. Patch by
Nathan Keynes!
llvm-svn: 96492
2010-02-17 18:52:56 +00:00
cb80e2527e
add a note, from PR5100
...
llvm-svn: 96490
2010-02-17 18:42:24 +00:00
69346eb94f
Added routine to clone the body of a function and maintain a map of already
...
cloned functions.
llvm-svn: 96485
2010-02-17 18:11:29 +00:00
fe562b6598
Pacify gcc-4.5, which warns (correctly) that these switches have
...
cases that are not part of the enum.
llvm-svn: 96477
2010-02-17 14:52:22 +00:00
81b3aa1b2f
Added a function to clone locals of a function.( which for pic16 are globals
...
with mangled names).
llvm-svn: 96465
2010-02-17 06:48:50 +00:00
0f5c8f2339
Removed header files from .h by adding forward decls.
...
Renamed PIC16FrameOverlay namespace to PIC16OVERLAY.
Renamed PIC16FrameOverlay class to PIC16Overlay.
llvm-svn: 96463
2010-02-17 06:46:23 +00:00
036b2f6542
Added BFI for disassembly only.
...
A8.6.18 BFI - Bitfield insert (Encoding A1)
llvm-svn: 96462
2010-02-17 06:31:48 +00:00
e78bc753fe
sink special case "cannotyetselect" for intrinsics out of the
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tblgen splatted code into the implementation.
llvm-svn: 96460
2010-02-17 06:28:22 +00:00
3f48215480
rename and document some arguments so I don't have to keep
...
reverse engineering what they are.
llvm-svn: 96456
2010-02-17 06:07:47 +00:00
cf1f5b0286
Use pointer-wide encoding for LSDA and FDE on Darwin.
...
Hopefully, this will fix the remaining issues seen there.
llvm-svn: 96454
2010-02-17 05:53:11 +00:00
5734217c84
Removed an early out which was causing the PBQP allocator to not compute live-in sets or run the rewriter.
...
llvm-svn: 96450
2010-02-17 03:42:51 +00:00
c70e994364
Fix SCEVExpander's existing PHI reuse checking to recognize the
...
case where there are loop-invariant instructions somehow left
inside the loop, and in a position where they won't dominate
the IV increment position.
llvm-svn: 96448
2010-02-17 02:39:31 +00:00
ca55a04273
Before setting scope end marker, pay attention to scope begin marker and existing scope end marker, if any. Scope must begin before it ends and nested inlined scope do not truncate surrounding scope.
...
llvm-svn: 96445
2010-02-17 02:20:34 +00:00
b67807e7ef
daniel remembered why this was needed.
...
llvm-svn: 96440
2010-02-17 01:55:54 +00:00
d8716676ea
add a comment explaining why darwin/i386 uses ## as a comment.
...
It's not clear why this is really required, but it was explicitly
added in r48808 with no real explanation or rdar #.
llvm-svn: 96438
2010-02-17 01:38:01 +00:00
84a85fcb91
Initial implementation of PIC16 Cloner pass.
...
This pass is supposed to be run on the linked .bc module.
It traveses the module call graph twice. Once starting from the main function
and marking each reached function as "ML". Again, starting from the ISR
and cloning any reachable function that was marked as "ML". After cloning
the function, it remaps all the call sites in IL functions to call the
cloned functions.
Currently only marking is being done.
llvm-svn: 96435
2010-02-17 01:11:53 +00:00
cf39be32bf
Fold bswap(undef) to undef.
...
llvm-svn: 96432
2010-02-17 00:54:58 +00:00
13ac3b2139
Delete some unneeded casts.
...
llvm-svn: 96429
2010-02-17 00:42:19 +00:00
5f10d6c52c
Don't attempt to divide INT_MIN by -1; consider such cases to
...
have overflowed.
llvm-svn: 96428
2010-02-17 00:41:53 +00:00
12995ba3c0
Make the operand and format specifier match, and print all
...
64 bits, fixing a variety of problems.
llvm-svn: 96421
2010-02-17 00:37:20 +00:00
9e89907ed5
Wrap lines to 80 columns and generally try to clean up whitespace and
...
indentation. No functional changes.
llvm-svn: 96418
2010-02-17 00:31:29 +00:00
85e5081c77
Make error statement more personal.
...
llvm-svn: 96410
2010-02-16 22:47:14 +00:00
afac7dad21
fix rdar://7653908, a crash on a case where we would fold a load
...
into a roundss intrinsic, producing a cyclic dag. The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection. Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.
llvm-svn: 96408
2010-02-16 22:35:06 +00:00
37f106e18c
Handle tGPR register class in a few more places. This fixes some llvm-gcc
...
build failures due to my fix for pr6111.
llvm-svn: 96402
2010-02-16 22:01:59 +00:00
4c444bf606
Add SMC (Secure Monitor Call) system instruction for disassembly only.
...
llvm-svn: 96401
2010-02-16 21:59:54 +00:00
1b967bf0e4
Really reserve R2 on PPC Darwin. PR 6314.
...
llvm-svn: 96399
2010-02-16 21:53:27 +00:00
7c7cfbbc38
Use line and column number to distinguish two lexical blocks at the same level.
...
llvm-svn: 96395
2010-02-16 21:39:34 +00:00
3e2cad3b1a
80 column cleanup
...
llvm-svn: 96393
2010-02-16 21:23:02 +00:00
82b04130cb
Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)).
...
If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).
Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335
llvm-svn: 96389
2010-02-16 21:09:44 +00:00
fba7fce5be
Remove trailing whitespace
...
llvm-svn: 96388
2010-02-16 21:07:46 +00:00
aff96b2132
Rename SuccessorNumber to GetSuccessorNumber.
...
llvm-svn: 96387
2010-02-16 21:06:42 +00:00
9641d06809
Add support for emitting non-temporal stores for DAGs marked
...
non-temporal. Fix from r96241 for botched encoding of MOVNTDQ.
Add documentation for !nontemporal metadata.
Add a simpler movnt testcase.
llvm-svn: 96386
2010-02-16 20:50:18 +00:00
2284ddab56
Update Thumb2 to not use CarryDefIsUnused or CarryDefIsUsed predicates, but
...
to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.
llvm-svn: 96384
2010-02-16 20:42:29 +00:00
756ab53e60
Remove redundant setting of Defs. CPSR is already marked by the block level set of Defs.
...
llvm-svn: 96383
2010-02-16 20:35:59 +00:00
6deab96c81
Refactor rewriting for PHI nodes into a separate function.
...
llvm-svn: 96382
2010-02-16 20:25:07 +00:00
0a334d0df9
First step in eliminating the CarryDefIsUnused and CarryDefIsUsed predicates.
...
They won't work with the new ISel mechanism, as Requires predicates are no
longer allowed to reference the node being selected. Moving the predicate to
the patterns instead solves the problem.
This patch handles ARM mode. Thumb2 will follow.
llvm-svn: 96381
2010-02-16 20:17:57 +00:00
46c39d4f1f
Added for disassembly the following instructions:
...
o Store Return State (SRSW, SRS)
o Load/Store Coprocessor (LDC/STC and friends)
o MSR (immediate)
llvm-svn: 96380
2010-02-16 20:04:27 +00:00
92cdb6eec5
Split critical edges as needed for load PRE.
...
llvm-svn: 96378
2010-02-16 19:51:59 +00:00
3de492ec35
Refactor to share code to find the position of a basic block successor in the
...
terminator's list of successors.
llvm-svn: 96377
2010-02-16 19:49:17 +00:00
0849ed5e26
Fix whitespace.
...
llvm-svn: 96372
2010-02-16 19:42:34 +00:00
10e3022b10
Function attributes have index ~0, not 0
...
llvm-svn: 96370
2010-02-16 19:28:02 +00:00
70aa8d0745
Fix pr6111: Avoid using the LR register for the target address of an indirect
...
branch in ARM v4 code, since it gets clobbered by the return address before
it is used. Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.
llvm-svn: 96360
2010-02-16 17:24:15 +00:00
cbd43f89ac
Introduce isOpaqueTy and use it rather than isa<OpaqueType>. Also, move some
...
methods to try to have the type predicates be more logically positioned.
llvm-svn: 96349
2010-02-16 14:50:09 +00:00
19d0b47b1f
There are two ways of checking for a given type, for example isa<PointerType>(T)
...
and T->isPointerTy(). Convert most instances of the first form to the second form.
Requested by Chris.
llvm-svn: 96344
2010-02-16 11:11:14 +00:00
d7d8afabd0
Minor warning fixes (semicolons, newline at EOF).
...
llvm-svn: 96343
2010-02-16 10:25:04 +00:00
52bfe24e2c
mark all the generated node predicates 'const'.
...
llvm-svn: 96337
2010-02-16 07:26:36 +00:00
4964ef88c2
make pcrel immediate values relative to the start of the field,
...
not the end of the field, fixing rdar://7651978
llvm-svn: 96330
2010-02-16 05:03:17 +00:00
adcee844ea
The code section for an ISR has a specific address.
...
Currently, whether a function is ISR or not is encoded in the section attribute for that function.
llvm-svn: 96322
2010-02-16 03:41:07 +00:00
d7eb693643
Handle DBG_VALUE mixed with labels when doing PHI
...
elimination. Before a DBG_VALUE could affect codegen.
The solution here is imperfect and not final.
llvm-svn: 96318
2010-02-16 01:57:28 +00:00
af25cf825c
Drop support for the InReg attribute on the ppc backend. This was used by
...
llvm-gcc but has been replaced with pad argument which don't need any
special backend support.
llvm-svn: 96312
2010-02-16 01:50:18 +00:00
521efe68ab
Split the main for-each-use loop again, this time for GenerateTruncates,
...
as it also peeks at which registers are being used by other uses. This
makes LSR less sensitive to use-list order.
llvm-svn: 96308
2010-02-16 01:42:53 +00:00
d37e7b5bc5
Reapply 96294; now that I've gotten around to looking
...
at older buildbot messages, I see the failure predates
this patch.
llvm-svn: 96307
2010-02-16 01:27:47 +00:00
1776295bf1
Apply patch from http://llvm.org/bugs/attachment.cgi?id=4136 now that PR5004 is
...
finished.
llvm-svn: 96304
2010-02-16 00:58:02 +00:00
ae87fc43a7
Something broke. Hard to believe it was this patch
...
but it's harder to believe it's the other candidate,
so reverting. Temporarily I hope.
llvm-svn: 96303
2010-02-16 00:43:58 +00:00
148a972b67
When reusing an existing PHI node in a loop, be even more
...
strict about the requirements.
llvm-svn: 96301
2010-02-16 00:20:08 +00:00
a945c64b5a
Put repeated empty pattern into the AQI instruction class.
...
We could almost use a multiclass for the signed/unsigned instructions, but
there are only 6 of them so I guess it's not worth it.
llvm-svn: 96297
2010-02-15 23:43:47 +00:00
3f08464a1a
Fix a memory leak. Patch by Nicolas Geoffray.
...
llvm-svn: 96295
2010-02-15 23:16:53 +00:00
5b80f0d67f
More handling of DBG_VALUE.
...
llvm-svn: 96294
2010-02-15 23:05:03 +00:00
1be2063afd
Add missed entry to cmake build list file
...
llvm-svn: 96292
2010-02-15 22:55:13 +00:00
5d438e4ad2
Use ttype encoding consistently
...
llvm-svn: 96290
2010-02-15 22:38:25 +00:00
c9adb6a463
Fix a silly darwin-only typo introduced during merge.
...
llvm-svn: 96289
2010-02-15 22:38:10 +00:00
ab663a0bfe
Move TLOF implementations to libCodegen to resolve layering violation.
...
llvm-svn: 96288
2010-02-15 22:37:53 +00:00
ec2ba08d16
It turns out that we emitted completely wrong common EH frame since the early beginning! The "z" CIE augmentation mark indicates that there is an extra word containing the size of augmentation section. However, even for frames w/o any augmentation data we emitted size uleb! (this is the case of "unwinding through C code"). Thus frame moves information was emitterd completely wrong.
...
llvm-svn: 96287
2010-02-15 22:36:41 +00:00
397aecb6d6
Add suffix for stubs, so we won't have name clashes with private symbols.
...
llvm-svn: 96286
2010-02-15 22:36:26 +00:00
ae4ccc10da
Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
...
llvm-svn: 96285
2010-02-15 22:35:59 +00:00
1d9a8159df
Teach the verifier to check the condition on a branch and ensure that it has
...
'i1' type.
llvm-svn: 96282
2010-02-15 22:09:09 +00:00
2988d573e5
Fix PR6300.
...
A virtual register can be used before it is defined in the same MBB if the MBB
is part of a loop. Teach the implicit-def pass about this case.
llvm-svn: 96279
2010-02-15 22:03:29 +00:00
62f864dea3
Fix crash in VerifyType when checking Contexts. Because there may not be a
...
Module (we were called with verifyFunction and an unowned Function) we can't
rely on Mod->getContext().
llvm-svn: 96275
2010-02-15 21:52:04 +00:00
94e168f09e
Don't try to materialize a function that isn't materializable anyways. This
...
fixes a crash using FPM on a Function that isn't owned by a Module.
llvm-svn: 96273
2010-02-15 21:27:56 +00:00
780d2fe319
A function with no Module owner isn't materializable. This fixes F->dump() for
...
functions not embedded within modules.
llvm-svn: 96272
2010-02-15 21:27:20 +00:00
754946c113
Simplify.
...
llvm-svn: 96269
2010-02-15 21:08:22 +00:00
bcbaaba532
revert r96241. It breaks two regression tests, isn't documented,
...
and the testcase needs improvement.
llvm-svn: 96265
2010-02-15 20:53:01 +00:00
6fbfe5897c
fix PR6305 by handling BlockAddress in a helper function
...
called by jump threading.
llvm-svn: 96263
2010-02-15 20:47:49 +00:00
5e73ff2e3a
Split SelectionDAGISel::IsLegalAndProfitableToFold to
...
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
llvm-svn: 96255
2010-02-15 19:41:07 +00:00
63cedef74b
Add support for emitting non-temporal stores for DAGs marked
...
non-temporal.
llvm-svn: 96241
2010-02-15 17:02:56 +00:00
39c6d01879
Add non-temporal flags and remove an assumption of default arguments.
...
llvm-svn: 96240
2010-02-15 17:00:31 +00:00
cbd39c5def
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96239
2010-02-15 16:57:43 +00:00
15478ac350
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96238
2010-02-15 16:57:13 +00:00
772fc34209
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96237
2010-02-15 16:57:02 +00:00
87a5abea33
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96236
2010-02-15 16:56:53 +00:00
2138b0fc90
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96235
2010-02-15 16:56:34 +00:00
27d044d65d
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96234
2010-02-15 16:56:22 +00:00
3cd87cc5ee
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96233
2010-02-15 16:56:10 +00:00
cfa68983e8
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96232
2010-02-15 16:55:58 +00:00
af2931d7bf
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96231
2010-02-15 16:55:37 +00:00
0d0149f5ac
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96230
2010-02-15 16:55:24 +00:00
e2e2073303
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96229
2010-02-15 16:55:07 +00:00
ff34702b04
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96228
2010-02-15 16:53:33 +00:00
68ea4da8cb
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96227
2010-02-15 16:49:52 +00:00
3a0412f122
Add non-temporal flags to MachineMemOperand.
...
llvm-svn: 96226
2010-02-15 16:48:31 +00:00
9dff9bec31
Uniformize the names of type predicates: rather than having isFloatTy and
...
isInteger, we now have isFloatTy and isIntegerTy. Requested by Chris!
llvm-svn: 96223
2010-02-15 16:12:20 +00:00
6b5e62fb0b
Fix changes from r75027
...
llvm-svn: 96220
2010-02-15 15:00:44 +00:00
fefbff9cd8
When testing whether a given SCEV depends on a temporary symbolic
...
name, test whether the SCEV itself is that temporary symbolic name,
in addition to checking whether the symbolic name appears as a
possibly-indirect operand.
llvm-svn: 96216
2010-02-15 10:28:37 +00:00
d4df64d15f
no need to add the instruction count anymore.
...
llvm-svn: 96212
2010-02-15 06:38:41 +00:00
115158fa4f
enhance raw_svector_ostream::write_impl to work with unbuffered streams,
...
which may call write_impl on things that are not the usual buffer.
llvm-svn: 96209
2010-02-15 02:18:26 +00:00
f733d75892
make PadToColumn return the stream so you can use:
...
OS.PadToColumn(42) << "foo";
llvm-svn: 96208
2010-02-15 02:17:50 +00:00
c704ea1c51
Ignore DBG_VALUE in a couple more places.
...
llvm-svn: 96207
2010-02-15 01:45:47 +00:00
4d8feb11dd
When restoring a saved insert location, check to see if the saved
...
insert location has become an "inserted" instruction since the time
it was saved. If so, advance to the first non-"inserted" instruction.
llvm-svn: 96203
2010-02-15 00:21:43 +00:00
4aa57ba3ef
mark "addr" as having type "iPTR", eliminating some type comparisons
...
in hte generated dag isel fil.
llvm-svn: 96193
2010-02-14 21:53:19 +00:00
e4e51a63da
Fix whitespace.
...
llvm-svn: 96179
2010-02-14 18:51:39 +00:00
e7f74bb16c
Fix a comment.
...
llvm-svn: 96178
2010-02-14 18:51:20 +00:00
bb7d52213c
When complicated expressions are broken down into subexpressions
...
with multiplication by constants distributed through, occasionally
those subexpressions can include both x and -x. For now, if this
condition is discovered within LSR, just prune such cases away,
as they won't be profitable. This fixes a "zero allocated in a
base register" assertion failure.
llvm-svn: 96177
2010-02-14 18:50:49 +00:00
d6cbe9f23f
fixes to pagesel/banksel inserter.
...
1. restore these across direct/indirect calls.
2. restore pagesel for any macros with gotos.
llvm-svn: 96175
2010-02-14 18:27:42 +00:00
0a5e0371b0
Forgot to commit the header
...
llvm-svn: 96174
2010-02-14 18:25:41 +00:00
3b38fd6488
follow-on to PR6280
...
llvm-svn: 96172
2010-02-14 18:20:09 +00:00
ce77ce3072
Drop winmcasminfo and use normal AT&T COFF for all windows targets.
...
Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.
llvm-svn: 96165
2010-02-14 15:19:54 +00:00
c95a814ec3
Try to factorize the specification of saturating add/subtract operations a bit,
...
as suggested by Bob Wilson.
llvm-svn: 96153
2010-02-14 06:32:20 +00:00
2d0f96d49a
Actually, this code doesn't have to be quite so conservative in
...
the no-TLI case. But it should still default to declining the
transformation.
llvm-svn: 96152
2010-02-14 03:21:49 +00:00
6b7517342e
In rememberInstruction, if the value being remembered is the
...
current insertion point, advance the current insertion point.
This avoids a use-before-def situation in a testcase extracted
from clang which is difficult to reduce to a reasonable-sized
regression test.
llvm-svn: 96151
2010-02-14 03:12:47 +00:00
f446713fd0
Simplify this code; no need for a custom subclass if it doesn't need
...
to override anything from the parent class.
llvm-svn: 96150
2010-02-14 02:48:58 +00:00
cb76a806f0
Don't attempt aggressive post-inc uses if TargetLowering is not available,
...
because profitability can't be sufficiently approximated.
llvm-svn: 96148
2010-02-14 02:45:21 +00:00
0daaf13b97
Make LSR not crash if invoked without target lowering info, e.g. if invoked
...
from opt.
llvm-svn: 96135
2010-02-13 23:40:16 +00:00
843a4cc43c
Fix a problem where we had bitcasted operands that gave us
...
odd offsets since the bitcasted pointer size and the offset pointer
size are going to be different types for the GEP vs base object.
llvm-svn: 96134
2010-02-13 23:38:01 +00:00
406cd61828
teach the encoder to handle pseudo instructions like FP_REG_KILL,
...
encoding them into nothing.
llvm-svn: 96110
2010-02-13 19:16:53 +00:00
b8639bc2d1
remove dead code.
...
llvm-svn: 96109
2010-02-13 19:07:06 +00:00
8408c126c1
MCAssembler: Fix pcrel relocations. Oh and,
...
--
ddunbar@ozzy:tmp$ clang -m32 -integrated-as hello.c && ./a.out
hello world!
--
llvm-svn: 96096
2010-02-13 09:45:59 +00:00
1e2fad3de8
MC/Mach-O: Start emitting fixups/relocations for instructions.
...
llvm-svn: 96095
2010-02-13 09:29:02 +00:00
3374835b46
MCAssembler: Switch MCAsmFixup to storing MCFixupKind instead of just a size.
...
llvm-svn: 96094
2010-02-13 09:28:54 +00:00
97867a9cfc
MCAssembler: Sink fixup list into MCDataFragment.
...
llvm-svn: 96093
2010-02-13 09:28:43 +00:00
056bc60336
MCAssembler: Switch MCFillFragment to only taking constant values. Symbolic expressions can always be emitted as data + fixups.
...
llvm-svn: 96092
2010-02-13 09:28:32 +00:00
1a1fbb50fc
MC/Mach-O: Implement EmitValue using data fragments + fixups instead of fill fragment.
...
llvm-svn: 96091
2010-02-13 09:28:22 +00:00
8e53203154
MCAssembler: Start applying fixups in the data section.
...
llvm-svn: 96090
2010-02-13 09:28:15 +00:00
bedf1d4a41
MCAssembler: Add assorted dump() methods.
...
llvm-svn: 96089
2010-02-13 09:28:03 +00:00
2610a34b15
X86: Move extended MCFixupKinds into X86FixupKinds.h
...
llvm-svn: 96088
2010-02-13 09:27:52 +00:00
42c66b7270
Split some code out to a helper function (FindReusablePredBB)
...
and add a doxygen comment.
Cache the phi entry to avoid doing tons of
PHINode::getBasicBlockIndex calls in the common case.
On my insane testcase from re2c, this speeds up CGP from
617.4s to 7.9s (78x).
llvm-svn: 96083
2010-02-13 05:35:08 +00:00
5e7f705934
Speed up codegen prepare from 3.58s to 0.488s.
...
llvm-svn: 96081
2010-02-13 05:01:14 +00:00
72c4dce884
PHINode::getBasicBlockIndex is O(n) in the number of inputs
...
to a PHI, avoid it in the common case where the BB occurs
in the same index for multiple phis. This speeds up CGP on
an insane testcase from 8.35 to 3.58s.
llvm-svn: 96080
2010-02-13 04:24:19 +00:00
b0ebb65ab0
iterate over preds using PHI information when available instead of
...
using pred_begin/end. It is much faster.
llvm-svn: 96079
2010-02-13 04:15:26 +00:00
96b8826542
speed up CGP a bit by scanning predecessors through phi operands
...
instead of with pred_begin/end.
llvm-svn: 96078
2010-02-13 04:04:42 +00:00
f83726f6ba
add encoder support and tests for rdtscp
...
llvm-svn: 96076
2010-02-13 03:42:24 +00:00
52a6ab3ba7
Add SETEND and BXJ instructions for disassembly only.
...
llvm-svn: 96075
2010-02-13 02:51:09 +00:00
4d804d794f
Added the rdtscp instruction to the x86 instruction
...
tables.
llvm-svn: 96073
2010-02-13 02:06:11 +00:00
b659c76c77
Fix PR6283.
...
When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.
Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.
llvm-svn: 96072
2010-02-13 02:06:10 +00:00
5b18f039eb
Fix a pruning heuristic which implicitly assumed that SmallPtrSet is
...
deterministically sorted.
llvm-svn: 96071
2010-02-13 02:06:02 +00:00
3b065cdb64
Teach MachineFrameInfo to track maximum alignment while stack objects are being
...
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.
llvm-svn: 96069
2010-02-13 01:56:41 +00:00
492b8b42cd
Enable the inlinehint attribute in the Inliner.
...
Functions explicitly marked inline will get an inlining threshold slightly
more aggressive than the default for -O3. This means than -O3 builds are
mostly unaffected while -Os builds will be a bit bigger and faster.
The difference depends entirely on how many 'inline's are sprinkled on the
source.
In the CINT2006 suite, only these tests are significantly affected under -Os:
Size Time
471.omnetpp +1.63% -1.85%
473.astar +4.01% -6.02%
483.xalancbmk +4.60% 0.00%
Note that 483.xalancbmk runs too quickly to give useful timing results.
llvm-svn: 96066
2010-02-13 01:51:53 +00:00
44232af55a
Fixed encodings for invlpg, invept, and invvpid.
...
llvm-svn: 96065
2010-02-13 01:48:34 +00:00
d0c6d361fe
MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.
...
llvm-svn: 96064
2010-02-13 01:28:07 +00:00
b0208d2a06
Added a bunch of saturating add/subtract instructions for disassembly only.
...
llvm-svn: 96063
2010-02-13 01:21:01 +00:00
509154e0f9
rip out the 'heinous' x86 MCCodeEmitter implementation.
...
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
llvm-svn: 96059
2010-02-13 00:49:29 +00:00
140caa7240
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
...
fix swapgs to be spelled right.
llvm-svn: 96058
2010-02-13 00:41:14 +00:00
01abf8fc2f
Besides removing phi cycles that reduce to a single value, also remove dead
...
phi cycles. Adjust a few tests to keep dead instructions from being optimized
away. This (together with my previous change for phi cycles) fixes Apple
radar 7627077.
llvm-svn: 96057
2010-02-13 00:31:44 +00:00
fe873e7c10
Override dominates and properlyDominates for SCEVAddRecExpr, as a
...
SCEVAddRecExpr doesn't necessarily dominate blocks merely dominated
by all of its operands. This fixes an abort compiling 403.gcc.
llvm-svn: 96056
2010-02-13 00:19:39 +00:00
224340cabe
MC/X86: Push immediate operands as immediates not expressions when possible.
...
llvm-svn: 96055
2010-02-13 00:17:21 +00:00
01f88a96c5
Make PassRegistrar thread-safe since it can be modified by code running in
...
separate LLVMContexts.
llvm-svn: 96051
2010-02-13 00:03:17 +00:00
064e926362
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
...
encoder and decoder by using new MRM_ forms.
llvm-svn: 96048
2010-02-12 23:54:57 +00:00
1e827fd8ca
implement the rest of correct x86-64 encoder support for
...
rip-relative addresses, and add a testcase.
llvm-svn: 96040
2010-02-12 23:24:09 +00:00
626b79d6a6
Add the problem I just hacked around in 96015/96020.
...
The solution there produces correct code, but is seriously
deficient in several ways.
llvm-svn: 96039
2010-02-12 23:16:24 +00:00
Daniel Dunbar