Commit Graph

2245 Commits

Author SHA1 Message Date
Daniel Sanders 47b4b6dd78 [mips][sched] Split IIFmulSingle into II_MUL_S, II_MADD_S, II_MSUB_S, II_NMADD_S, and II_NMSUB_S
No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199734
2014-01-21 12:51:44 +00:00
Daniel Sanders 4bf6078841 [mips][sched] Split IIFadd into II_ADD_[DS], II_SUB_[DS]
No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199732
2014-01-21 12:38:07 +00:00
Daniel Sanders b8013baf8f [mips][sched] Split IIFcmp into II_C_CC_[SD]
No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199728
2014-01-21 11:42:48 +00:00
Daniel Sanders f5fb34137e [mips][sched] Split IIFmove into II_C[FT]C1, II_MOV[FNTZ]_[SD], II_MOV_[SD]
No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199727
2014-01-21 11:28:03 +00:00
Daniel Sanders 555f4c5672 [mips][sched] Split IIFcvt into II_(ROUND|TRUNC|CEIL|FLOOR|CVT), II_ABS, II_NEG
No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199722
2014-01-21 10:56:23 +00:00
Daniel Sanders 298ad0f277 [mips][sched] Split IIslt into II_SLT_SLTU, II_SLTI_SLTIU
No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199719
2014-01-21 10:42:13 +00:00
Daniel Sanders b825a634d6 [mips][msa] Correct pattern for LSA
Summary:
$rs and $rt were the wrong way round in the .td and the testcase wasn't
strict enough to detect the mistake.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2554

llvm-svn: 199498
2014-01-17 15:40:05 +00:00
Daniel Sanders c7a9f8d298 [mips] Split IIIdiv int II_DIV, II_DIVU, II_DDIV, and II_DDIVU
No functional change since the InstrItinData's were duplicated

llvm-svn: 199497
2014-01-17 14:48:06 +00:00
Daniel Sanders e95a137b96 [mips][sched] Split IIImul and IIImult into subclasses.
IIImul -> II_MUL
IIImult -> II_MULT, II_MULTU, II_MADD, II_MADDU, II_MSUB, II_MSUBU, II_DMULT, II_DMULTU

No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199495
2014-01-17 14:32:41 +00:00
Daniel Sanders 9342557ea7 [mips][sched] Split IIHiLo into II_MFHI_MFLO and II_MTHI_MTLO
No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199493
2014-01-17 14:17:34 +00:00
Daniel Sanders 59f991505c [mips][sched] Removed IIXfer. No instructions use it.
llvm-svn: 199403
2014-01-16 17:23:08 +00:00
Daniel Sanders 4aefdc7bda [mips][sched] Put AND, OR, XOR, MOVT_I, and MOVF_I in the same itinerary class as their non-microMIPS counterparts.
No functional change since both classes have the same InstrItinData definition.

llvm-svn: 199402
2014-01-16 17:13:57 +00:00
Daniel Sanders 4d20f0c00f [mips][sched] Split IIseb into II_SEB and II_SEH
No functional change since there are no InstrItinData's.

llvm-svn: 199396
2014-01-16 16:19:38 +00:00
Daniel Sanders 306ef07b8d [mips][sched] Split IILogic into II_AND, II_OR, II_XOR, II_ANDI, II_ORI, II_XORI
This is necessary because the classes are shared between all implementations.

No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199394
2014-01-16 15:57:05 +00:00
Daniel Sanders 980589a803 [mips][sched] Split IIArith in preparation for the first scheduler targeting a specific MIPS CPU.
IIArith -> II_ADD, II_ADDU, II_AND, II_CL[ZO], II_DADDIU, II_DADDU,
  II_DROTR, II_DROTR32, II_DROTRV, II_DSLL, II_DSLL32, II_DSLLV,
  II_DSR[AL], II_DSR[AL]32, II_DSR[AL]V, II_DSUBU, II_LUI, II_MOV[ZFNT],
  II_NOR, II_OR, II_RDHWR, II_ROTR, II_ROTRV, II_SLL, II_SLLV, II_SR[AL],
  II_SR[AL]V, II_SUBU, II_XOR

No functional change since the InstrItinData's have been duplicated.

This is necessary because the classes are shared between all schedulers.

Once this patch series is committed there will be an InstrItinClass for
each mnemonic with minimal grouping. This does increase the size of the
itinerary tables for each MIPS scheduler but we have a few options for dealing
with that later. These options include reducing the number of classes once
we see the best way to simplify them, or by extending tablegen to be able
to compress the table by eliminating duplicates entries, etc.

llvm-svn: 199391
2014-01-16 14:27:20 +00:00
Daniel Sanders bfe1830ab9 [mips] Correct itin class for MULT_MM and MULTu_MM to IIImult.
This matches the itin class used by the non-microMIPS equivalents of these
instructions.

llvm-svn: 199389
2014-01-16 14:02:48 +00:00
Daniel Sanders 818058b2ab [mips] IIImult should have an InstrItinData in the generic scheduler. Used the same one as for IIImul.
Affects:
  DMULT, DMULTu, MADD, MADD_MM, MADDU, MADDU_MM, MSUB, MSUB_MM, MSUBU,
  MSUBU_MM, MULT, MULTu

Does not affect MULT_MM, MULTu_MM since they are currently miscategorised
as IIImul.

llvm-svn: 199381
2014-01-16 13:45:53 +00:00
Reed Kotler 43788a20c6 Adjust offsets for max load instruction offsets. This is more pessimistic
than it needs to be by 1 bit but I need to finish some other things so 
that all the boundary cases will work in that situation. constpool.c
in test-suite will fail to assemble under our new internal test-suite sync
without this change.

llvm-svn: 199343
2014-01-16 00:47:46 +00:00
Zoran Jovanovic 7d63392da9 LL and SC decoder method fix.
llvm-svn: 199316
2014-01-15 13:17:33 +00:00
Zoran Jovanovic d4cb61cf0e Added support for LWU microMIPS instruction.
llvm-svn: 199315
2014-01-15 13:01:18 +00:00
Rafael Espindola 9d795caea4 Fix uninitialized variable.
llvm-svn: 199288
2014-01-15 03:27:26 +00:00
Rafael Espindola 26e917cde0 Only mark functions as micromips.
The GNU as behavior is a bit different and very strange. It will mark any
label that contains an instruction. We can implement that, but using the
type looks more natural since gas will not mark a function if a .word is
used to output the instructions!

llvm-svn: 199287
2014-01-15 03:07:12 +00:00
Rafael Espindola 6633d57ae4 Fix a low hanging use of hasRawTextSupport.
This also fixes the placement of the function label comment. It was being
placed next to the mips16 directive instead of next to the label.

llvm-svn: 199245
2014-01-14 18:57:12 +00:00
Rafael Espindola 6d5f7ce348 Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips".
This matches what gnu as does and implementing this is easier than arguing
about it.

llvm-svn: 199181
2014-01-14 04:25:13 +00:00
Rafael Espindola 4a1a360634 Make getTargetStreamer return a possibly null pointer.
This will allow it to be called from target independent parts of the main
streamer that don't know if there is a registered target streamer or not. This
in turn will allow targets to perform extra actions at specified points in the
interface: add extra flags for some labels, extra work during finalization, etc.

llvm-svn: 199174
2014-01-14 01:21:46 +00:00
Saleem Abdulrasool a6505ca4c2 correct target directive handling error handling
The target specific parser should return `false' if the target AsmParser handles
the directive, and `true' if the generic parser should handle the directive.
Many of the target specific directive handlers would `return Error' which does
not follow these semantics.  This change simply changes the target specific
routines to conform to the semantis of the ParseDirective correctly.

Conformance to the semantics improves diagnostics emitted for the invalid
directives.  X86 is taken as a sample to ensure that multiple diagnostics are
not presented for a single error.

llvm-svn: 199068
2014-01-13 01:15:39 +00:00
Rafael Espindola 894843cb4e Move the llvm mangler to lib/IR.
This makes it available to tools that don't link with target (like llvm-ar).

llvm-svn: 198708
2014-01-07 21:19:40 +00:00
Chandler Carruth 8a8cd2bab9 Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685
2014-01-07 11:48:04 +00:00
Jack Carter 0cd3c19f33 [Mips] TargetStreamer Support for .abicalls and .set pic0.
This patch adds .abicalls and .set pic0 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that both the integrated and standalone
assemblers will use for the output for these directives.

llvm-svn: 198646
2014-01-06 23:27:31 +00:00
Bill Wendling 13199b17f8 Remove unnecessary #includes.
llvm-svn: 198585
2014-01-06 06:00:00 +00:00
Bill Wendling 908bf814e7 Refactor function that checks that __builtin_returnaddress's argument is constant.
This moves the check up into the parent class so that all targets can use it
without having to copy (and keep in sync) the same error message.

llvm-svn: 198579
2014-01-06 00:43:20 +00:00
Bill Wendling df7dd28dc8 Emit an error message if the value passed to __builtin_returnaddress isn't a constant
__builtin_returnaddress requires that the value passed into is be a constant.
However, at -O0 even a constant expression may not be converted to a constant.
Emit an error message intead of crashing.

llvm-svn: 198531
2014-01-05 01:47:20 +00:00
Rafael Espindola 58873566b3 Make the llvm mangler depend only on DataLayout.
Before this patch any program that wanted to know the final symbol name of a
GlobalValue had to link with Target.

This patch implements a compromise solution where the mangler uses DataLayout.
This way, any tool that already links with Target (llc, clang) gets the exact
behavior as before and new IR files can be mangled without linking with Target.

With this patch the mangler is constructed with just a DataLayout and DataLayout
is extended to include the information the Mangler needs.

llvm-svn: 198438
2014-01-03 19:21:54 +00:00
Mark Seaborn c3bd177ec2 Fix misaligned indentation in "if" block in MipsMCCodeEmitter.cpp
llvm-svn: 198262
2013-12-31 13:05:15 +00:00
Mark Seaborn 774c24385e Fix indentation alignment of a declaration in MipsMCCodeEmitter.cpp
llvm-svn: 198162
2013-12-29 10:47:04 +00:00
Simon Atanasyan fde102cb77 [Mips] Does not take in account 'use-soft-float' attribute's value when
consider to generate stubs for mips16 hard-float mode.

The patch reviewed by Reed Kotler.

llvm-svn: 198019
2013-12-25 17:00:27 +00:00
Zoran Jovanovic bd28c373c4 Support for microMIPS load effective address.
llvm-svn: 198010
2013-12-25 10:14:07 +00:00
Zoran Jovanovic 8876be39c7 Support for microMIPS FPU instructions 2.
llvm-svn: 198009
2013-12-25 10:09:27 +00:00
Zoran Jovanovic ce02486d16 Support for microMIPS FPU instructions 1.
llvm-svn: 197815
2013-12-20 15:44:08 +00:00
Zoran Jovanovic 8e918c3c4d Support for microMIPS control instructions.
llvm-svn: 197696
2013-12-19 16:25:00 +00:00
Zoran Jovanovic ff9d5f3284 Support for microMIPS LL and SC instructions.
llvm-svn: 197692
2013-12-19 16:12:56 +00:00
Zoran Jovanovic 69be811a6e Support for microMIPS TLS relocations.
llvm-svn: 197685
2013-12-19 16:02:32 +00:00
Reed Kotler 47f3c64a48 Make cosmetic changes as part of Mips internal post commit review of
patch r196331.

llvm-svn: 197638
2013-12-19 00:43:08 +00:00
Reed Kotler 2500bd6c20 Fix a problem with mips16 stubs when calls are transformed during
tail call optimization. Some more work may be needed for indirect
calls but this patch fixes the current regression in Prolangc++/trees.
S2 optimization as part of the general cleanup and optimization
of prolog and epilog was not saving S2 in this case and needed to.

llvm-svn: 197630
2013-12-18 23:57:48 +00:00
Rafael Espindola febb8d2b96 Fix N32 registers and stack alignment.
This patch fixes the "n" and "S" components of the data layout for mips. Clang
already gets this right.

This will be tested in clang.

llvm-svn: 197536
2013-12-17 23:15:58 +00:00
Matheus Almeida 8cc8b35a73 [mips] Fix off by one issue when applying a fixup.
The branch offset for a R_MIPS_PC16 relocation is indeed a 16-bit signed
immediate.

llvm-svn: 197506
2013-12-17 17:10:00 +00:00
Rafael Espindola bccb9d45ad The preferred alignment defaults to the abi alignment. Omit if it is the same.
llvm-svn: 197400
2013-12-16 18:01:51 +00:00
Rafael Espindola 8afbb28cea On DataLayout, omit the default of p:64:64:64.
llvm-svn: 197397
2013-12-16 17:15:29 +00:00
Reed Kotler b69ea1e92e remove an uneeded statement (condition is covered by the statement
that follows).

llvm-svn: 197358
2013-12-15 23:33:59 +00:00
Reed Kotler 06b3c4f484 Fix some indentation.
llvm-svn: 197357
2013-12-15 23:03:35 +00:00
Reed Kotler 4d030b4e89 Get rid of an superfluous tab in the .s file. This was originally
part of a multi-line pseudo which worked around a linker bug for mips16.

llvm-svn: 197356
2013-12-15 22:02:31 +00:00
Reed Kotler 5c29d63a66 Last change for mips16 prolog/epilog cleanup and optimization.
Some tiny cosmetic code changes to follow. Because of the wide
ranging nature of the patch a full 24 test cycle was needed to
check against regression. This was the smallest patch I could
make to progress from the earlier ones in the series. 

llvm-svn: 197350
2013-12-15 20:49:30 +00:00
Matheus Almeida e0d75aacf1 [mips] Add checks for alignment and maximum displacements for most of the
branch instructions for mips and micromips instruction sets thus avoiding
the situation of generating branches to undesired locations if offsets
cannot be encoded.

This patch also checks if a fixup cannot be applied and returns a fatal error
if that's the case.

llvm-svn: 197223
2013-12-13 11:11:02 +00:00
Reed Kotler 3230e725aa Check for null pointer before dereferencing. A careless typo on my part.
I don't know why this did not show up earlier. This code has been
around for ages. 

llvm-svn: 197119
2013-12-12 02:41:11 +00:00
Reed Kotler 5bde5c35f4 Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.
llvm-svn: 196999
2013-12-11 03:32:44 +00:00
Rafael Espindola b2fb78d45a Move mips' datalayout computation out of line and add comments.
llvm-svn: 196996
2013-12-11 01:41:10 +00:00
NAKAMURA Takumi 8bc9bfaa5a Prune redundant dependencies in LLVMBuild.txt.
llvm-svn: 196988
2013-12-11 00:30:57 +00:00
Reed Kotler 0ff4001781 Next step in Mips16 prologue/epilogue cleanup.
Save S2(reg 18) only when we are calling floating point stubs that
have a return value of float or complex. Some more work to make this
better but this is the first step.

llvm-svn: 196921
2013-12-10 14:29:38 +00:00
Daniel Sanders c309be2f1f [mips][msa] Correct sld and sldi builtins.
Summary: The result register of these instructions is also the first operand.

Reviewers: jacksprat, dsanders

Reviewed By: dsanders

Differential Revision: http://llvm-reviews.chandlerc.com/D2362
Differential Revision: http://llvm-reviews.chandlerc.com/D2363

llvm-svn: 196910
2013-12-10 11:37:00 +00:00
NAKAMURA Takumi 396d4d3c7e Add proper dependencies to LLVMBuild.txt in llvm/lib.
I'll prune redundant deps in LLVMBuild.txt, later.

llvm-svn: 196881
2013-12-10 05:39:34 +00:00
Reed Kotler b102fa5aef get rid of superfluous comment
llvm-svn: 196829
2013-12-09 22:08:32 +00:00
Reed Kotler 2e362b3b4b Delete some old code used for testing that is not needed anymore.
This is part of the mips16 epilogue/prologue cleanup.

llvm-svn: 196824
2013-12-09 21:19:51 +00:00
Daniel Sanders 3519dce968 [mips][msa] Fix invalid generated code when lowering FrameIndex involving unaligned offsets.
Summary:
The MSA ld.[bhwd] and st.[bhwd] instructions scale the immediate by the
element size before use as an offset. The offset must therefore be a
multiple of the element size to be valid in these instructions. However,
an unaligned base address is valid in MSA.

This commit causes the compiler to emit valid code when the calculated
offset is not a multiple of the element size by accounting for the offset
using addiu and using a zero offset in the load/store.

Depends on D2338

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2339

llvm-svn: 196777
2013-12-09 12:47:12 +00:00
Daniel Sanders 26a5a7475e [mips][msa] Fix suboptimal FrameIndex lowering for ld.[hwd] and st.[hwd]
Summary:
The immediate in these instructions is scaled before use as an offset.
They therefore have a wider reach than ld.b/st.b.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2338

llvm-svn: 196775
2013-12-09 11:50:16 +00:00
Vladimir Medic 0d02be37c2 Method parseSetAssignment treats every operand with '$' sign as register and the parsing is directed to set alias for register. This will result in errors reported when expressions containing label references are parsed(for example long jumps)
As we can't make a complete solution now it has been decided to enable .set directive to handle long jump expressions. This will cause parser to report errors when parsing integer based register assignments, for example:
   .set r3, will be reported as error. Still, the need for expressions is higher priority as the integer based register assignments are Mips specific and can be avoided using register names.

llvm-svn: 196773
2013-12-09 11:03:25 +00:00
Reed Kotler abaed9ecea Make sure we mark these registers as defined. Previously was done
in the td file.

llvm-svn: 196731
2013-12-08 19:21:47 +00:00
Reed Kotler e0a34ee66e Cleaning up of prologue/epilogue code for Mips16. First step
here is to make save/restore into variable number of argument instructions.

llvm-svn: 196726
2013-12-08 16:51:52 +00:00
Reed Kotler 2db182b5e8 Delete dead code.
llvm-svn: 196551
2013-12-06 00:13:50 +00:00
Matheus Almeida a6beac1acc [mips] Small code generation improvement for conditional operator (select)
in case the operands are constants and its difference is |1|.
It should be possible in those cases to rematerialize the result using
MIPS's slt and similar instructions.

The small update to some of the tests in cmov.ll, sel1c.ll and sel2c.ll was needed
otherwise the optimization implemented in this patch would have been triggered
(difference between the operands was 1) and that would have changed the semantic
of the tests.

llvm-svn: 196498
2013-12-05 12:07:05 +00:00
Matheus Almeida a611c0f405 [mips] Add some comments related to the optimization performed in performSELECTCombine.
The structure of the code was slightly modified so that the next patch is easier to read/review.

No functional changes.

llvm-svn: 196496
2013-12-05 11:56:56 +00:00
Matheus Almeida 6b59c449d9 [mips][msa] Fix issue with immediate fields of LD/ST instructions
not being correctly encoded/decoded.
In more detail, immediate fields of LD/ST instructions should be
divided/multiplied by the size of the data format before encoding and
after decoding, respectively.

llvm-svn: 196494
2013-12-05 11:06:22 +00:00
Alp Toker f907b891da Correct word hyphenations
This patch tries to avoid unrelated changes other than fixing a few
hyphen-related ambiguities and contractions in nearby lines.

llvm-svn: 196471
2013-12-05 05:44:44 +00:00
Reed Kotler 59975c2cba final patch for very long conditional branches for mips16 constant islands.
this completes the basic port of ARM constant islands to Mips16.
More testing, code review, cleanup is in order but basically everything
seems to be working. A bug in gas is preventing some of the runtime
testing but I hope to resolve this soon.

llvm-svn: 196331
2013-12-03 23:42:51 +00:00
Rafael Espindola 957cf6f9e1 Remove dead code.
MO_JumpTableIndex and MO_ExternalSymbol don't show up on inline asm.

Keeping parts of the old asm printer just to print inline asm to a string that
we then parse back looks like a hack.

llvm-svn: 196111
2013-12-02 15:36:37 +00:00
Rafael Espindola 50712a456d Change the default of AsmWriterClassName and isMCAsmWriter.
llvm-svn: 196065
2013-12-02 04:55:42 +00:00
Zoran Jovanovic 9d86e26e62 Fixed issue with microMIPS long branch.
llvm-svn: 195975
2013-11-30 19:12:28 +00:00
Daniel Sanders 7fd68d6018 [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex.
This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s
when the stack frame is between 512 and 32,768 bytes in size.

llvm-svn: 195973
2013-11-30 13:47:57 +00:00
Daniel Sanders 7153414768 [mips][msa] A small refactor to reduce patch noise in my next commit
No functional change. An if-statement has been split into two nested if-statements.

llvm-svn: 195972
2013-11-30 13:15:21 +00:00
Reed Kotler ad450f239f Part 1 of 3 patches that completes very long conditional branches
in constant islands for Mips16. We introdcuce JalB16 as a synomnym
for Jal16. It makes it easier to read and is also necessary because
Jal16 is a call instruction but JalB16 is being used as a branch.
Various parts of LLVM will not work properly even in this late stage of
the backend if we use what was declared as a call instruction to function
as a branch. For one, basic block labels may not get emitted in some
situations. 

llvm-svn: 195968
2013-11-29 22:32:56 +00:00
Zoran Jovanovic 1bc3cce040 Revert revision 195965.
llvm-svn: 195967
2013-11-29 22:10:02 +00:00
Zoran Jovanovic ff2a40ce4d Fixed issue with microMIPS long branch.
llvm-svn: 195965
2013-11-29 21:41:24 +00:00
NAKAMURA Takumi 226e10edff [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too.
I think, in principle, intrinsics_gen may be added explicitly.
That said, it can be added incidentally, since each target already has dependencies to llvm-tblgen.
Almost all source files depend on both CommonTaleGen and intrinsics_gen.

Explicit add_dependencies() have been pruned under lib/Target.

llvm-svn: 195929
2013-11-28 17:04:31 +00:00
NAKAMURA Takumi ce746c6c49 [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.

llvm-svn: 195927
2013-11-28 17:04:04 +00:00
Daniel Sanders 063b74ad4e [mips] Revert test commit r195922.
llvm-svn: 195923
2013-11-28 15:26:33 +00:00
Daniel Sanders eb16443fca [mips] A test commit to test my Herald and Audit workflow
Will be reverted in the next commit

llvm-svn: 195922
2013-11-28 15:25:43 +00:00
NAKAMURA Takumi 413518f1f8 [CMake] Prune include_directories() in llvm/lib/Target. add_llvm_target() sets them.
llvm-svn: 195921
2013-11-28 14:53:30 +00:00
Reed Kotler 0d409e2dfe Check in conditional branches for constant islands. Still need to finish
conditional branches for very large targets. That will be the next small
patch. Everything now should in principle work as good (functionality
wise) as without constant islands so we decided at Mips/Imagination to
make constant islands the default for Mips16 now so that it will get
excercised a lot and this port is still experimentatl though hopefully soon
we will change the status. Some more cleanup and code review is in order
but things are converging fast.

llvm-svn: 195902
2013-11-28 00:56:37 +00:00
Akira Hatanaka f6109e4ad7 [mips] Redefine TAILCALL as a pseudo instruction.
No functionality change.

llvm-svn: 195896
2013-11-27 23:58:32 +00:00
Akira Hatanaka f9a0ec4fc4 Add MipsOptimizePICCall.cpp to CMakeLists.txt.
llvm-svn: 195894
2013-11-27 23:47:25 +00:00
Akira Hatanaka 168d4e5b20 [mips] Implement the following optimizations using dominance information to
make PIC calls a little more efficient:

1. Remove instructions setting up $gp if it is known that a function has been
   called at least once.
2. Save the address of a called function in a register instead of loading
   it from the GOT at every call site.

llvm-svn: 195892
2013-11-27 23:38:42 +00:00
Reed Kotler 3aeb1d0857 Fix a bug related to constant islands for Mips16 and mips16/32 dual mode.
The determination of when we are doing constant pools was being made too
early in the asm printer.

llvm-svn: 195781
2013-11-26 20:38:40 +00:00
Reed Kotler a787aa2b1e Make sure that for C++ emitting LwConstant32 pseudos, that it corresponds
to what is needed for constant islands. The prescan method for Mips16 constant
islands will eventually go away. It is only temporary and should be done
earlier when the instructions are first created or from the DAG. If we keep
it here we need to handle better the situation where constant islands
is called multiple times since don't want to prescan more than once.

llvm-svn: 195569
2013-11-24 06:18:50 +00:00
Reed Kotler d3b28ebe03 Fix a funny bug I introduced during conversion of ARM constant islands to Mips.
I had to move some code and I moved a declaration forward past it's first use
in the function but by nutty coincidence there was another variable of the same
name and type and  with completely unrelated function that was declared globally
in the class so no compilation error ensued.
It required some unusual conditions for it to even matter. Caused test
case casts.c in test-suite to fail during compilation with a duplicate 
symbol error. I would have noticed it during final code review for this port.

llvm-svn: 195565
2013-11-24 02:53:09 +00:00
Daniel Sanders d40aea8768 Fix typo in a comment added in r195455.
Credit to Matheus Almeida for spotting it.

llvm-svn: 195456
2013-11-22 13:22:52 +00:00
Daniel Sanders 630dbe0a14 [mips][msa] Fix corner case for integer constant splats with undef values.
lowerBUILD_VECTOR() was treating integer constant splats as being legal
regardless of whether they had undef values. This caused instruction
selection failures when the undefs were legalized to zero, making the
constant non-splat.

Fixed this by requiring HasAnyUndef to be false for a integer constant
splat to be legal. If it is true, a new node is generated with the undefs
replaced with the necessary values to remain a splat.

llvm-svn: 195455
2013-11-22 13:14:06 +00:00
Daniel Sanders fd8e416879 [mips][msa] Float vector constants cannot use ldi.[wd] directly. Bitcast from the appropriate integer vector type.
Fixes an instruction selection failure detected by llvm-stress.

llvm-svn: 195444
2013-11-22 11:24:50 +00:00
Daniel Sanders c8c50fb41f [mips][msa] Fix a corner case in performORCombine() when combining nodes into VSELECT.
Mask == ~InvMask asserts if the width of Mask and InvMask differ.
The combine isn't valid (with two exceptions, see below) if the widths differ
so test for this before testing Mask == ~InvMask.

In the specific cases of Mask=~0 and InvMask=0, as well as Mask=0 and
InvMask=~0, the combine is still valid. However, there are more appropriate
combines that could be used in these cases such as folding x & 0 to 0, or
x & ~0 to x.

llvm-svn: 195364
2013-11-21 16:11:31 +00:00
Daniel Sanders 6e664bcef3 [mips][msa/dsp] Only do DSP combines if DSP is enabled.
Fixes a crash (null pointer dereferenced) when MSA is enabled.

llvm-svn: 195343
2013-11-21 11:40:14 +00:00
Reed Kotler 2fc05be887 Add, to constant islands, long jumps similar to ARM far branch.
llvm-svn: 195312
2013-11-21 05:13:23 +00:00
Daniel Sanders f93e8152c4 [mips][msa] Pseudo instructions require HasMSA too. Inherit from MSAPseudo instead of MipsPseudo
There's no test case for this commit. This is because it is doubtful that the
incorrect behaviour can actually trigger. When MSA is not enabled, the type
legalizer should have eliminated all occurrences of patterns the affected
pseudo-instruction could possibly match before instruction selection occurs.

llvm-svn: 195252
2013-11-20 14:32:28 +00:00