Commit Graph

347 Commits

Author SHA1 Message Date
Peixin-Qiao 3e7415a0ff [OMPIRBuilder] Support ordered clause specified without parameter
This patch supports ordered clause specified without parameter in
worksharing-loop directive in the OpenMPIRBuilder and lowering MLIR to
LLVM IR.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D114940
2022-04-01 16:17:29 +08:00
Christopher Bate 3be7c28917 [mlir][NVVM] Add support for nvvm mma.sync ops
This patch adds MLIR NVVM support for the various NVPTX `mma.sync`
operations. There are a number of possible data type, shape,
and other attribute combinations supported by the operation, so a
custom assebmly format is added and attributes are inferred where
possible.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D122410
2022-03-25 17:28:05 +00:00
Shraiysh Vaishay 8722c12c12 [mlir][OpenMP][IRBuilder] Add support for nowait on single construct
This patch adds the nowait parameter to `createSingle` in
OpenMPIRBuilder and handling for IR generation from OpenMP Dialect.

Also added tests for the same.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D122371
2022-03-24 22:51:52 +05:30
Shraiysh Vaishay 3c0d470865 [mlir][OpenMP] omp.single translation to LLVM IR
This patch adds translation from omp.single to LLVM IR.

Depends on D122288

Reviewed By: ftynse, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D122297
2022-03-24 10:07:30 +05:30
Shraiysh Vaishay b244bba582 [mlir][OpenMP] Added assembly format for omp.wsloop and remove parseClauses
This patch
 - adds assembly format for `omp.wsloop` operation
 - removes the `parseClauses` clauses as it is not required anymore

This is expected to be the final patch in a series of patches for replacing
parsers for clauses with `oilist`.

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D121367
2022-03-23 10:02:02 +05:30
Shraiysh Vaishay 31486a9fc2 [mlir][OpenMP] Added translation from `omp.atomic.capture` to LLVM IR
This patch adds translation from `omp.atomic.capture` to LLVM IR. Also
added tests for the same.

Depends on D121546

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D121554
2022-03-21 16:39:36 +05:30
Shraiysh Vaishay 423e3edc27 [OpenMP][IRBuilder] Fix emitAtomicUpdate conditions
This patch fixes the condition for emitting atomic update using
`atomicrmw` instruction or compare-exchange loop.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D121546
2022-03-21 16:19:43 +05:30
Eric Schweitz 1c083e6985 [mlir] Add support for the nest attribute to the LLVM-IR dialect conversion.
Differential Revision: https://reviews.llvm.org/D121948
2022-03-18 08:15:03 -07:00
River Riddle 3655069234 [mlir] Move the Builtin FuncOp to the Func dialect
This commit moves FuncOp out of the builtin dialect, and into the Func
dialect. This move has been planned in some capacity from the moment
we made FuncOp an operation (years ago). This commit handles the
functional aspects of the move, but various aspects are left untouched
to ease migration: func::FuncOp is re-exported into mlir to reduce
the actual API churn, the assembly format still accepts the unqualified
`func`. These temporary measures will remain for a little while to
simplify migration before being removed.

Differential Revision: https://reviews.llvm.org/D121266
2022-03-16 17:07:03 -07:00
Ian Bearman 7ecb7efc89 [MLIR] UnknownLoc on Inlinable Calls in LLVMIR Translation
During MLIR translation to LLVMIR if an inlineable call has an UnkownLoc we get this error message:

```
inlinable function call in a function with debug info must have a !dbg location
  call void @callee()
```

There is code that checks for this case and strips debug information to avoid this situation. I'm expanding this code to handle the case where an debug location points at a UnknownLoc. For example, a NamedLoc whose child location is an UnknownLoc.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D121633
2022-03-15 14:48:50 -07:00
Arnamoy Bhattacharyya 0e9198c3e9 [MLIR][OpenMP] Add support for basic SIMD construct
Patch adds a new operation for the SIMD construct.  The op is designed to be very similar to the existing `wsloop` operation, so that the `CanonicalLoopInfo` of `OpenMPIRBuilder` can be used.

Reviewed By: shraiysh

Differential Revision: https://reviews.llvm.org/D118065
2022-03-15 09:41:04 -04:00
Thomas Raoux 6d007e0278 [mlir][nvvm] Fix bug in ldmatrix intrinsic conversion
The ldmatrix intrinsic trans option was inverted.

Bug found by @christopherbate!

Differential Revision: https://reviews.llvm.org/D121666
2022-03-15 05:04:09 +00:00
Thomas Raoux 2f33f11428 [mlir][NVVM] Add ldmatrix op to NVVM dialect
Differential Revision: https://reviews.llvm.org/D121347
2022-03-10 20:37:17 +00:00
Shraiysh Vaishay a1ac771247 [MLIR][OpenMP][NFC] Move the modifier testcases to correct directory
This patch moves the testcases from
`mlir/test/Target/LLVMIR/openmp-llvm-bad-schedule-modifier.mlir` to
`mlir/test/Dialect/OpenMP/invalid.mlir` as they test the verifier
(not the translation to LLVM IR).

Reviewed By: NimishMishra

Differential Revision: https://reviews.llvm.org/D120877
2022-03-10 21:32:00 +05:30
Shraiysh Vaishay 6dd54da5a5 [OpenMP][mlir] Lowering for omp.atomic.update
This patch adds lowering from omp.atomic.update to LLVM IR. Whenever a
special LLVM IR instruction is available for the operation, `atomicrmw`
instruction is emitted, otherwise a compare-exchange loop based update
is emitted.

Depends on D119522

Reviewed By: ftynse, peixin

Differential Revision: https://reviews.llvm.org/D119657
2022-03-10 18:28:51 +05:30
Lei Zhang cfb9e474ae [mlir][spirv] Define spv.VectorTimesScalar op
Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D121247
2022-03-08 15:58:31 -05:00
River Riddle 47f175b09b [mlir] Update FuncOp conversion passes to Pass/InterfacePass<FunctionOpInterface>
These passes generally don't rely on any special aspects of FuncOp, and moving allows
for these passes to be used in many more situations. The passes that obviously weren't
relying on invariants guaranteed by a "function" were updated to be generic pass, the
rest were updated to be FunctionOpinterface InterfacePasses.

The test updates are NFC switching from implicit nesting (-pass -pass2) form to
the -pass-pipeline form (generic passes do not implicitly nest as op-specific passes do).

Differential Revision: https://reviews.llvm.org/D121190
2022-03-08 12:25:32 -08:00
River Riddle 5a7b919409 [mlir][NFC] Rename StandardToLLVM to FuncToLLVM
The current StandardToLLVM conversion patterns only really handle
the Func dialect. The pass itself adds patterns for Arithmetic/CFToLLVM, but
those should be/will be split out in a followup. This commit focuses solely
on being an NFC rename.

Aside from the directory change, the pattern and pass creation API have been renamed:
 * populateStdToLLVMFuncOpConversionPattern -> populateFuncToLLVMFuncOpConversionPattern
 * populateStdToLLVMConversionPatterns -> populateFuncToLLVMConversionPatterns
 * createLowerToLLVMPass -> createConvertFuncToLLVMPass

Differential Revision: https://reviews.llvm.org/D120778
2022-03-07 11:25:23 -08:00
William S. Moses 87ec6f41bb [OpenMPIRBuilder] Allocate temporary at the correct block in a nested parallel
The OpenMPIRBuilder has a bug. Specifically, suppose you have two nested openmp parallel regions (writing with MLIR for ease)

```
omp.parallel {
  %a = ...
  omp.parallel {
    use(%a)
  }
}
```

As OpenMP only permits pointer-like inputs, the builder will wrap all of the inputs into a stack allocation, and then pass this
allocation to the inner parallel. For example, we would want to get something like the following:

```
omp.parallel {
  %a = ...
  %tmp = alloc
  store %tmp[] = %a
  kmpc_fork(outlined, %tmp)
}
```

However, in practice, this is not what currently occurs in the context of nested parallel regions. Specifically to the OpenMPIRBuilder,
the entirety of the function (at the LLVM level) is currently inlined with blocks marking the corresponding start and end of each
region.

```
entry:
  ...

parallel1:
  %a = ...
  ...

parallel2:
  use(%a)
  ...

endparallel2:
  ...

endparallel1:
  ...
```

When the allocation is inserted, it presently inserted into the parent of the entire function (e.g. entry) rather than the parent
allocation scope to the function being outlined. If we were outlining parallel2, the corresponding alloca location would be parallel1.

This causes a variety of bugs, including https://github.com/llvm/llvm-project/issues/54165 as one example.

This PR allows the stack allocation to be created at the correct allocation block, and thus remedies such issues.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D121061
2022-03-06 18:34:25 -05:00
Peixin-Qiao a5605c9a15 [MLIR] Fix afterIP for dynamic worksharing-loop after collaping loops
The loopInfos gets invalidated after collapsing nested loops. Use the
saved afterIP since the returned afterIP by applyDynamicWorkshareLoop
may be not valid.

Reviewed By: shraiysh

Differential Revision: https://reviews.llvm.org/D120294
2022-03-03 15:22:20 +08:00
William S. Moses 758ddba381 [MLIR] Use Datalayout defaults when importing LLVM
LLVM defines several default datalayouts for integer and floating point types that are not being considered when importing into MLIR. This patch remedies this.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D120832
2022-03-02 13:00:53 -05:00
Alex Zinenko eb27da7dec [mlir] Ignore index data layout in translation to LLVM
It can be present, but is irrelevant for the translation.
2022-03-02 16:56:21 +01:00
Alex Zinenko ea998709eb [mlir] Add partial support for translating data layout
Add support for translating data layout specifications for integer and float
types between MLIR and LLVM IR. This is a first step towards removing the
string-based LLVM dialect data layout attribute on modules. The latter is still
available and will remain so until the first-class MLIR modeling can fully
replace it.

Depends On D120739

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D120740
2022-03-02 14:56:50 +01:00
Michael Kruse a66f7769a3 [OpenMPIRBuilder] Implement static-chunked workshare-loop schedules.
Add applyStaticChunkedWorkshareLoop method implementing static schedule when chunk-size is specified. Unlike a static schedule without chunk-size (where chunk-size is chosen by the runtime such that each thread receives one chunk), we need two nested loops: one for looping over the iterations of a chunk, and a second for looping over all chunks assigned to the threads.

This patch includes the following related changes:
 * Adapt applyWorkshareLoop to triage between the schedule types, now possible since all schedules have been implemented. The default schedule is assumed to be non-chunked static, as without OpenMPIRBuilder.
 * Remove the chunk parameter from applyStaticWorkshareLoop, it is ignored by the runtime. Change the value for the value passed to the init function to 0, as without OpenMPIRBuilder.
 * Refactor CanonicalLoopInfo::setTripCount and CanonicalLoopInfo::mapIndVar as used by both, applyStaticWorkshareLoop and applyStaticChunkedWorkshareLoop.
 * Enable Clang to use the OpenMPIRBuilder in the presence of the schedule clause.

Differential Revision: https://reviews.llvm.org/D114413
2022-02-28 18:18:33 -06:00
Marius Brehler 1fa1251116 [mlir][emitc] Add a variable op
This adds a variable op, emitted as C/C++ locale variable, which can be
used if the `emitc.constant` op is not sufficient.

As an example, the canonicalization pass would transform
```mlir
%0 = "emitc.constant"() {value = 0 : i32} : () -> i32
%1 = "emitc.constant"() {value = 0 : i32} : () -> i32
%2 = emitc.apply "&"(%0) : (i32) -> !emitc.ptr<i32>
%3 = emitc.apply "&"(%1) : (i32) -> !emitc.ptr<i32>
emitc.call "write"(%2, %3) : (!emitc.ptr<i32>, !emitc.ptr<i32>) -> ()
```
into
```mlir
%0 = "emitc.constant"() {value = 0 : i32} : () -> i32
%1 = emitc.apply "&"(%0) : (i32) -> !emitc.ptr<i32>
%2 = emitc.apply "&"(%0) : (i32) -> !emitc.ptr<i32>
emitc.call "write"(%1, %2) : (!emitc.ptr<i32>, !emitc.ptr<i32>) -> ()
```
resulting in pointer aliasing, as %1 and %2 point to the same address.
In such a case, the `emitc.variable` operation can be used instead.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D120098
2022-02-24 15:25:21 +00:00
Javier Setoain cd0d21b47b [mlir][LLVM] Allow scalable vectors in ShuffleVectorOp
The current implementation of ShuffleVectorOp assumes all vectors are
scalable. LLVM IR allows shufflevector operations on scalable vectors,
and the current translation between LLVM Dialect and LLVM IR does the
rigth thing when the shuffle mask is all zeroes. This is required to
do a splat operation on a scalable vector, but it doesn't make sense
for scalable vectors outside of that operation, i.e.: with non-all zero
masks.

Differential Revision: https://reviews.llvm.org/D118371
2022-02-24 11:24:34 +00:00
Shraiysh Vaishay 5ee500acbb [mlir][OpenMP] Remove clauses that are not being handled
This patch removes the following clauses from OpenMP Dialect:

 - private
 - firstprivate
 - lastprivate
 - shared
 - default
 - copyin
 - copyprivate

The privatization clauses are being handled in the flang frontend. The
data copying clauses are not being handled anywhere for now. Once
we have a better picture of how to handle these clauses in OpenMP
Dialect, we can add these. For the time being, removing unneeded
clauses.

For detailed discussion about this refer to [[ https://discourse.llvm.org/t/rfc-privatisation-in-openmp-dialect/3526 | Privatisation in OpenMP dialect ]]

Reviewed By: kiranchandramohan, clementval

Differential Revision: https://reviews.llvm.org/D120029
2022-02-19 01:13:05 +05:30
Krzysztof Drewniak 5f6ce97408 [MLIR] Add support for alloca() of non-zero address spaces
This change is needed when lowering alloca()-using code on targets
such as ROCDL that represent private scratch space as a separate
address space.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D119775
2022-02-15 18:41:30 +00:00
Ivan Butygin 32389d0c2e [mlir][spirv] Add OpenCL fma op and lowering
Also, it seems Khronos has changed html spec format so small adjustment to script was needed.
Base op parsing is also probably broken.

Differential Revision: https://reviews.llvm.org/D119678
2022-02-15 11:28:20 +03:00
Marius Brehler 88b9d1a49a [mlir][emitc] Add a pointer type
Adds a pointer type to EmitC. The emission of pointers is so far only
possible by using the `emitc.opaque` type

Co-authored-by: Simon Camphausen <simon.camphausen@iml.fraunhofer.de>

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D119337
2022-02-14 16:42:21 +00:00
Markus Böck 1bf7921374 [mlir][LLVM] Add support for adding a garbage collector to a LLVM function
This patch simply adds an optional garbage collector attribute to LLVMFuncOp which maps 1:1 to the "gc" property of functions in LLVM.

Differential Revision: https://reviews.llvm.org/D119492
2022-02-11 10:23:51 +01:00
River Riddle ace01605e0 [mlir] Split out a new ControlFlow dialect from Standard
This dialect is intended to model lower level/branch based control-flow constructs. The initial set
of operations are: AssertOp, BranchOp, CondBranchOp, SwitchOp; all split out from the current
standard dialect.

See https://discourse.llvm.org/t/standard-dialect-the-final-chapter/6061

Differential Revision: https://reviews.llvm.org/D118966
2022-02-06 14:51:16 -08:00
Marius Brehler 578122c18a [mlir] Don't emit unused labels
Stop the Cpp target from emitting unused labels. The previosly generated
code generated warning if `-Wunused-label` is passed to a compiler.

Co-authored-by: Simon Camphausen <simon.camphausen@iml.fraunhofer.de>

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D118154
2022-01-27 07:56:03 +00:00
Chuanqi Xu dbbe010908 [MLIR] [AsyncToLLVM] Use llvm.coro.align intrinsic
Use llvm.coro.align to align coroutine frame properly.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D117978
2022-01-25 19:28:25 +08:00
Peixin-Qiao a56a7d99e8 [MLIR][OpenMP] Support schedule chunk size with various bit width
The chunk size in schedule clause is one integer expression, which can
be either constant integer or integer variable. Fix schedule clause in
MLIR Op Def to support integer expression with different bit width.

Reviewed By: shraiysh

Differential Revision: https://reviews.llvm.org/D116073
2022-01-19 12:36:53 +08:00
Mogball aae5125550 [mlir] Replace StrEnumAttr -> EnumAttr in core dialects
Removes uses of `StrEnumAttr` in core dialects

Reviewed By: mehdi_amini, rriddle

Differential Revision: https://reviews.llvm.org/D117514
2022-01-18 17:15:00 +00:00
Mogball 5c36ee8d57 [mlir] Drop the leading space when printing regions
The leading space that is always printed at the beginning of regions is not consistent with other parts of the printing API. Moreover, this leading space can lead to undesirable assembly formats:

```
attr-dict-with-keyword $region
```

Prints as:

```
// Two spaces between `}` and `{`
attributes {foo}  { ... }
```

Moreover, the leading space results in the odd generic op format:

```
"test.op"() ( {...}) : () -> ()
```

Reviewed By: rriddle, mehdi_amini

Differential Revision: https://reviews.llvm.org/D117411
2022-01-18 16:52:34 +00:00
Alex Zinenko 1ad48d6de2 [mlir] handle nested regions in llvm-legalize-for-export
The translation from the MLIR LLVM dialect to LLVM IR includes a mechanism that
ensures the successors of a block to be different blocks in case block
arguments are passed to them since the opposite cannot be expressed in LLVM IR.
This mechanism previously only worked for functions because it was written
prior to the introduction of other region-carrying operations such as the
OpenMP dialect, which also translates directly to LLVM IR. Modify this
mechanism to handle all regions in the module and not only functions.

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D117548
2022-01-18 17:09:14 +01:00
Alex Zinenko bea16e72a7 [mlir] Fix invalid assertion in ModuleTranslation.cpp
LLVM dialect supports terminators with repeated successor blocks that take
different operands. This cannot be directly expressed in LLVM IR though since
it uses the number of the predecessor block to differentiate values in its PHI
nodes. Therefore, the translation to LLVM IR inserts dummy blocks to forward
arguments in case of repeated succesors with arguments. The insertion works
correctly. However, when connecting PHI nodes to their source values, the
assertion of the insertion having worked correctly was incorrect: it would only
trigger if repeated blocks were adjacent in the successor list (not guaranteed
by anything) and would not check if the successors have operands (no need for
dummy blocks in absence of operands since no PHIs are being created). Change
the assertion to only trigger in case of duplicate successors with operands,
and don't expect them to be adjacent.

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D117214
2022-01-14 12:56:33 +01:00
Peixin-Qiao f52805539b [OMPIRBuilder] Fix store inst alignment for ordered depend directive
OpenMP runtime requires depend vec with i64 type and the alignment of
store instruction should be set as 8.

Reviewed By: kiranchandramohan, shraiysh

Differential Revision: https://reviews.llvm.org/D116300
2022-01-14 09:47:11 +08:00
Javier Setoain 7c56458616 [mlir] Fix scalable type translation in splat element attr
LLVM Dialect Constant Op translations assume that if the attribute is a
vector, it's a fixed length one, generating an invalid translation for
constant scalable vector initializations.

Differential Revision: https://reviews.llvm.org/D117125
2022-01-13 11:14:41 +00:00
Shraiysh Vaishay a8586b573e [mlir][OpenMP] Change the syntax of omp.atomic.read op
This patch changes the syntax of omp.atomic.read to take the address of
destination, instead of having the value in a result. This will allow
using omp.atomic.read operation within an omp.atomic.capture operation
thus making its implementation less complex.

Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D116396
2022-01-10 16:19:45 +05:30
Alex Zinenko f50cfc44d6 [mlir] Require struct indices in LLVM::GEPOp to be constant
Recent commits added a possibility for indices in LLVM dialect GEP operations
to be supplied directly as constant attributes to ensure they remain such until
translation to LLVM IR happens. Make this required for indexing into LLVM
struct types to match LLVM IR requirements, otherwise the translation would
assert on constructing such IR.

For better compatibility with MLIR-style operation construction interface,
allow GEP operations to be constructed programmatically using Values pointing
to known constant operations as struct indices.

Depends On D116758

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D116759
2022-01-07 09:56:05 +01:00
Alex Zinenko cafaa35036 [mlir] Make it possible to directly supply constant values to LLVM GEPOp
In LLVM IR, the GEP indices that correspond to structures are required to be
i32 constants. MLIR models constants as just values defined by special
operations, and there is no verification that it is the case for structure
indices in GEP. Furthermore, some common transformations such as control flow
simplification may lead to the operands becoming non-constant. Make it possible
to directly supply constant values to LLVM GEPOp to guarantee they remain
constant until the translation to LLVM IR. This is not yet a requirement and
the verifier is not modified, this will be introduced separately.

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D116757
2022-01-07 09:56:01 +01:00
Shraiysh Vaishay 6bcb4c44de [mlir][OpenMP] Added omp.atomic.write lowering to LLVM IR
This patch adds omp.atomic.write lowering to LLVM IR.
Also, changed the syntax to have equal symbol instead of the comma to
make it more intuitive.

Reviewed By: kiranchandramohan, peixin

Differential Revision: https://reviews.llvm.org/D116416
2022-01-07 10:01:57 +05:30
Markus Böck 560972052a [mlir][LLVM] Implement mapping of phi source values of `llvm.invoke`
This patch allows the usage of the normalDestOperands and unwindDestOperands operands of llvm.invoke and have them be correctly mapped to phis in the successor when exported to LLVM IR.

Differential Revision: https://reviews.llvm.org/D116706
2022-01-06 11:27:14 +01:00
Markus Böck 2a0e05100c [mlir][LLVM] Set cleanup flag on `llvm.landingpad` when exporting to LLVM IR
Exporting a llvm.landingpad operation with the cleanup flag set is currently ignored by the export code.

Differential Revision: https://reviews.llvm.org/D116565
2022-01-04 08:19:26 +01:00
Markus Böck c343c200ea [mlir][LLVM] Fix mapping of result values of `llvm.invoke` during export
The result value of a llvm.invoke operation is currently not mapped to the corresponding llvm::Value* when exporting to LLVM IR. This leads to any later operations using the result to crash as it receives a nullptr.

Differential Revision: https://reviews.llvm.org/D116564
2022-01-03 23:53:01 +01:00
Markus Böck 3536d24a1a [mlir][LLVMIR] Add `llvm.eh.typeid.for` intrinsic
MLIR already exposes landingpads, the invokeop and the personality function on LLVM functions. With this intrinsic it should be possible to implement exception handling via the exception handling mechanisms provided by the Itanium ABI.

Differential Revision: https://reviews.llvm.org/D116436
2022-01-01 02:03:00 +01:00
Johannes Doerfert 7e14e881c4 [OpenMP][OpenACC] Update test after encoding change in D113126 2021-12-29 01:29:07 -06:00