into some cleanup I have been wanting to do when reading/writing registers.
Previously all RegisterContext subclasses would need to implement:
virtual bool
ReadRegisterBytes (uint32_t reg, DataExtractor &data);
virtual bool
WriteRegisterBytes (uint32_t reg, DataExtractor &data, uint32_t data_offset = 0);
There is now a new class specifically designed to hold register values:
lldb_private::RegisterValue
The new register context calls that subclasses must implement are:
virtual bool
ReadRegister (const RegisterInfo *reg_info, RegisterValue ®_value) = 0;
virtual bool
WriteRegister (const RegisterInfo *reg_info, const RegisterValue ®_value) = 0;
The RegisterValue class must be big enough to handle any register value. The
class contains an enumeration for the value type, and then a union for the
data value. Any integer/float values are stored directly in an appropriate
host integer/float. Anything bigger is stored in a byte buffer that has a length
and byte order. The RegisterValue class also knows how to copy register value
bytes into in a buffer with a specified byte order which can be used to write
the register value down into memory, and this does the right thing when not
all bytes from the register values are needed (getting a uint8 from a uint32
register value..).
All RegiterContext and other sources have been switched over to using the new
regiter value class.
llvm-svn: 131096
new OptionGroup subclasses for:
- output file for use with options:
long opts: --outfile <path> --append--output
short opts: -o <path> -A
- format for use with options:
long opts: --format <format>
- variable object display controls for depth, pointer depth, wether to show
types, show summary, show location, flat output, use objc "po" style summary.
Modified ValueObjectMemory to be able to be created either with a TypeSP or
a ClangASTType.
Switched "memory read" over to use OptionGroup subclasses: one for the outfile
options, one for the command specific options, and one for the format.
llvm-svn: 130334
Switch the EmulateInstruction to use the standard RegisterInfo structure
that is defined in the lldb private types intead of passing the reg kind and
reg num everywhere. EmulateInstruction subclasses also need to provide
RegisterInfo structs given a reg kind and reg num. This eliminates the need
for the GetRegisterName() virtual function and allows more complete information
to be passed around in the read/write register callbacks. Subclasses should
always provide RegiterInfo structs with the generic register info filled in as
well as at least one kind of register number in the RegisterInfo.kinds[] array.
llvm-svn: 130256
are defined as enumerations. Current bits include:
eEmulateInstructionOptionAutoAdvancePC
eEmulateInstructionOptionIgnoreConditions
Modified the EmulateInstruction class to have a few more pure virtuals that
can help clients understand how many instructions the emulator can handle:
virtual bool
SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0;
Where instruction types are defined as:
//------------------------------------------------------------------
/// Instruction types
//------------------------------------------------------------------
typedef enum InstructionType
{
eInstructionTypeAny, // Support for any instructions at all (at least one)
eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp
eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer
eInstructionTypeAll // All instructions of any kind
} InstructionType;
This allows use to tell what an emulator can do and also allows us to request
these abilities when we are finding the plug-in interface.
Added the ability for an EmulateInstruction class to get the register names
for any registers that are part of the emulation. This helps with being able
to dump and log effectively.
The UnwindAssembly class now stores the architecture it was created with in
case it is needed later in the unwinding process.
Added a function that can tell us DWARF register names for ARM that goes
along with the source/Utility/ARM_DWARF_Registers.h file:
source/Utility/ARM_DWARF_Registers.c
Took some of plug-ins out of the lldb_private namespace.
llvm-svn: 130189
The idea is that the instruction to be emulated is actually executed
on the hardware to be emulated, with the before and after state of the
hardware being captured and 'freeze-dried' into .dat files. The
emulation testing code then loads the before & after state from the
.dat file, emulates the instruction using the before state, and
compares the resulting state to the 'after' state. If they match, the
emulation is accurate, otherwise there is a problem.
The final format of the .dat files needs a bit more work; the plan is
to generalize them a bit and to convert the plain values to key-value pairs.
But I wanted to get this first pass committed.
This commit adds arm instruction emulation testing to the testsuite, along with
many initial .dat files.
It also fixes a bug in the llvm disassembler, where 32-bit thumb opcodes
were getting their upper & lower 16-bits reversed.
There is a new Instruction sub-class, that is intended to be loaded
from a .dat file rather than read from an executable. There is also a
new EmulationStateARM class, for handling the before & after states.
EmulationStates for other architetures can be added later when we
emulate their instructions.
llvm-svn: 129832
Greg Clayton