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3 Commits

Author SHA1 Message Date
Justin Holewinski 3e037d98e6 [NVPTX] Rename registers %fl -> %fd and %rl -> %rd 
This matches the internal behavior of NVIDIA tools like libnvvm.

llvm-svn: 213168
 2014-07-16 16:26:58 +00:00
Eli Bendersky 7cd70df708 Fix the test: DCE optimized away everything. 
Use volatile store to protect the generated PTX from DCE.

Patch by Jingyue Wu.

llvm-svn: 206763
 2014-04-21 17:23:12 +00:00
Justin Holewinski 871ec93909 [NVPTX] Fix bug in stack code generation causes by MC conversion 
We do use a very small set of physical registers, so account for
them in the virtual register encoding between MachineInstr and MC

llvm-svn: 187799
 2013-08-06 14:13:31 +00:00