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3 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen bde32d36bb Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions. 
Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.

This also makes the AVX variants redundant.

llvm-svn: 145440
 2011-11-29 22:27:25 +00:00
Chris Lattner ff392ab3ed now that generic vector types aren't selected onto MMX registers, these 
tests don't need -disable-mmx.

llvm-svn: 122188
 2010-12-19 20:12:58 +00:00
Mon P Wang 88ff56caa3 Make isScalarToVector to return false if the node is a scalar. This will prevent 
DAGCombine from making an illegal transformation of bitcast of a scalar to a
vector into a scalar_to_vector.

llvm-svn: 119819
 2010-11-19 19:08:12 +00:00