Commit Graph

3193 Commits

Author SHA1 Message Date
Dale Johannesen 65b404d61c Revise previous patch per review.
llvm-svn: 47573
2008-02-25 22:29:22 +00:00
Dan Gohman 0be2f3b941 Add an assert to verify that we don't see an
{S,U}MUL_LOHI with an unused high value.

llvm-svn: 47569
2008-02-25 22:15:55 +00:00
Dan Gohman 2ff975e749 Remove the hack that turned an {S,U}MUL_LOHI with an unused high
result into a MUL late in the X86 codegen process. ISD::MUL is
once again Legal on X86, so this is no longer needed. And, the
hack was suboptimal; see PR1874 for details.

llvm-svn: 47567
2008-02-25 21:57:04 +00:00
Dan Gohman 1f372edd97 Convert MaskedValueIsZero and all its users to use APInt. Also add
a SignBitIsZero function to simplify a common use case.

llvm-svn: 47561
2008-02-25 21:11:39 +00:00
Dale Johannesen 32d84b1772 Expand removal of MMX memory copies to allow 1 level
of TokenFactor underneath chain (seems to be enough)

llvm-svn: 47554
2008-02-25 19:20:14 +00:00
Evan Cheng 42cb72e52c Turning on remat of pic loads.
llvm-svn: 47524
2008-02-23 02:07:42 +00:00
Evan Cheng 4d17671997 No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case.
llvm-svn: 47522
2008-02-23 01:47:44 +00:00
Dale Johannesen 09f410b6d7 Split ParameterAttributes.h, putting the complicated
stuff into ParamAttrsList.h.  Per feedback from
ParamAttrs changes.

llvm-svn: 47504
2008-02-22 22:17:59 +00:00
Dale Johannesen eac159c1f0 MMX vectors are passed 4-byte aligned.
llvm-svn: 47483
2008-02-22 17:47:28 +00:00
Evan Cheng 94ba37f8e3 Allow re-materialization of pic load (controlled by -remat-pic-load for now).
llvm-svn: 47476
2008-02-22 09:25:47 +00:00
Chris Lattner ab8bfc28c8 copy mmx values from/to memory with GPRs on x86-32
instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.

llvm-svn: 47474
2008-02-22 05:18:04 +00:00
Chris Lattner 997b3a65ca Start using GPR's to copy around mmx value instead of mmx regs.
GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668

llvm-svn: 47470
2008-02-22 02:09:43 +00:00
Eli Friedman 5d8fa828f1 A few minor updates, removing implemented stuff and adding a couple of
new things.

llvm-svn: 47458
2008-02-21 21:16:49 +00:00
Chris Lattner e86c91f5b2 Dan implemented one multiply issue. Replace it with another. :)
llvm-svn: 47431
2008-02-21 06:51:29 +00:00
Andrew Lenharth 95528943e9 Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet
llvm-svn: 47430
2008-02-21 06:45:13 +00:00
Evan Cheng b6b69208ba Poorly named option.
llvm-svn: 47400
2008-02-20 20:57:32 +00:00
Anton Korobeynikov 18991d78fa Fix newly-introduced 4.3 warnings
llvm-svn: 47375
2008-02-20 12:07:57 +00:00
Anton Korobeynikov 40d67c59d5 Remove bunch of gcc 4.3-related warnings from Target
llvm-svn: 47369
2008-02-20 11:22:39 +00:00
Anton Korobeynikov 579f07135a Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings.
llvm-svn: 47367
2008-02-20 11:08:44 +00:00
Evan Cheng 7626ab33d8 Disable for now. This is pessimizing code.
llvm-svn: 47354
2008-02-20 02:29:17 +00:00
Evan Cheng 5ce8dd93ef Add hidden option -x86-fold-and-in-test to test the effect the test / and folding change.
llvm-svn: 47351
2008-02-19 23:36:51 +00:00
Chris Lattner 97b9662f78 Don't fold and's into test instructions if they have multiple uses.
This compiles test-nofold.ll into:

_test:
	movl	$15, %ecx
	andl	4(%esp), %ecx
	testl	%ecx, %ecx
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

instead of:
_test:
	movl	4(%esp), %eax
	movl	%eax, %ecx
	andl	$15, %ecx
	testl	$15, %eax
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

llvm-svn: 47330
2008-02-19 17:37:35 +00:00
Evan Cheng 3b56f506e7 Me not like duplicated comments.
llvm-svn: 47300
2008-02-19 02:05:16 +00:00
Evan Cheng 6200c225e0 - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.

llvm-svn: 47290
2008-02-18 23:04:32 +00:00
Dan Gohman c589243107 Chris pointed out that it's not necessary to set i64 MUL to Expand
on x86-32 since i64 itself is not a Legal type. And, update some
comments.

llvm-svn: 47282
2008-02-18 19:34:53 +00:00
Chris Lattner a827205670 Add a note about sext from i1 plus flags use.
llvm-svn: 47278
2008-02-18 18:30:13 +00:00
Dan Gohman a589ee11bb Don't mark scalar integer multiplication as Expand on x86, since x86
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.

This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.

llvm-svn: 47277
2008-02-18 17:55:26 +00:00
Chris Lattner 1f6520842c move PR2053 to here.
llvm-svn: 47237
2008-02-17 19:43:57 +00:00
Andrew Lenharth fedcf477b5 I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support.
llvm-svn: 47213
2008-02-16 14:46:26 +00:00
Andrew Lenharth 9b254eed32 llvm.memory.barrier, and impl for x86 and alpha
llvm-svn: 47204
2008-02-16 01:24:58 +00:00
Chris Lattner 7b1431785b Handle \n's in value names for more targets. The asm printers
really really really need refactoring :(

llvm-svn: 47171
2008-02-15 19:04:54 +00:00
Chris Lattner 318c41f9e8 If the llvm name contains an unprintable character, don't print it in
the global comment.  This prevents printing things like:

...  # foo
bar

when the name is "foo\nbar".

llvm-svn: 47170
2008-02-15 18:56:05 +00:00
Dale Johannesen 67b818f503 Remove warning about 64-bit code on processor
that doesn't support it.  Per Chris.

llvm-svn: 47162
2008-02-15 18:09:51 +00:00
Dale Johannesen 401a4d72d5 nocona, core2 and penryn support 64 bit.
llvm-svn: 47149
2008-02-15 01:22:41 +00:00
Duncan Sands 4c95dbd69f In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended.  It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned".  Currently
isSExt is set when signed, and nothing is
set otherwise.  This should be right for all
calls to standard library routines.

llvm-svn: 47122
2008-02-14 17:28:50 +00:00
Nate Begeman 53e1b3f9d5 Change how FP immediates are handled.
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
   if it is legal.

This allows ConstantFP to be handled like Constant, allowing for 
targets that can encode FP immediates as MachineOperands.

As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants!  Hooray.

llvm-svn: 47121
2008-02-14 08:57:00 +00:00
Chris Lattner eb63b09206 upgrade some entries, remove stuff that is done.
llvm-svn: 47109
2008-02-14 06:19:02 +00:00
Chris Lattner 5bc0957f5b the mid-level optimizer removes this stuff.
llvm-svn: 47108
2008-02-14 05:43:18 +00:00
Chris Lattner b43983b274 this one is easy.
llvm-svn: 47107
2008-02-14 05:41:38 +00:00
Chris Lattner 3bd37f549a This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
llvm-svn: 47106
2008-02-14 05:39:46 +00:00
Dan Gohman 9ca025f1dc Assigning an APInt to 0 with plain assignment gives it a one-bit
size. Initialize these APInts to properly-sized zero values.

llvm-svn: 47099
2008-02-13 23:07:24 +00:00
Dan Gohman e1d9ee66ed Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference. 

llvm-svn: 47096
2008-02-13 22:28:48 +00:00
Nicolas Geoffray 21ad494f67 Enable exception handling int JIT
llvm-svn: 47079
2008-02-13 18:39:37 +00:00
Nate Begeman eea32990a9 readme updates
llvm-svn: 47051
2008-02-13 07:06:12 +00:00
Evan Cheng 244183ef0d commuteInstr() can now commute non-ssa machine instrs.
llvm-svn: 47043
2008-02-13 02:46:49 +00:00
Dan Gohman f990faf23b Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.

llvm-svn: 47039
2008-02-13 00:35:47 +00:00
Dale Johannesen ffde4ff5b1 __DATA not __DATA__ is the right segment name on darwin.
Spotted by Nick Kledzik.

llvm-svn: 47037
2008-02-12 23:35:09 +00:00
Nate Begeman 8ef50214f0 SSE4.1 64b integer insert/extract pattern support
Move formats into the formats file

llvm-svn: 47035
2008-02-12 22:51:28 +00:00
Evan Cheng 8a25d6ac53 Only using x86-64 rip relative addressing in non-staic mode?
llvm-svn: 47019
2008-02-12 19:20:46 +00:00
Evan Cheng 352acec37e Update comment.
llvm-svn: 47002
2008-02-12 07:59:55 +00:00
Evan Cheng 4d8c98b8f9 Unbreak various insert_vector_elt and extract_vector_elt tests in presence of SSE4.
llvm-svn: 47001
2008-02-12 07:59:45 +00:00
Nate Begeman 2d77e8e446 Enable SSE4 codegen and pattern matching.
Add some notes to the README.

llvm-svn: 46949
2008-02-11 04:19:36 +00:00
Nate Begeman 3050f74a1d xmm0 variable blends
llvm-svn: 46931
2008-02-10 18:47:57 +00:00
Dan Gohman 3a4be0fdef Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Nate Begeman 727c7634c7 memopv16i8 had wrong alignment requirement, would have broken pabsb
pabs{b,w,d} are not two address
fix extract-to-mem sse4 ops
add sse4 vector sign extend nodes

llvm-svn: 46915
2008-02-09 23:46:37 +00:00
Nate Begeman 6715f755cc Skeleton of insert and extract matching, more to come
llvm-svn: 46902
2008-02-09 01:38:08 +00:00
Evan Cheng 3b3286d4bc It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
llvm-svn: 46893
2008-02-08 21:20:40 +00:00
Dale Johannesen 36c2967d89 64-bit (MMX) vectors do not need restrictive alignment.
128-bit vectors need it only when SSE is on.

llvm-svn: 46890
2008-02-08 19:48:20 +00:00
Dan Gohman 7a55a94ba1 Avoid needlessly casting away const qualifiers.
llvm-svn: 46877
2008-02-08 03:29:40 +00:00
Evan Cheng 8d59dd119b Added missing entries in X86 load / store folding tables.
llvm-svn: 46866
2008-02-08 00:12:56 +00:00
Dan Gohman 16d4bc3dc0 Follow Chris' suggestion; change the PseudoSourceValue accessors
to return pointers instead of references, since this is always what
is needed.

llvm-svn: 46857
2008-02-07 18:41:25 +00:00
Dan Gohman 63a8452e9c Add SourceValue information for outgoing argument stores on x86.
llvm-svn: 46854
2008-02-07 16:28:05 +00:00
Evan Cheng a20a773654 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax

llvm-svn: 46850
2008-02-07 08:53:49 +00:00
Evan Cheng 1bc1cae318 In some cases, e.g. ADD32ri, no transformation is made. Guide against it.
llvm-svn: 46849
2008-02-07 08:29:53 +00:00
Dan Gohman 2d489b5081 Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.

llvm-svn: 46827
2008-02-06 22:27:42 +00:00
Dale Johannesen d88f1d060e Implement sseregparm.
llvm-svn: 46764
2008-02-05 20:46:33 +00:00
Evan Cheng 2cb9068c78 Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
llvm-svn: 46724
2008-02-04 23:06:48 +00:00
Nate Begeman e146c0e3fd The rest of the SSE4.1 intrinsic patterns that are obvious to me. Getting
Evan's help with the rest.

llvm-svn: 46697
2008-02-04 06:00:24 +00:00
Nate Begeman ccdfd4aa17 Some more SSE 4.1 intrinsic patterns.
llvm-svn: 46696
2008-02-04 05:34:34 +00:00
Nate Begeman e14fdfaecd SSE 4.1 Intrinsics and detection
llvm-svn: 46681
2008-02-03 07:18:54 +00:00
Evan Cheng 32e5347eb8 Get rid of the annoying blank lines before labels.
llvm-svn: 46667
2008-02-02 08:39:46 +00:00
Nick Lewycky f5b9938ef6 Don't use uninitialized values. Fixes vec_align.ll on X86 Linux.
llvm-svn: 46666
2008-02-02 08:29:58 +00:00
Evan Cheng efd142a920 SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.

llvm-svn: 46659
2008-02-02 04:07:54 +00:00
Evan Cheng 4e7ff941f1 Frame index can be negative.
llvm-svn: 46655
2008-02-02 00:17:00 +00:00
Evan Cheng d6e44ab5ec Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before.
llvm-svn: 46635
2008-02-01 09:10:45 +00:00
Evan Cheng 27b32b87ed Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
llvm-svn: 46623
2008-01-31 21:00:00 +00:00
Evan Cheng 1c6c16ea11 Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
llvm-svn: 46609
2008-01-31 09:59:15 +00:00
Evan Cheng 6332dbec69 Add x86 specific getFrameIndexOffset(). This fixes local variable debugging info.
llvm-svn: 46598
2008-01-31 04:06:00 +00:00
Dan Gohman ed346f2ed5 Avoid unnecessarily casting away const.
llvm-svn: 46590
2008-01-31 01:01:48 +00:00
Dan Gohman 9ba4d76816 Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflicting
with the real FLT_ROUNDS (defined in <float.h>).

llvm-svn: 46587
2008-01-31 00:41:03 +00:00
Dan Gohman 3646fdda67 Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.

Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.

Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.

llvm-svn: 46585
2008-01-31 00:25:39 +00:00
Evan Cheng a3395a61cc Treat the label for the first @llvm.dbg.stoppoint the same way as the dbg_func_start label. Make sure nothing else is inserted before them.
Note this solution might be somewhat fragile since ISD::LABEL may be used for other
purposes. If that ends up to be an issue, we may need to introduce a different node
for debug labels.

llvm-svn: 46571
2008-01-30 20:08:35 +00:00
Evan Cheng 29cfb67e28 Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert
instruction at the end.

llvm-svn: 46562
2008-01-30 18:18:23 +00:00
Evan Cheng ed17ef7e18 Skip over the label which marks the beginning of the function before inserting prologue code.
llvm-svn: 46546
2008-01-30 03:57:33 +00:00
Evan Cheng 084a1cdcdd Work in progress. This patch *fixes* x86-64 calls which are modelled as StructRet but really should be return in registers, e.g. _Complex long double, some 128-bit aggregates. This is a short term solution that is necessary only because llvm, for now, cannot model i128 nor call's with multiple results.
Status: This only works for direct calls, and only the caller side is done. Disabled for now.

llvm-svn: 46527
2008-01-29 19:34:22 +00:00
Dale Johannesen 2b3bc30420 Handle 'X' constraint in asm's better.
llvm-svn: 46485
2008-01-29 02:21:21 +00:00
Chris Lattner 2e4719ec55 add a note
llvm-svn: 46413
2008-01-27 07:31:41 +00:00
Chris Lattner d05d2011d0 Use fldz and fld1 for long double constants instead of a constant pool load.
llvm-svn: 46411
2008-01-27 06:19:31 +00:00
Chris Lattner 2dd23b9f32 Add some notes.
llvm-svn: 46405
2008-01-26 20:12:07 +00:00
Chris Lattner 250789f1bd Remove some code for inferring alignment info from the x86 backend
now that the dag combiner does it.

llvm-svn: 46404
2008-01-26 20:07:42 +00:00
Bill Wendling 1a17ef02c8 If there's no instructions being emitted on X86 for a function, emit a
nop. Emit the nop directly for PPC.

llvm-svn: 46398
2008-01-26 09:03:52 +00:00
Chris Lattner f4523c35cb optimize fxor like for
llvm-svn: 46345
2008-01-25 06:14:17 +00:00
Chris Lattner 84ab724e06 Add target-specific dag combines for FAND(x,0) and FOR(x,0). This allows
us to compile:

double test(double X) {
  return copysign(0.0, X);
}

into:

_test:
	andpd	LCPI1_0(%rip), %xmm0
	ret

instead of:
_test:
	pxor	%xmm1, %xmm1
	andpd	LCPI1_0(%rip), %xmm1
	movapd	%xmm0, %xmm2
	andpd	LCPI1_1(%rip), %xmm2
	movapd	%xmm1, %xmm0
	orpd	%xmm2, %xmm0
	ret

llvm-svn: 46344
2008-01-25 05:46:26 +00:00
Anton Korobeynikov fcde616864 Provide correct DWARF register numbering for debug information emission on x86-32/Darwin.
This should fix bunch of issues.

llvm-svn: 46337
2008-01-25 00:34:13 +00:00
Chris Lattner a91f77eaac Significantly simplify and improve handling of FP function results on x86-32.
This case returns the value in ST(0) and then has to convert it to an SSE
register.  This causes significant codegen ugliness in some cases.  For 
example in the trivial fp-stack-direct-ret.ll testcase we used to generate:

_bar:
	subl	$28, %esp
	call	L_foo$stub
	fstpl	16(%esp)
	movsd	16(%esp), %xmm0
	movsd	%xmm0, 8(%esp)
	fldl	8(%esp)
	addl	$28, %esp
	ret

because we move the result of foo() into an XMM register, then have to
move it back for the return of bar.

Instead of hacking ever-more special cases into the call result lowering code
we take a much simpler approach: on x86-32, fp return is modeled as always 
returning into an f80 register which is then truncated to f32 or f64 as needed.
Similarly for a result, we model it as an extension to f80 + return.

This exposes the truncate and extensions to the dag combiner, allowing target
independent code to hack on them, eliminating them in this case.  This gives 
us this code for the example above:

_bar:
	subl	$12, %esp
	call	L_foo$stub
	addl	$12, %esp
	ret

The nasty aspect of this is that these conversions are not legal, but we want
the second pass of dag combiner (post-legalize) to be able to hack on them.
To handle this, we lie to legalize and say they are legal, then custom expand
them on entry to the isel pass (PreprocessForFPConvert).  This is gross, but
less gross than the code it is replacing :)

This also allows us to generate better code in several other cases.  For 
example on fp-stack-ret-conv.ll, we now generate:

_test:
	subl	$12, %esp
	call	L_foo$stub
	fstps	8(%esp)
	movl	16(%esp), %eax
	cvtss2sd	8(%esp), %xmm0
	movsd	%xmm0, (%eax)
	addl	$12, %esp
	ret

where before we produced (incidentally, the old bad code is identical to what
gcc produces):

_test:
	subl	$12, %esp
	call	L_foo$stub
	fstpl	(%esp)
	cvtsd2ss	(%esp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	16(%esp), %eax
	movsd	%xmm0, (%eax)
	addl	$12, %esp
	ret

Note that we generate slightly worse code on pr1505b.ll due to a scheduling 
deficiency that is unrelated to this patch.

llvm-svn: 46307
2008-01-24 08:07:48 +00:00
Evan Cheng 35abd840a6 Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare contains SSE vector(s). For x86-64, it's max of 8 or alignment of the type.
llvm-svn: 46286
2008-01-23 23:17:41 +00:00
Duncan Sands 95d46ef887 The last pieces needed for loading arbitrary
precision integers.  This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on.  While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.

llvm-svn: 46280
2008-01-23 20:39:46 +00:00
Dale Johannesen 7f1ff5fedd Honor explicit section information on Darwin.
llvm-svn: 46267
2008-01-23 00:58:14 +00:00
Evan Cheng 1e0d4d2aa8 SSE varargs arguments are passed in memory.
llvm-svn: 46262
2008-01-22 23:26:53 +00:00
Anton Korobeynikov da19b1c875 Honour ByVal parameter attribute for name decoration
llvm-svn: 46200
2008-01-20 14:00:07 +00:00
Anton Korobeynikov c7ffe0f4db Remove Darwin'ism
llvm-svn: 46199
2008-01-20 13:59:37 +00:00
Anton Korobeynikov 28d4302807 Enable PIC codegen on x86-64/linux
llvm-svn: 46198
2008-01-20 13:58:16 +00:00
Duncan Sands 3e95d963e9 Need to handle any 'nest' parameter before integer
parameters, since otherwise it won't be passed in
the right register.  With this change trampolines
work on x86-64 (thanks to Luke Guest for providing
access to an x86-64 box).

llvm-svn: 46192
2008-01-19 16:42:10 +00:00
Chris Lattner 7dc00e8021 make a method public
llvm-svn: 46159
2008-01-18 06:52:41 +00:00
Dale Johannesen 60a9855799 Revert the part of 45848 that treated weak globals
as weak globals rather than commons.  While not wrong,
this change tickled a latent bug in Darwin's strip,
so revert it for now as a workaround.

llvm-svn: 46144
2008-01-17 23:04:07 +00:00
Chris Lattner 1ea55cf816 This commit changes:
1. Legalize now always promotes truncstore of i1 to i8. 
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
   X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
   safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
	fldt	20(%esp)
	fldt	4(%esp)
	faddp	%st(1)
	movl	36(%esp), %eax
	fstps	(%eax)
	ret

instead of:

_foo:
	subl	$4, %esp
	fldt	24(%esp)
	fldt	8(%esp)
	faddp	%st(1)
	fstps	(%esp)
	movl	40(%esp), %eax
	movss	(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$4, %esp
	ret

llvm-svn: 46140
2008-01-17 19:59:44 +00:00
Chris Lattner 72733e573b * Introduce a new SelectionDAG::getIntPtrConstant method
and switch various codegen pieces and the X86 backend over
  to using it.

* Add some comments to SelectionDAGNodes.h

* Introduce a second argument to FP_ROUND, which indicates
  whether the FP_ROUND changes the value of its input. If
  not it is safe to xform things like fp_extend(fp_round(x)) -> x.

llvm-svn: 46125
2008-01-17 07:00:52 +00:00
Duncan Sands 32b0ff6814 Trampoline support for x86-64. This looks like
it should work, but I have no machine to test
it on.  Committed because it will at least
cause no harm, and maybe someone can test it
for me!

llvm-svn: 46098
2008-01-16 22:55:25 +00:00
Chris Lattner e8bb9f2190 make it more clear that this predicate only applies to scalar FP types.
llvm-svn: 46058
2008-01-16 06:24:21 +00:00
Chris Lattner 14e616ef0b introduce a isTypeInSSEReg predicate, which allows us to simplify
some code.  No functionality change.

llvm-svn: 46055
2008-01-16 06:19:45 +00:00
Chris Lattner 8f7cec859e My previous commit had an incomplete message, it should have been:
make the 'fp return in ST(0)' optimization smart enough to
look through token factor nodes.  THis allows us to compile 
testcases like CodeGen/X86/fp-stack-retcopy.ll into:

_carg:
	subl	$12, %esp
	call	L_foo$stub
	fstpl	(%esp)
	fldl	(%esp)
	addl	$12, %esp
	ret

instead of:

_carg:
	subl	$28, %esp
	call	L_foo$stub
	fstpl	16(%esp)
	movsd	16(%esp), %xmm0
	movsd	%xmm0, 8(%esp)
	fldl	8(%esp)
	addl	$28, %esp
	ret

Still not optimal, but much better and this is a trivial patch.  Fixing 
the rest requires invasive surgery that is is not llvm 2.2 material.

llvm-svn: 46054
2008-01-16 05:56:59 +00:00
Chris Lattner ea001f1db7 make the 'fp return in ST(0)' optimization smart enough to
look through token factor

llvm-svn: 46053
2008-01-16 05:53:06 +00:00
Chris Lattner de5c74f18e various whitespace cleanups, no functionality change.
llvm-svn: 46052
2008-01-16 05:52:18 +00:00
Dale Johannesen 59a2250b0d Fix and enable EH for x86-64 Darwin. Adds
ShortenEHDataFor64Bits as a not-very-accurate
abstraction to cover all the changes in DwarfWriter.
Some cosmetic changes to Darwin assembly code for
gcc testsuite compatibility.

llvm-svn: 46029
2008-01-15 23:24:56 +00:00
Chris Lattner 9a249b0ce5 rename SDTRet -> SDTNone.
Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.

llvm-svn: 46017
2008-01-15 22:02:54 +00:00
Chris Lattner 3c3fefde06 no need to expand ISD::TRAP to X86ISD::TRAP, just match ISD::TRAP.
llvm-svn: 46015
2008-01-15 21:58:22 +00:00
Anton Korobeynikov 59e6d533bd Fix JIT encoding of trap/ud2 instruction
llvm-svn: 46012
2008-01-15 21:40:02 +00:00
Anton Korobeynikov 6bbbc4cbfa For PR1839: add initial support for __builtin_trap. llvm-gcc part is missed
as well as PPC codegen

llvm-svn: 46001
2008-01-15 07:02:33 +00:00
Evan Cheng 4d70ba3134 Rename CCIfStruct to CCIfByVal and CCStructAssign to CCPassByVal. Remove unused parameters of CCStructAssign and add size and alignment requirement info.
llvm-svn: 45997
2008-01-15 03:34:58 +00:00
Evan Cheng 48bdfe63e2 Both x86-32 and x86-64 handle byval parameter attributes.
llvm-svn: 45996
2008-01-15 03:15:41 +00:00
Chris Lattner 3c43efc9d1 Improve the FP stackifier to decide all on its own whether
an instruction kills a register or not.  This is cheap and 
easy to do now that instructions record this on their flags,
and this eliminates the second pass of LiveVariables from the
x86 backend.  This speeds up a release llc by ~2.5%.

llvm-svn: 45955
2008-01-14 06:41:29 +00:00
Duncan Sands 51fe7bbcf5 Whitespace tweak.
llvm-svn: 45940
2008-01-13 21:20:29 +00:00
Evan Cheng 7411b510b2 Code clean up.
llvm-svn: 45898
2008-01-12 01:08:07 +00:00
Chris Lattner 18df33d0c8 fix a wordo that gordon noticed :)
llvm-svn: 45896
2008-01-12 00:53:16 +00:00
Chris Lattner 6da61c2515 Any x86 instruction that reads from an invariant location is invariant.
This allows us to sink things like:
	cvtsi2sd	32(%esp), %xmm1
when reading from the argument area, for example.

llvm-svn: 45895
2008-01-12 00:35:08 +00:00
Chris Lattner 596875118c rename MachineInstr::setInstrDescriptor -> setDesc
llvm-svn: 45871
2008-01-11 18:10:50 +00:00
Chris Lattner 806dd0e2ac remove xchg and shift-reg-by-1 instructions, which are dead.
llvm-svn: 45870
2008-01-11 18:00:50 +00:00
Chris Lattner ff5998e66b add a note, remove a done deed.
llvm-svn: 45869
2008-01-11 18:00:13 +00:00
Arnold Schwaighofer 06da9e2d43 hrm - correct spelling.
Actually were not riding any arguments. Sadly there is no semantic spell checker that is going to safe you from such a mistake.

llvm-svn: 45868
2008-01-11 17:10:15 +00:00
Arnold Schwaighofer 6cf72fbbaf Improve tail call optimized call's argument lowering. Before this
commit all arguments where moved to the stack slot where they would
reside on a normal function call before the lowering to the tail call
stack slot. This was done to prevent arguments overwriting each other.
Now only arguments sourcing from a FORMAL_ARGUMENTS node or a
CopyFromReg node with virtual register (could also be a caller's
argument) are lowered indirectly.

 --This line, and those below, will be ignored--

M    X86/X86ISelLowering.cpp
M    X86/README.txt

llvm-svn: 45867
2008-01-11 16:49:42 +00:00
Arnold Schwaighofer bf1816ea7b Correct a copy and paste error.
llvm-svn: 45865
2008-01-11 14:34:56 +00:00
Evan Cheng 8c51394e01 Rename Int_CVTSI642SSr* to Int_CVTSI2SS64r* for naming consistency and remove unused instructions.
llvm-svn: 45861
2008-01-11 07:37:44 +00:00
Chris Lattner 9283173061 more flags set right
llvm-svn: 45860
2008-01-11 07:18:17 +00:00
Chris Lattner f4b0c99d63 add some missing flags.
llvm-svn: 45859
2008-01-11 06:59:07 +00:00
Dale Johannesen 2ff66f08f2 Weak things initialized to 0 don't go in bss on Darwin.
Cosmetic changes to spacing to match gcc (some dejagnu
tests actually care).

llvm-svn: 45848
2008-01-11 00:54:37 +00:00
Chris Lattner c8226f32e9 Simplify the side effect stuff a bit more and make licm/sinking
both work right according to the new flags.

This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad. 

It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags.  Now the clients
can decide everything they need.

I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.

llvm-svn: 45843
2008-01-10 23:08:24 +00:00
Chris Lattner 8e60f2c996 IMPLICIT_USE and IMPLICIT_DEF are dead, remove them.
llvm-svn: 45838
2008-01-10 19:27:54 +00:00
Chris Lattner 317332fc2a Start inferring side effect information more aggressively, and fix many bugs in the
x86 backend where instructions were not marked maystore/mayload, and perf issues where
instructions were not marked neverHasSideEffects.  It would be really nice if we could
write patterns for copy instructions.

I have audited all the x86 instructions down to MOVDQAmr.  The flags on others and on
other targets are probably not right in all cases, but no clients currently use this
info that are enabled by default.

llvm-svn: 45829
2008-01-10 07:59:24 +00:00
Chris Lattner 2e38f2458c rename X86InstrX86-64.td -> X86Instr64bit.td
llvm-svn: 45826
2008-01-10 05:50:42 +00:00
Chris Lattner aca7ca3730 remove explicit sets of 'neverHasSideEffects' that can now be
inferred from the instr patterns.

llvm-svn: 45824
2008-01-10 05:45:39 +00:00
Chris Lattner 94de7bc3aa get def use info more correct.
llvm-svn: 45821
2008-01-10 05:12:37 +00:00
Chris Lattner f171482a66 verify that the frame index is immutable before remat'ing (still disabled)
or being side-effect free.

llvm-svn: 45816
2008-01-10 04:16:31 +00:00
Evan Cheng a26552493b Mark byval parameter stack objects mutable for now.
llvm-svn: 45813
2008-01-10 02:24:25 +00:00
Dale Johannesen 7ecb3b79c7 Emit unused EH frames for weak definitions on Darwin,
because assembler/linker can't cope with weak absolutes.
PR 1880.

llvm-svn: 45811
2008-01-10 02:03:30 +00:00
Evan Cheng fead113fe0 Do not use the stack pointer directly, issue a copyfromreg instead. Otherwise we can end up with something like ADD32ri %esp, x which two-address pass won't like.
llvm-svn: 45798
2008-01-10 00:37:26 +00:00
Evan Cheng 73d1017871 Remove comments that do not correspond to anything after recent refactoring.
llvm-svn: 45792
2008-01-10 00:09:10 +00:00
Chris Lattner 9129f51f9b add a testcase
llvm-svn: 45768
2008-01-09 00:37:18 +00:00
Duncan Sands bb956ca730 Use size_t to store Pos, avoid truncating value
on 64-bit builds.  Analysis and original patch
by Török Edwin.  Code audit found another place
with the same problem, also fixed here.

llvm-svn: 45746
2008-01-08 10:06:15 +00:00
Evan Cheng 00300ddff1 Minor fix to enable x86-64 pic jit (still fails for other reasons).
llvm-svn: 45734
2008-01-08 02:07:10 +00:00
Evan Cheng 4951da49aa Fix a x86-64 static codegen bug. This fixes a lot of x86-64 jit failures.
llvm-svn: 45733
2008-01-08 02:06:11 +00:00