Commit Graph

3193 Commits

Author SHA1 Message Date
Anton Korobeynikov 7b4f4e1a86 Initial support for Win64 calling conventions. Still in early state.
llvm-svn: 48690
2008-03-22 20:37:30 +00:00
Anton Korobeynikov 2fa75184f3 Another comments fixing
llvm-svn: 48683
2008-03-22 07:53:40 +00:00
Chris Lattner c55b444a8f Restore this assert now that the livevar bug is fixed.
This verifies kill info for "ret" fp operands is right.

llvm-svn: 48656
2008-03-21 20:41:27 +00:00
Duncan Sands d97eea372a Introduce a new node for holding call argument
flags.  This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines.  There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness.  As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.

llvm-svn: 48640
2008-03-21 09:14:45 +00:00
Chris Lattner 68b11e14bc remove Evan's "ugly hack" that sorta attempted to get
x86-64 return conventions correct, but was never enabled.
We can now do the "right thing" with multiple return values.

llvm-svn: 48635
2008-03-21 06:50:21 +00:00
Chris Lattner 5abbe6cef5 Add support for calls that return two FP values in
ST(0)/ST(1).

llvm-svn: 48634
2008-03-21 06:38:26 +00:00
Chris Lattner 7e59a30e9f disable a bogus assertion.
llvm-svn: 48633
2008-03-21 06:01:05 +00:00
Chris Lattner b6f04a3e0a Enable support for returning two long-double values in ST(0)/ST(1).
This allows us to compile fp-stack-2results.ll into:

_test:
	fldz
	fld1
	ret

which returns 1 in ST(0) and 0 in ST(1).  This is needed for x86-64
_Complex long double.

llvm-svn: 48632
2008-03-21 05:57:20 +00:00
Evan Cheng 92b4488202 Undo 48570. Correctly match mmx shift instructions with an immediate operand.
llvm-svn: 48627
2008-03-21 00:40:09 +00:00
Evan Cheng 7a3e750fd2 Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
llvm-svn: 48578
2008-03-20 02:18:41 +00:00
Evan Cheng bbba76fc99 Add intrinsics to match mmx shift builtin's with immediate operand.
llvm-svn: 48569
2008-03-19 23:38:52 +00:00
Arnold Schwaighofer 7da2bceb3b Don't loose incoming argument registers. Fix documentation style.
llvm-svn: 48545
2008-03-19 16:39:45 +00:00
Christopher Lamb 8fe9109469 Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
llvm-svn: 48542
2008-03-19 08:30:06 +00:00
Bill Wendling 2f6ab65d77 On Darwin, GCC issues a ".globl" for something that has a "visibility protected"
attribute instead of ".protected".

llvm-svn: 48516
2008-03-18 23:38:12 +00:00
Evan Cheng 484064370a Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it!
llvm-svn: 48515
2008-03-18 23:36:35 +00:00
Evan Cheng 24bc123e80 Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48447
2008-03-17 06:56:52 +00:00
Nate Begeman 9030ecec88 Add a couple missing SSE4 instructions
llvm-svn: 48430
2008-03-16 21:14:46 +00:00
Christopher Lamb d3d0ad3f58 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
llvm-svn: 48412
2008-03-16 03:12:01 +00:00
Evan Cheng 0e7b00d79f Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
Evan Cheng 5be52a6053 Fix some 80 col violations.
llvm-svn: 48361
2008-03-14 07:46:48 +00:00
Evan Cheng 96bdbd6c5d Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, etc. have 8-bits immediate field (ImmT == Imm8).
llvm-svn: 48360
2008-03-14 07:39:27 +00:00
Evan Cheng 77c8da7f00 Add debugging stuff.
llvm-svn: 48359
2008-03-14 07:13:42 +00:00
Chris Lattner 477d0f5294 Add an issue that is preventing instcombine from doing a simplification.
llvm-svn: 48356
2008-03-14 06:00:19 +00:00
Christopher Lamb dd55d3f1b2 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
2008-03-13 05:47:01 +00:00
Chris Lattner 8a923e7c28 Reimplement the parameter attributes support, phase #1. hilights:
1. There is now a "PAListPtr" class, which is a smart pointer around
   the underlying uniqued parameter attribute list object, and manages
   its refcount.  It is now impossible to mess up the refcount.
2. PAListPtr is now the main interface to the underlying object, and
   the underlying object is now completely opaque.
3. Implementation details like SmallVector and FoldingSet are now no
   longer part of the interface.
4. You can create a PAListPtr with an arbitrary sequence of
   ParamAttrsWithIndex's, no need to make a SmallVector of a specific 
   size (you can just use an array or scalar or vector if you wish).
5. All the client code that had to check for a null pointer before
   dereferencing the pointer is simplified to just access the 
   PAListPtr directly.
6. The interfaces for adding attrs to a list and removing them is a
   bit simpler.

Phase #2 will rename some stuff (e.g. PAListPtr) and do other less 
invasive changes.

llvm-svn: 48289
2008-03-12 17:45:29 +00:00
Evan Cheng 99ee78ef63 Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.

llvm-svn: 48279
2008-03-12 07:02:50 +00:00
Anton Korobeynikov e8fa50f63a Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
llvm-svn: 48257
2008-03-11 22:38:53 +00:00
Dan Gohman 24570836b2 Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Chris Lattner 8abed80a69 Implement basic support for the 'f' register class constraint. This basically
works, but probably won't if you mix it with 't' or 'u' yet.

llvm-svn: 48243
2008-03-11 19:50:13 +00:00
Chris Lattner 7b27ccfd5e coalesce away 80-bit floating point copies.
llvm-svn: 48241
2008-03-11 19:30:09 +00:00
Chris Lattner 7930d8e775 convert a massive if statement to a switch.
llvm-svn: 48240
2008-03-11 19:28:17 +00:00
Chris Lattner 120ad01fcb start handling the 'f' x87 constraint.
llvm-svn: 48239
2008-03-11 19:06:29 +00:00
Christopher Lamb 342e4104d3 Missed part of recommit.
llvm-svn: 48224
2008-03-11 10:27:36 +00:00
Christopher Lamb aa7c2105de Recommitting parts of r48130. These do not appear to cause the observed failures.
llvm-svn: 48223
2008-03-11 10:09:17 +00:00
Evan Cheng 5b59e372dc In 32-bit mode, mark 64-bit GPR's as unallocatable.
llvm-svn: 48217
2008-03-11 07:16:00 +00:00
Nick Lewycky a3860a2422 Fix the build on gcc 4.2.
llvm-svn: 48212
2008-03-11 05:56:09 +00:00
Chris Lattner 1bd44363f2 Change the model for FP Stack return to use fp operands on the
RET instruction instead of using FpSET_ST0_32.  This also generalizes
the code to handling returning of multiple FP results.

llvm-svn: 48209
2008-03-11 03:23:40 +00:00
Chris Lattner a4fa0ad30d abort with an assert instead of a cerr to get line#
llvm-svn: 48199
2008-03-10 23:56:08 +00:00
Chris Lattner 7362d38391 Don't emit FP_REG_KILL into a block that just returns. Nothing
can be live out of the block anyway, so it isn't needed.

llvm-svn: 48192
2008-03-10 23:34:12 +00:00
Chris Lattner 4b3a7fa823 Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to
copyfromreg/copytoreg instead.

llvm-svn: 48174
2008-03-10 21:08:41 +00:00
Evan Cheng ae2c56d93e Default ISD::PREFETCH to expand.
llvm-svn: 48169
2008-03-10 19:38:10 +00:00
Evan Cheng d4e1d9eeb2 Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
llvm-svn: 48167
2008-03-10 19:31:26 +00:00
Scott Michel a6729e8666 Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

llvm-svn: 48145
2008-03-10 15:42:14 +00:00
Christopher Lamb 4ba3f0430b Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

llvm-svn: 48130
2008-03-10 06:12:08 +00:00
Dale Johannesen 4e622ec86d Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)

llvm-svn: 48122
2008-03-10 02:17:22 +00:00
Chris Lattner 86829f0ff7 teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.

llvm-svn: 48107
2008-03-09 09:15:31 +00:00
Chris Lattner b79bafcec8 add some code to support cross-register class copying from
RST -> RFP{32/64/80}.  We only handle ST(0) for now.

llvm-svn: 48104
2008-03-09 08:46:19 +00:00
Chris Lattner c4c9dde04c rearrange some code, no functionality change.
llvm-svn: 48101
2008-03-09 07:58:04 +00:00
Chris Lattner 459f518703 claim ST(x) registers are 80 bits, which is true. This doesn't affect
codegen yet because these can't be spilled (they don't exist until after RA).

llvm-svn: 48098
2008-03-09 07:49:01 +00:00
Chris Lattner 4c869594bc rename FP_SETRESULT -> FP_SET_ST0
llvm-svn: 48094
2008-03-09 07:08:44 +00:00