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7 Commits

Author SHA1 Message Date
NAKAMURA Takumi 40aa3285f4 llvm/test/CodeGen/X86: FileCheck-ize two tests in r171083. 
llvm-svn: 171084
 2012-12-26 03:19:30 +00:00
NAKAMURA Takumi 334f685328 llvm/test/CodeGen/X86: Disable avx in two tests corresponding to r171082. 
llvm-svn: 171083
 2012-12-26 03:08:55 +00:00
Dan Gohman 40503396da Eliminate more uses of llvm-as and llvm-dis. 
llvm-svn: 81290
 2009-09-08 23:54:48 +00:00
Dan Gohman a5b9645c4b Split the Add, Sub, and Mul instruction opcodes into separate 
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt

llvm-svn: 72897
 2009-06-04 22:49:04 +00:00
Evan Cheng 0d6311d46c Add nounwind. 
llvm-svn: 50837
 2008-05-07 22:59:08 +00:00
Dan Gohman f9dd170e36 Convert tests using "| wc -l | grep ..." to use the count script. 
llvm-svn: 41097
 2007-08-15 13:36:28 +00:00
Dan Gohman 776962a97a Implement initial memory alignment awareness for SSE instructions. Vector loads 
and stores that have a specified alignment of less than 16 bytes now use
instructions that support misaligned memory references.

llvm-svn: 40015
 2007-07-18 20:23:34 +00:00