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4 Commits

Author SHA1 Message Date
Benjamin Kramer 5ea0349ef5 When lowering an inreg sext first shift left, then right arithmetically. 
Shifting right two times will only yield zero. Should fix
SingleSource/UnitTests/SignlessTypes/factor.

llvm-svn: 172322
 2013-01-12 19:06:44 +00:00
Nadav Rotem dbe5c72d03 PPC: Implement efficient lowering of sign_extend_inreg. 
llvm-svn: 172269
 2013-01-11 22:57:48 +00:00
Bill Schmidt 451499f02d This patch is in preparation for adding medium code model support to the 
PPC64 target.  The five tests modified herein test code generation that is
sensitive to the code model selected.  So I've added -code-model=small to
the RUN commands for each.

Since small code model is the default, this has no effect for now; but this
prepares us for eventually changing the default to medium code model for PPC64.

Test changes verified with small and medium code model as default on
powerpc64-unknown-linux-gnu.  All tests continue to pass.

llvm-svn: 167999
 2012-11-14 23:23:27 +00:00
Adhemerval Zanella c4182d1890 [PATCH] PowerPC: Expand load extend vector operations 
This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for
vector types when altivec is enabled.

llvm-svn: 167386
 2012-11-05 17:15:56 +00:00