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6 Commits

Author SHA1 Message Date
Akira Hatanaka 4f5c8421b3 Fix bugs in lowering of FCOPYSIGN nodes. 
- FCOPYSIGN nodes that have operands of different types were not handled.
- Different code was generated depending on the endianness of the target.

Additionally, code is added that emits INS and EXT instructions, if they are
supported by target (they are R2 instructions).

llvm-svn: 154540
 2012-04-11 22:13:04 +00:00
Akira Hatanaka db47e0c49d Add patterns for matching immediates whose lower 16-bit is cleared. These 
patterns emit a single LUi instruction instead of a pair of LUi and ORi.

llvm-svn: 146900
 2011-12-19 20:21:18 +00:00
Akira Hatanaka c5b5a8d8b1 Modify LowerFCOPYSIGN to handle Mips64. 
llvm-svn: 146080
 2011-12-07 21:48:50 +00:00
Dan Gohman c32af340fc Change the default scheduler from Latency to ILP, since Latency 
is going away.

llvm-svn: 142810
 2011-10-24 17:45:02 +00:00
Akira Hatanaka 5624707684 Fix test cases. 
Generate code for Mips32r1 unless a Mips32r2 feature is tested.

llvm-svn: 139433
 2011-09-09 23:14:58 +00:00
Akira Hatanaka 44eba3ac49 Custom-lower FCOPYSIGN nodes. 
llvm-svn: 132074
 2011-05-25 19:32:07 +00:00