Commit Graph

131843 Commits

Author SHA1 Message Date
Mehdi Amini 2a16a5fae5 ThinLTOCodeGenerator: handle std::error_code instead of silently dropping it.
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 269541
2016-05-14 04:58:38 +00:00
Mehdi Amini db8dd5515d StripDebugInfo: uses isa<DbgInfoIntrinsic> instead of matching against llvm.dbg.* (NFC)
Suggested by Adrian. This is NFC right now but is more clean and
robust against future potential new debug info intrinsics.

From: mehdi_amini <mehdi_amini@91177308-0d34-0410-b5e6-96231b3b80d8>
llvm-svn: 269540
2016-05-14 04:58:35 +00:00
Mehdi Amini 2f8a5f3f44 Revert "StripDebugInfo: uses isa<DbgInfoIntrinsic> instead of matching against llvm.dbg.* (NFC)"
This reverts commit r269537, was not ready to be commited and went through by mistake

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 269539
2016-05-14 04:42:51 +00:00
Mehdi Amini dec0e54d58 Add testing in llvm-lto for ThinLTO caching.
Trying to improve code coverage for `make check`

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 269538
2016-05-14 04:41:26 +00:00
Mehdi Amini ac85189998 StripDebugInfo: uses isa<DbgInfoIntrinsic> instead of matching against llvm.dbg.* (NFC)
Suggested by Adrian. This is NFC right now but is more clean and
robust against future potential new debug info intrinsics.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 269537
2016-05-14 04:41:21 +00:00
Mehdi Amini cbe76a0df7 Remove unwanted fprintf debug
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 269536
2016-05-14 04:41:14 +00:00
Craig Topper 449c2ea734 Revert r269534 "Silence a -Wundefined-var-template build warning." The bots didn't like that.
llvm-svn: 269535
2016-05-14 03:59:25 +00:00
Craig Topper a72939bc64 Silence a -Wundefined-var-template build warning.
llvm-svn: 269534
2016-05-14 03:48:43 +00:00
Dan Gohman a01e8bde57 [WebAssembly] Fix legalization of i128 shifts.
compiler-rt/libgcc shift routines expect the shift count to be an i32, so
use i32 as the shift count for shifts that are legalized to libcalls. This
also reverts r268991, now that the signatures are correct.

llvm-svn: 269531
2016-05-14 02:15:47 +00:00
Craig Topper d8a9c0d120 [AVX512] Fix types for pshufd intrinsics. The immediate is the second argument and the mask is the 4th argument. Also move the 128/256 tests to the right test file.
Prior to this the immediate was a strange 16-bits and the 512-bit intrinsic couldn't receive the full 16 mask bits it needs.

llvm-svn: 269526
2016-05-14 00:47:18 +00:00
Derek Schuff 0c020d11af [WebAssembly] Update expected torture test failures
NFC; the waterfall just changed the way they are built.

llvm-svn: 269523
2016-05-14 00:22:17 +00:00
Reid Kleckner 0b269748a6 [codeview] Add type stream merging prototype
Summary:
This code is intended to be used as part of LLD's PDB writing. Until
that exists, this is exposed via llvm-readobj for testing purposes.

Type stream merging uses the following algorithm:

- Begin with a new empty stream, and a new empty hash table that maps
  from type record contents to new type index.
- For each new type stream, maintain a map from source type index to
  destination type index.
- For each record, copy it and rewrite its type indices to be valid in
  the destination type stream.
- If the new type record is not already present in the destination
  stream hash table, append it to the destination type stream, assign it
  the next type index, and update the two hash tables.
- If the type record already exists in the destination stream, discard
  it and update the type index map to forward the source type index to
  the existing destination type index.

Reviewers: zturner, ruiu

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20122

llvm-svn: 269521
2016-05-14 00:02:53 +00:00
Justin Bogner eeae751429 SDAG: Implement Select instead of SelectImpl in MipsDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

llvm-svn: 269519
2016-05-13 23:55:59 +00:00
Marcin Koscielnicki a4fcd3681f [MSan] [PowerPC] Implement PowerPC64 vararg helper.
Differential Revision: http://reviews.llvm.org/D20000

llvm-svn: 269518
2016-05-13 23:55:33 +00:00
Justin Bogner 9b6b9c7f99 SDAG: Clean up a dead node I missed earlier in X86
H.J. Lu pointed out that I missed this in r269236. Thanks!

llvm-svn: 269516
2016-05-13 23:26:28 +00:00
Chris Bieneman 3e42b22e59 [MachO] More missing swapStruct implementations
Added swapStruct for ident_command, fvmlib and fvmlib_command.

llvm-svn: 269514
2016-05-13 23:01:22 +00:00
Chris Bieneman 405ca8c611 [MachO] Filling in some structs I missed in r269499
I missed the fvmlib_command and the sub_framework_command, as well as a few uses of the dylib_command, dylinker_command, and linkedit_data_command.

This should now be a pretty complete listing. The only case I'm not sure about is LC_PREPAGE which doesn't seem to be referenced directly anywhere in LLVM.

llvm-svn: 269513
2016-05-13 23:01:19 +00:00
Chad Rosier 08d9908ea9 [AArch64] Simplify logic to reduce vertical space. NFC.
llvm-svn: 269512
2016-05-13 22:53:13 +00:00
Davide Italiano 9922344178 [PM] Port LowerAtomic to the new pass manager.
llvm-svn: 269511
2016-05-13 22:52:35 +00:00
Justin Bogner 542a628907 SDAG: Implement Select instead of SelectImpl in XCoreDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

llvm-svn: 269509
2016-05-13 22:49:18 +00:00
Adam Nemet c62e554e9a [LAA] Include MaxSafeDepDistBytes in the analysis print-out
llvm-svn: 269508
2016-05-13 22:49:13 +00:00
Adam Nemet 4ad38b63d5 [LAA] Prepare the code to print more things in the summary. NFC
llvm-svn: 269507
2016-05-13 22:49:09 +00:00
Justin Bogner c6afd4bb36 SDAG: Implement Select instead of SelectImpl in WebAssemblyDAGToDAGISel
This backend doesn't do anything custom here yet, so we just modernize
the boilerplate.

Part of llvm.org/pr26808.

llvm-svn: 269506
2016-05-13 22:44:57 +00:00
Justin Bogner 9b34e8a770 SDAG: Implement Select instead of SelectImpl in SystemZDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.

Part of llvm.org/pr26808.

llvm-svn: 269505
2016-05-13 22:42:08 +00:00
Chandler Carruth 43b6c71e99 Another attempt to fix MSVC by explicitly disabling the conversion
operator when the value type can't be initialized from the argument
type. Testing with the online MSVC compiler is finally happy with this,
let's see if the build bot will tolerate it.

llvm-svn: 269501
2016-05-13 22:20:43 +00:00
Chris Bieneman e164ed2902 [MachO] Adding a few missing swapStruct functions
MachO.h was missing the swapStruct functions for a few load command structures.

llvm-svn: 269499
2016-05-13 22:12:44 +00:00
Chris Bieneman e6389e0206 [MachO] Adding struct field to MachO.def
This provides a mapping from load command names to the data structures.

llvm-svn: 269498
2016-05-13 22:12:41 +00:00
Kostya Serebryany a0788e7dd4 [libFuzzer] do the merge faster and a bit less precise
llvm-svn: 269497
2016-05-13 22:11:23 +00:00
Sanjay Patel abbc2ac231 use 'match' for less indenting; NFCI
llvm-svn: 269494
2016-05-13 21:51:17 +00:00
Vedant Kumar df41bd89a5 Retry "[ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC"
Transition InstrProf and Coverage over to the stricter Error/Expected
interface.

Changes since the initial commit:
- Fix error message printing in llvm-profdata.
- Check errors in loadTestingFormat() + annotateAllFunctions().
- Defer error handling in InstrProfIterator to InstrProfReader.

Differential Revision: http://reviews.llvm.org/D19901

llvm-svn: 269491
2016-05-13 21:50:56 +00:00
Justin Bogner 5a625be808 SDAG: Implement Select instead of SelectImpl in SparcDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

llvm-svn: 269490
2016-05-13 21:46:22 +00:00
Bruno Cardoso Lopes ead771cb7a [Support][Unittests] Add unittest for recursive_directory_iterator::level()
llvm-svn: 269488
2016-05-13 21:31:32 +00:00
Michael Zolotukhin 963a6d9c69 Revert "Revert "[Unroll] Implement a conservative and monotonically increasing cost tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the...""
This reverts commit r269395.

Try to reapply with a fix from chapuni.

llvm-svn: 269486
2016-05-13 21:23:25 +00:00
Sanjay Patel 16cfe9aa06 fix documentation comments; NFC
llvm-svn: 269485
2016-05-13 21:23:08 +00:00
Rui Ueyama 1f6b6e2c53 pdbdump: Print "Publics" stream.
Publics stream seems to contain information as to public symbols.
It actually contains a serialized hash table along with fixed-sized
headers. This patch is not complete. It scans only till the end of
the stream and dump the header information. I'll write code to
de-serialize the hash table later.

Reviewers: zturner

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20256

llvm-svn: 269484
2016-05-13 21:21:53 +00:00
Justin Bogner 8d83fb6132 SDAG: Implement Select instead of SelectImpl in NVPTXDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.

Part of llvm.org/pr26808.

llvm-svn: 269483
2016-05-13 21:12:53 +00:00
Matthew Simpson c326d050ca Correct spelling in comment (NFC)
llvm-svn: 269482
2016-05-13 21:01:07 +00:00
Jan Vesely 91aacad9c3 AMDGPU: Unify LowerGlobalAddress
Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19794

llvm-svn: 269481
2016-05-13 20:39:34 +00:00
Jan Vesely 1680039a7a AMDGPU/R600: Fold global address operand
Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19793

llvm-svn: 269480
2016-05-13 20:39:31 +00:00
Jan Vesely f97de00745 AMDGPU/R600: Implement memory loads from constant AS
Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19792

llvm-svn: 269479
2016-05-13 20:39:29 +00:00
Jan Vesely a1f9fdfcbc AMDGPU/R600: Add support for emitting MCExpr
Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19791

llvm-svn: 269478
2016-05-13 20:39:26 +00:00
Jan Vesely 7971464da8 AMDGPU: Add support for MCExpr to instruction printer
Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19790

llvm-svn: 269477
2016-05-13 20:39:24 +00:00
Jan Vesely 4368c1cf7e AMDGPU/R600: Use machine operands instead of ints to track literals
This will be used for global addresses

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19789

llvm-svn: 269476
2016-05-13 20:39:22 +00:00
Jan Vesely fac8d7ecb1 AMDGPU/R600: There are other uses for ALU_LITERAL besides Imm
This will be used for GV

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19788

llvm-svn: 269475
2016-05-13 20:39:20 +00:00
Jan Vesely fbcb754e66 AMDGPU: Make CONST_DATA_PTR available to R600
Rename to AMDGPUconstdata_ptr

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19786

llvm-svn: 269474
2016-05-13 20:39:18 +00:00
Jan Vesely 81f1b30035 AMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)
Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19785

llvm-svn: 269473
2016-05-13 20:39:16 +00:00
Sanjay Patel 5d5134f676 use range-loops; NFCI
llvm-svn: 269471
2016-05-13 20:24:53 +00:00
Steven Wu 25a7330cc8 Disable test from r269436 on unsupported platforms
Fixing bots failure. test/ExecutionEngine/RuntimeDyld/SystemZ/cfi-relo-pc64.s
requires SystemZ backend. Mark the test as unsupported if the backend is not
available.

llvm-svn: 269470
2016-05-13 20:10:51 +00:00
Vedant Kumar 064535c1ea Revert "(HEAD -> master, origin/master, origin/HEAD) [ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC"
This reverts commit r269462. It fails two llvm-profdata tests.

llvm-svn: 269466
2016-05-13 20:09:39 +00:00
Vedant Kumar ac25219d20 [ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC
Transition InstrProf and Coverage over to the stricter Error/Expected
interface.

Differential Revision: http://reviews.llvm.org/D19901

llvm-svn: 269462
2016-05-13 20:01:27 +00:00
Reid Kleckner 4525fbe22a [codeview] Align class and print names of types
Summary: This way we can get rid of one of the fields in the .def file.

Reviewers: llvm-commits

Subscribers: zturner

Differential Revision: http://reviews.llvm.org/D20251

llvm-svn: 269461
2016-05-13 19:37:07 +00:00
Tim Northover f8b0a7af52 ARM: use callee-saved list in the order they're actually saved.
When setting the frame pointer, the offset from SP is calculated based on the
stack slot it gets allocated, but this slot is in turn based on the order of
the CSR list so that list should match the order we actually save the registers
in. Mostly it did, but in the edge-case of MachO AAPCS targets it was wrong.

llvm-svn: 269459
2016-05-13 19:16:14 +00:00
Krzysztof Parzyszek 0f791f44c7 [Hexagon] Remove dead nodes from SelectionDAG to avoid cycles
Recent changes to the instruction selection code exposed a problem where
a dead node was not removed on time. This node had both input and output
chains, which lead to an apparent cycle.

llvm-svn: 269458
2016-05-13 18:48:15 +00:00
Jun Bum Lim be11bdc4b0 Rename getLargestLegalIntTypeSize to getLargestLegalIntTypeSizeInBits(). NFC.
Summary: Rename DataLayout::getLargestLegalIntTypeSize to DataLayout::getLargestLegalIntTypeSizeInBits() to prevent similar mistakes  fixed in r269433.

Reviewers: joker.eph, mcrosier

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20248

llvm-svn: 269456
2016-05-13 18:38:35 +00:00
Konstantin Zhuravlyov e3d322af57 [AMDGPU] Update nop insertion for debugger usage
- Insert one nop for each high level statement instead of two
- Do not insert nop before prologue

Differential Revision: http://reviews.llvm.org/D20215

llvm-svn: 269452
2016-05-13 18:21:28 +00:00
Renato Golin 1d1b82cbeb Revert "[ARM,AArch64] NFC. Add extra test cases for bswap lowering."
This reverts commit r269425, as it fails on Windows (Thumb only).

llvm-svn: 269451
2016-05-13 18:19:42 +00:00
Kostya Serebryany 6289536922 [libFuzzer] print the file name before executing the input so that if there is a crash we know which files has caused it
llvm-svn: 269450
2016-05-13 18:10:33 +00:00
Sanjay Patel 23fa090738 regenerate checks and add a run to show missed shrinkage
llvm-svn: 269449
2016-05-13 18:04:39 +00:00
Kostya Serebryany 8b0d90a6d4 [libFuzzer] simplify FuzzerInterface.h
llvm-svn: 269448
2016-05-13 18:04:35 +00:00
Sanjay Patel 4e0cf49318 regenerate checks
llvm-svn: 269447
2016-05-13 18:02:16 +00:00
Paul Osmialowski 4f5b3be7f1 add support for -print-imm-hex for AArch64
Most immediates are printed in Aarch64InstPrinter using 'formatImm' macro,
but not all of them.

Implementation contains following rules:

- floating point immediates are always printed as decimal
- signed integer immediates are printed depends on flag settings
  (for negative values 'formatImm' macro prints the value as i.e -0x01
  which may be convenient when imm is an address or offset)
- logical immediates are always printed as hex
- the 64-bit immediate for advSIMD, encoded in "a🅱️c:d:e:f:g:h" is always printed as hex
- the 64-bit immedaite in exception generation instructions like:
  brk, dcps1, dcps2, dcps3, hlt, hvc, smc, svc is always printed as hex
- the rest of immediates is printed depends on availability
  of -print-imm-hex

Signed-off-by: Maciej Gabka <maciej.gabka@arm.com>
Signed-off-by: Paul Osmialowski <pawel.osmialowski@arm.com>

Differential Revision: http://reviews.llvm.org/D16929

llvm-svn: 269446
2016-05-13 18:00:09 +00:00
Geoff Berry 2f64c20284 [EarlyCSE] Change key type of AvailableCalls to Instruction*. NFCI.
llvm-svn: 269445
2016-05-13 17:54:58 +00:00
Reid Kleckner bab3fab806 [codeview] Dump the type index on the first line of each record
This will make it easier to write FileCheck tests.

llvm-svn: 269444
2016-05-13 17:48:24 +00:00
Chris Bieneman 8b5906ea7f [obj2yaml] [yaml2obj] Basic support for MachO::load_command
This patch adds basic support for MachO::load_command. Load command types and sizes are encoded in the YAML and expanded back into MachO.

The YAML doesn't yet support load command structs, that is coming next. In the meantime as a temporary measure when writing MachO files the load commands are padded with zeros so that the generated binary is valid.

llvm-svn: 269442
2016-05-13 17:41:41 +00:00
Sanjay Patel 0c8f3f9332 [InstCombine] handle zero constant vectors for LE/GE comparisons too
Enhancement to: http://reviews.llvm.org/rL269426
With discussion in: http://reviews.llvm.org/D17859

This should complete the fixes for: PR26701, PR26819:
https://llvm.org/bugs/show_bug.cgi?id=26701
https://llvm.org/bugs/show_bug.cgi?id=26819
 

llvm-svn: 269439
2016-05-13 17:28:12 +00:00
Richard Smith 27dba61ff3 Update module map for r269380.
llvm-svn: 269438
2016-05-13 17:27:08 +00:00
Rong Xu 0698de9218 [PGO] Add flags to control IRPGO warnings.
Currently there is no reasonable way to control the warnings in the 'use' phase
of the IRPGO pass. This is problematic because the output can be somewhat
spammy. This patch adds some flags which allow us to optionally disable these
warnings. The current upstream behavior will remain the default.

Patch by Jake VanAdrighem (jvanadrighem@gmail.com)

Differential Revision: http://reviews.llvm.org/D20195

llvm-svn: 269437
2016-05-13 17:26:06 +00:00
Bryan Chan d1145ad253 [RuntimeDyld] Support R_390_PC64 relocation type
Summary: When the MCJIT generates ELF code, some DWARF data requires 64-bit PC-relative relocation (R_390_PC64). This patch adds support for R_390_PC64 relocation to RuntimeDyld::resolveSystemZRelocation, to avoid an assertion failure.

Reviewers: uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20033

llvm-svn: 269436
2016-05-13 17:23:48 +00:00
Jun Bum Lim f28beac419 [MemCpyOpt] Use MaxIntSize in byte instead of bit
Summary: This change fix the bug in isProfitableToUseMemset() where MaxIntSize shoule be in byte, not bit.

Reviewers: arsenm, joker.eph, mcrosier

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20176

llvm-svn: 269433
2016-05-13 16:52:24 +00:00
Renato Golin e9fa3585c5 Revert "[llc] New diagnostic handler"
This reverts commit r269428, as it breaks the LLDB build. We need to
understand how to change LLDB in the same way as LLC before landing this
again.

llvm-svn: 269432
2016-05-13 16:02:44 +00:00
Renato Golin d7a64a5b23 [llc] New diagnostic handler
Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.

This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).

Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.

Patch by Diana Picus.

llvm-svn: 269428
2016-05-13 15:37:46 +00:00
Sanjay Patel b79ab27853 [InstCombine] canonicalize* LE/GE vector integer comparisons to LT/GT (PR26701, PR26819)
*We don't currently handle the  edge case constants (min/max values), so it's not a complete
canonicalization.

To fully solve the motivating bugs, we need to enhance this to recognize a zero vector
too because that's a ConstantAggregateZero which is a ConstantData, not a ConstantVector
or a ConstantDataVector.

Differential Revision: http://reviews.llvm.org/D17859 

llvm-svn: 269426
2016-05-13 15:10:46 +00:00
Renato Golin 8793c521bc [ARM,AArch64] NFC. Add extra test cases for bswap lowering.
These tests were sitting in Phab for many months. They're good tests and should be in.

Patch by Charlie Turner.

llvm-svn: 269425
2016-05-13 15:10:24 +00:00
Silviu Baranga 24dbd2e760 [scan-build] fix warnings emiited on LLVM Analysis code base
Fix "Logic error" warnings of the type "Called C++ object pointer is
null" reported by Clang Static Analyzer on the following files:

lib/Analysis/ScalarEvolution.cpp,
lib/Analysis/LoopInfo.cpp.

Patch by Apelete Seketeli!

llvm-svn: 269424
2016-05-13 14:54:50 +00:00
Simon Pilgrim 217b886b10 [X86][AVX512] Moved CHECKs inside functions to stop update_llc_test_checks going haywire
I'm not going to regenerate these anytime soon but do have some diffs to apply that I'd like to do with update_llc_test_checks

llvm-svn: 269420
2016-05-13 14:47:55 +00:00
Krzysztof Parzyszek a0ea73c9af [scan-build] fix dead store warnings emitted on LLVM Hexagon code base
Patch by Apelete Seketeli.

Differential Revision: http://reviews.llvm.org/D19900

llvm-svn: 269415
2016-05-13 13:13:59 +00:00
Krzysztof Parzyszek b78c008c45 [MIB] Create a helper function getRegState to extract all register flags
llvm-svn: 269414
2016-05-13 13:01:19 +00:00
Amjad Aboud 78b1fb0146 Assure calling "cld" instruction in prologue of X86 interrupt handler function.
Differential Revision: http://reviews.llvm.org/D18725

llvm-svn: 269413
2016-05-13 12:46:57 +00:00
Daniel Sanders e91e52671a [mips][ias] Work around yet another incorrect microMIPS relocation evaluation exposed by r268900.
It's not entirely clear why R_MICROMIPS_(GOT|HI16|LO16) are evaluated
incorrectly in a small number of the LNT tests at this point. However, it's not
related to the STO_MIPS_MICROMIPS issue.

At this point all the microMIPS-related changes of r268900 have been reverted.

llvm-svn: 269410
2016-05-13 12:07:14 +00:00
Chandler Carruth 6a6916ab02 Yet another attempt to appease MSVC...
llvm-svn: 269409
2016-05-13 11:39:37 +00:00
Hrvoje Varga 6f09cdfd48 [mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and MULSAQ_S.W.PH instructions
Differential Revision: http://reviews.llvm.org/D14117

llvm-svn: 269408
2016-05-13 11:32:53 +00:00
Chandler Carruth 6ec636d21e Try to fix MSVC by explicitly providing copy and move constructors so it
doesn't try to use the converting constructor template for those
operations.

llvm-svn: 269406
2016-05-13 10:55:23 +00:00
Daniel Sanders 031da59423 [llvm-mc-fuzzer] Use LLVMFuzzerInitialize() instead of a custom main() and FuzzerDriver()
Reviewers: kcc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20201

llvm-svn: 269405
2016-05-13 10:23:04 +00:00
George Rimar cdb7dab06c [Support/ELF] - Added few constants and structs relative to compressed sections.
Patch adds few constants and structs to support compressed sections.

SHF_COMPRESSED intersects with platform specific XCORE_SHF_CP_SECTION,
both has value of 0x800U.

Reference link:
http://www.sco.com/developers/gabi/latest/ch4.sheader.html

Differential revision: http://reviews.llvm.org/D20209

llvm-svn: 269404
2016-05-13 10:20:12 +00:00
Justin Bogner 9469fe7de3 SDAG: Clean up a dangling node in SparcISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.

Part of llvm.org/pr26808.

llvm-svn: 269396
2016-05-13 06:37:53 +00:00
Michael Zolotukhin 9be3b8b9bb Revert "[Unroll] Implement a conservative and monotonically increasing cost tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the..."
This reverts commit r269388.

It caused some bots to fail, I'm reverting it until I investigate the
issue.

llvm-svn: 269395
2016-05-13 06:32:25 +00:00
Justin Bogner e58d6228dc SDAG: Clean up a dangling node in MipsISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.

Part of llvm.org/pr26808.

llvm-svn: 269394
2016-05-13 06:30:15 +00:00
Justin Bogner 538b18834d SDAG: Implement Select instead of SelectImpl in MSP430DAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

llvm-svn: 269393
2016-05-13 06:10:50 +00:00
Adam Nemet eff76646f5 [LoopDist] Only run LAA for loops with the pragma
This should fix some compile-time regressions after r267672.  Thanks to
Chris Matthews for bisecting it.

llvm-svn: 269392
2016-05-13 04:20:31 +00:00
Matt Arsenault 999f7dd84c AMDGPU: Remove verifier check for scc live ins
We only really need this to be true for SIFixSGPRCopies.
I'm not sure there's any way this could happen before that point.

Fixes a case where MachineCSE could introduce a cross block
scc use.

llvm-svn: 269391
2016-05-13 04:15:48 +00:00
Chandler Carruth d1ad58b196 [ADT] Add an 'llvm::seq' function which produces an iterator range over
a sequence of values.

It increments through the values in the half-open range: [Begin, End),
producing those values when indirecting the iterator. It should support
integers, iterators, and any other type providing these basic arithmetic
operations.

This came up in the C++ standards committee meeting, and it seemed like
a useful construct that LLVM might want as well, and I wanted to
understand how easily we could solve it. I suspect this can be used to
write simpler counting loops even in LLVM along the lines of:

  for (int i : seq(0, v.size())) {
    ...
  };

As part of this, I had to fix the lack of a proxy object returned from
the operator[] in our iterator facade.

Differential Revision: http://reviews.llvm.org/D17870

llvm-svn: 269390
2016-05-13 03:57:50 +00:00
Michael Zolotukhin b7b8052982 [Unroll] Implement a conservative and monotonically increasing cost tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the...
Summary:
...loop after the last iteration.

This is really hard to do correctly. The core problem is that we need to
model liveness through the induction PHIs from iteration to iteration in
order to get the correct results, and we need to correctly de-duplicate
the common subgraphs of instructions feeding some subset of the
induction PHIs. All of this can be driven either from a side effect at
some iteration or from the loop values used after the loop finishes.

This patch implements this by storing the forward-propagating analysis
of each instruction in a cache to recall whether it was free and whether
it has become live and thus counted toward the total unroll cost. Then,
at each sink for a value in the loop, we recursively walk back through
every value that feeds the sink, including looping back through the
iterations as needed, until we have marked the entire input graph as
live. Because we cache this, we never visit instructions more than twice
-- once when we analyze them and put them into the cache, and once when
we count their cost towards the unrolled loop. Also, because the cache
is only two bits and because we are dealing with relatively small
iteration counts, we can store all of this very densely in memory to
avoid this from becoming an excessively slow analysis.

The code here is still pretty gross. I would appreciate suggestions
about better ways to factor or split this up, I've stared too long at
the algorithmic side to really have a good sense of what the design
should probably look at.

Also, it might seem like we should do all of this bottom-up, but I think
that is a red herring. Specifically, the simplification power is *much*
greater working top-down. We can forward propagate very effectively,
even across strange and interesting recurrances around the backedge.
Because we use data to propagate, this doesn't cause a state space
explosion. Doing this level of constant folding, etc, would be very
expensive to do bottom-up because it wouldn't be until the last moment
that you could collapse everything. The current solution is essentially
a top-down simplification with a bottom-up cost accounting which seems
to get the best of both worlds. It makes the simplification incremental
and powerful while leaving everything dead until we *know* it is needed.

Finally, a core property of this approach is its *monotonicity*. At all
times, the current UnrolledCost is a conservatively low estimate. This
ensures that we will never early-exit from the analysis due to exceeding
a threshold when if we had continued, the cost would have gone back
below the threshold. These kinds of bugs can cause incredibly hard to
track down random changes to behavior.

We could use a techinque similar (but much simpler) within the inliner
as well to avoid considering speculated code in the inline cost.

Reviewers: chandlerc

Subscribers: sanjoy, mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D11758

llvm-svn: 269388
2016-05-13 01:42:39 +00:00
Michael Zolotukhin a59a308e8d [LoopUnrollAnalyzer] Don't treat gep-instructions with simplified offset as simplified.
Summary:
Currently we consider such instructions as simplified, which is incorrect,
because if their user isn't simplified, we can't actually simplify them too.
This biases our estimates of profitability: for instance the analyzer expects
much more gains from unrolling memcpy loops than there actually are.

Reviewers: hfinkel, chandlerc

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D17365

llvm-svn: 269387
2016-05-13 01:42:34 +00:00
Teresa Johnson 532e33be42 [ThinLTO] Use correct pipeline for ThinLTO in gold-plugin.
This change is the gold side of the change made in D17115 and clang
patch r261045 to add a ThinLTO specific pipeline that moves more of
the optimization to the backends.

llvm-svn: 269386
2016-05-13 01:25:31 +00:00
Xinliang David Li 8e6b917ec8 Remove runtime specific code from common header
llvm-svn: 269384
2016-05-13 00:23:49 +00:00
Adrian Prantl e1bc3e2027 dsymutil: Fix the DWOId mismatch check for cached modules.
In verbose mode, we emit a warning if the DWOId of a skeleton CU
mismatches the DWOId of the referenced module. This patch updates the
cached DWOId after a module has been loaded to the DWOId of the module
on disk (instead of storing the DWOId we expected to load). This
allows us to correctly emit the mismatch warning for all subsequent
object files that want to import the same module. This patch also
ensures both warnings are only emitted in verbose mode.

rdar://problem/26214027

llvm-svn: 269383
2016-05-13 00:17:58 +00:00
Reid Kleckner ce5196e728 [codeview] Try to handle errors better in record iterator
llvm-svn: 269381
2016-05-12 23:26:23 +00:00
Chris Bieneman 05a19af7f1 [MachO] Extract MachO load command enums into a def file
Having the MachO enums in a def file instead of inline will allow us to write utilities and encoding/decoding methods for load commands without having to write a lot of mechanically repeated code.

llvm-svn: 269380
2016-05-12 23:18:31 +00:00
Justin Bogner 283e3bd793 SDAG: Implement Select instead of SelectImpl in AArch64DAGToDAGISel
This one has a lot of code churn, but it's all mechanical and
straightforward.

- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

llvm-svn: 269379
2016-05-12 23:10:30 +00:00
Hemant Kulkarni 787c2ed672 llvm-readobj: Fix GNU style entry point print width
llvm-svn: 269376
2016-05-12 22:51:26 +00:00
Reid Kleckner 0e85b97307 [codeview] Fix dumping VFTables, stop when we see LF_PAD*
Also stop visiting type records when we encounter an error.

llvm-svn: 269374
2016-05-12 22:46:41 +00:00
Chandler Carruth 49c22190d0 [PM] Port of the DepndenceAnalysis to the new PM.
Ported DA to the new PM by splitting the former DependenceAnalysis Pass
into a DependenceInfo result type and DependenceAnalysisWrapperPass type
and adding a new PM-style DependenceAnalysis analysis pass returning the
DependenceInfo.

Patch by Philip Pfaffe, most of the review by Justin.

Differential Revision: http://reviews.llvm.org/D18834

llvm-svn: 269370
2016-05-12 22:19:39 +00:00
Hemant Kulkarni cb21f3c73d llvm-readobj: Change Hex output for GNU style dynamic table print
Dynamic table when printed shows uppercase tag/values.
This changes it to lower case when printing in GNU style

llvm-svn: 269368
2016-05-12 22:16:53 +00:00
Justin Bogner 7a0fe694b8 SDAG: Implement Select instead of SelectImpl in LanaiDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

llvm-svn: 269364
2016-05-12 21:56:18 +00:00
Justin Bogner ec37a02766 SDAG: Implement Select instead of SelectImpl in HexagonDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we had already replaced all uses and we returned a node, just
  remove the dead node instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.

Part of llvm.org/pr26808.

llvm-svn: 269358
2016-05-12 21:46:18 +00:00
Adam Nemet 2c34ab51a4 [LAA] Use std::min. NFC
llvm-svn: 269356
2016-05-12 21:41:53 +00:00
Justin Bogner d82025b133 SDAG: Clean up a dangling node in HexagonISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.

Part of llvm.org/pr26808.

llvm-svn: 269355
2016-05-12 21:24:23 +00:00
Renato Golin 608cb5def6 [ARM] Support and tests for transform of LDR rt, = to MOV
This change implements the transformation in processInstruction() for the
LDR rt, =expression to MOV rt, expression when the expression can be evaluated
and can fit into the immediate field of the MOV or a MVN.

Across the ARM and Thumb instruction sets there are several cases to consider,
each with a different range of representatble constants.

In ARM we have:
 * Modified immediate (All ARM architectures)
 * MOVW (v6t2 and above)

In Thumb we have:
 * Modified immediate (v6t2, v7m and v8m.mainline)
 * MOVW (v6t2, v7m, v8.mainline and v8m.baseline)
 * Narrow Thumb MOV that can be used in an IT block (non flag-setting)

If the immediate fits any of the available alternatives then we make the transformation.

Fixes 25722.

Patch by Peter Smith.

llvm-svn: 269354
2016-05-12 21:22:42 +00:00
Renato Golin d5491ab1f9 [ARM] Fixup tests to take into account mov translation. NFC.
Alter instances in the test-suite that use immediates that can be represented
in the immediate field of a MOV. The reason for doing this is that when the
LDR rt,=imm transformation to MOV rt, imm the existing tests do not need to
be modified.

Required by the patch that fixes PR25722.

Patch by Peter Smith.

llvm-svn: 269353
2016-05-12 21:22:37 +00:00
Renato Golin 3f126138a1 [ARM] Delay ARM constant pool creation. NFC.
This change adds a new constant pool kind to ARMOperand. When parsing the
operand for =immediate we create an instance of this operand rather than
creating a constant pool entry and rewriting the operand.

As the new operand kind is only created for ldr rt,= we can make ldr rt,=
an explicit pseudo instruction in ARM, Thumb and Thumb2

The pseudo instruction is expanded in processInstruction(). This creates the
constant pool and transforms the pseudo instruction into a pc-relative ldr to
the constant pool.

There are no functional changes and no modifications needed to existing tests.

Required by the patch that fixes PR25722.

Patch by Peter Smith.

llvm-svn: 269352
2016-05-12 21:22:31 +00:00
Justin Bogner f076e79388 SDAG: Implement Select instead of SelectImpl in BPFDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

llvm-svn: 269350
2016-05-12 21:14:47 +00:00
Justin Bogner 95927c0fd0 SDAG: Implement Select instead of SelectImpl in AMDGPUDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.

Part of llvm.org/pr26808.

llvm-svn: 269349
2016-05-12 21:03:32 +00:00
Simon Pilgrim 3ac4d831ee Tidied up switch cases. NFCI.
Split FCMP//ICMP/SEL from the basic arithmetic cost functions. They were not sharing any notable code path (just the return) and were repeatedly testing the opcode.

llvm-svn: 269348
2016-05-12 21:01:20 +00:00
John Regehr 6a493f2c4a [Docs] clarify semantics of x.with.overflow intrinsics
Differential Revision: http://reviews.llvm.org/D20151

llvm-svn: 269346
2016-05-12 20:55:09 +00:00
Justin Bogner 3525da7466 SDAG: Clean up dangling nodes in AArch64ISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.

Part of llvm.org/pr26808.

llvm-svn: 269345
2016-05-12 20:54:27 +00:00
Tom Stellard 740af6f3b0 Revert "LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()"
This reverts commit r269016 and also the follow-up commit r269020.

This patch caused PR27705.

llvm-svn: 269344
2016-05-12 20:27:40 +00:00
David Blaikie bc8397cdf0 llvm-dwp: Use llvm::Error to improve diagnostic quality/error handling in llvm-dwp
llvm-svn: 269339
2016-05-12 19:59:54 +00:00
Hemant Kulkarni 04ac3d730c llvm-readobj: Fix the GNU section header flags for SHF_MASKPROC and SHF_MASKOS
llvm-svn: 269338
2016-05-12 19:58:52 +00:00
Amjad Aboud f29608265d Fixed the callee saved registers list for X86 AllRegs calling convention.
32-bit AllRegs:
SSE: xmm0-xmm7
AVX: ymm0-ymm7
AVX512: zmm0-zmm7 + k0-k7

64-bit AllRegs:
SSE: xmm0-xmm15
AVX: ymm0-ymm15
AVX512: zmm0-zmm31 + k0-k7

Differential Revision: http://reviews.llvm.org/D20142

llvm-svn: 269337
2016-05-12 19:58:32 +00:00
Chris Bieneman 9183c1ab32 [obj2yaml] Fix ASAN bot failure
I was leaking out of a unique_ptr, should have just kept it in the unique_ptr.

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/12738/steps/check-llvm%20asan/logs/stdio

llvm-svn: 269336
2016-05-12 19:57:07 +00:00
Chad Rosier 179480a4ea [AArch64] Give function a more appropriate name.
llvm-svn: 269335
2016-05-12 19:51:58 +00:00
Amjad Aboud f85452426c Fixed dwarf X86-32 register mapping for k0-k7 registers.
llvm-svn: 269333
2016-05-12 19:49:24 +00:00
Chad Rosier 042ac2c17f [AArch64] Minor refactoring to simplify future patch. NFC.
llvm-svn: 269329
2016-05-12 19:38:18 +00:00
Krzysztof Parzyszek 4afed5521d [Hexagon] Expand VSelect pseudo instructions
llvm-svn: 269328
2016-05-12 19:16:02 +00:00
Vedant Kumar 32a122758f [unittests] Use coveragemap_error in CoverageMappingReaderMock (NFC)
llvm-svn: 269324
2016-05-12 19:01:11 +00:00
Davide Italiano 851f879f32 [PM] Make LowerAtomic a FunctionPass.
Differential Revision: http://reviews.llvm.org/D20025

llvm-svn: 269322
2016-05-12 18:49:32 +00:00
Michael Kuperstein 82e7df5a58 [LoopVectorizer] LoopVectorBody doesn't need to be a vector. NFC.
LoopVectorBody was changed from a single pointer to a SmallVector when
store predication was introduced in r200270. Since r247139, store predication
no longer splits the vector loop body in-place, so we can go back to having
a single LoopVectorBody block.

This reverts the no-longer-needed changes from r200270.

llvm-svn: 269321
2016-05-12 18:44:51 +00:00
Chris Bieneman fc8892771e [yaml2macho] Handle mach_header_64 reserved field
I've added the reserved field as an "optional" in YAML, but I've added asserts in the yaml2macho code to enforce that the field is present in mach_header_64, but not in mach_header.

llvm-svn: 269320
2016-05-12 18:21:09 +00:00
Chris Bieneman 26e6cea906 [yaml2macho] Use memset instead of bzero
This should fix the bots I broke.

llvm-svn: 269319
2016-05-12 18:02:13 +00:00
Chris Bieneman 668beb2cd6 [ObjectYAML] filetype is a required field in MachO headers
Not sure how I managed to copy-pasta this wrong, but I did.

llvm-svn: 269317
2016-05-12 17:53:01 +00:00
Zachary Turner 123a52735d Get rid of CVLeafTypes.def and combine with TypeRecords.def
This merges the functionality of the macros in `CVLeafTypes.def` and the
macros in `TypeRecords.def` into a single set of macros.

Differential Revision: http://reviews.llvm.org/D20190
Reviewed By: rnk, amccarth

llvm-svn: 269316
2016-05-12 17:45:51 +00:00
Zachary Turner 38cc8b3f21 Make CodeView record serialization more generic.
This introduces a variadic template and some helper macros to
safely and correctly deserialize many types of common record
fields while maintaining error checking.

Differential Revision: http://reviews.llvm.org/D20183
Reviewed By: rnk, amccarth

llvm-svn: 269315
2016-05-12 17:45:44 +00:00
Chris Bieneman a23b26f466 [yaml2obj] Support for dumping mach_header from yaml
With this change obj2yaml and yaml2obj can now round-trip mach_headers.

This change also adds ObjectYAML/MachO tests.

llvm-svn: 269314
2016-05-12 17:44:48 +00:00
Chris Bieneman 24f07478b0 [obj2yaml] Include all mach_header fields in yaml
Since we want to be able to use yaml to describe degenerate object files as well as valid ones, we need to be explicit of some fields in your yaml definitions.

llvm-svn: 269313
2016-05-12 17:44:43 +00:00
Krzysztof Parzyszek e60e5fee0a [Hexagon] Properly handle instruction selection of vsplat intrinsics
llvm-svn: 269312
2016-05-12 17:21:40 +00:00
Xinliang David Li b61f01d0a5 minor test clean up /NFC
llvm-svn: 269308
2016-05-12 16:41:27 +00:00
Xinliang David Li b840bb8714 Fix option description /NFC
llvm-svn: 269307
2016-05-12 16:39:02 +00:00
Chris Bieneman c28531295d [macho2yaml] Add support for dumping mach_headers
This patch adds the ability to dump mach headers. For my local clang binary the macho2yaml output is now:

--- !mach-o
FileHeader:
  cputype:         0x01000007
  cpusubtype:      0x80000003
  filetype:        0x00000002
  ncmds:           19
  flags:           0x00A18085
...

llvm-svn: 269304
2016-05-12 16:04:20 +00:00
Chris Bieneman 9062ab943f [ObjectYAML] Support Thin MachO headers to YAML
This patch adds support to ObjectYAML for serializing mach_header structs.

llvm-svn: 269303
2016-05-12 16:04:16 +00:00
Daniel Sanders 241c67989b [mips][ias] Fix O32 .cprestore directive when inside .set noat region and offset is in range.
Summary:
This expands on r269179 to fix an additional case that was not covered by our
tests. The assembler temporary is not needed when the .cprestore offset fits
inside a simm16 and it is not an error to use it inside a '.set noat' in this
case.

Reviewers: emaste, seanbruno, sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D20199

llvm-svn: 269295
2016-05-12 14:01:50 +00:00
Daniel Sanders 5fb391c893 [mips][ias] Work around incorrect another microMIPS relocation evaluation exposed by r268900
As explained in r269196, microMIPS has a special case that is not correctly
implemented in LLVM. If we have a symbol 'foo' which is equivalent to
'.text+0x10'. The value of an R_MICROMIPS_LO16 relocation using 'foo' is
'foo+0x11' and not 'foo+0x10'. The in-place addend should therefore be 0x11.

This commit reverts a little more of the effect of r268900 by keeping the
symbol when the STO_MIPS_MICROMIPS flag is set for R_MIPS_GPREL32 relocations.
This fixes SingleSource/UnitTests/2003-08-11-VaListArg, and
SingleSource/UnitTests/2003-05-07-VarArgs for microMIPS.

I believe there are additional relocations that have the same issue (e.g.
R_MIPS_64, and R_MIPS_GPREL16) but for now I'm focusing on restoring our
internal buildbots back to the green state we had in r268899.

llvm-svn: 269294
2016-05-12 13:39:13 +00:00
Chad Rosier 39481ace40 [AArch64] Remove command-line option use for testing.
The EXTR combine has been in tree for over 2 years without complain, so go ahead
and remove the option.

llvm-svn: 269292
2016-05-12 13:27:24 +00:00
Simon Pilgrim 89b89650f3 [SelectionDAG] Attempt to split BITREVERSE vector legalization into BSWAP and BITREVERSE stages
For BITREVERSE, bit shifting/masking every bit in a vector element is a very lengthy procedure.

If the input vector type is a whole multiple of bytes wide then we can split this into a BSWAP shuffle stage (to reverse at the byte level) and then a BITREVERSE stage applied to each byte. Most vector capable targets can efficiently BSWAP using shuffles resulting in a considerable reduction in instructions.

With this patch targets would only need to implement a target specific vXi8 BITREVERSE implementation to efficiently reverse most legal vector types.

Differential Revision: http://reviews.llvm.org/D19978

llvm-svn: 269290
2016-05-12 13:09:49 +00:00
Hrvoje Varga cf6a78192b Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions"
This reverts commit r269176 as it caused test-suite failure.

llvm-svn: 269287
2016-05-12 12:46:06 +00:00
Rafael Espindola 2615c9e535 Refactor duplicated code. NFC.
Linkage is always followed by visibility and dll storage.

llvm-svn: 269286
2016-05-12 12:37:52 +00:00
Renato Golin f6ed8bbf46 [scan-build] fix warnings emitted on LLVM ARM code base
Fix "Logic error" warnings of the type "Called C++ object pointer is
null" reported by Clang Static Analyzer.

Patch by Apelete Seketeli.

llvm-svn: 269285
2016-05-12 12:33:33 +00:00
Daniel Sanders 415c159e09 [mips][ias] Correct ELF eflags when Octeon is the target.
Reviewers: sdardis

Subscribers: petarj, mpf, dsanders, spetrovic, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D18899

llvm-svn: 269283
2016-05-12 11:31:19 +00:00
Daniel Sanders 55d383319f [mips][ias] Handle N64 compound relocations and R_MIPS_SUB in needsRelocateWithSymbol()
Summary:
This eliminates the default case for N64 that was left out of r269047.

The change to R_MIPS_SUB is needed in this patch to make this testable since
%lo(%neg(%gp_rel(foo))) and %hi(%neg(%gp_rel(foo))) remain the only ways to get
a compound relocation from the assembler.

Reviewers: sdardis, rafael

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D20097

llvm-svn: 269280
2016-05-12 10:55:00 +00:00
Dan Gohman 33e694a807 [WebAssembly] Fast-isel support for calls, arguments, and selects.
llvm-svn: 269273
2016-05-12 04:19:09 +00:00
Hal Finkel 1fb10e846a [PowerPC] Fix a DAG replacement bug in PPCTargetLowering::DAGCombineExtBoolTrunc
While promoting nodes in PPCTargetLowering::DAGCombineExtBoolTrunc, it is
possible for one of the nodes to be replaced by another. To make sure we do not
visit the deleted nodes, and to make sure we visit the replacement nodes, use a
list of HandleSDNodes to track the to-be-promoted nodes during the promotion
process.

The same fix has been applied to the analogous code in
PPCTargetLowering::DAGCombineTruncBoolExt.

Fixes PR26985.

llvm-svn: 269272
2016-05-12 04:00:56 +00:00