Chris Lattner
7abfb81e30
new testcase
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llvm-svn: 28006
2006-04-28 04:14:29 +00:00
Evan Cheng
f0157cb0bc
Use movaps instead of movapd for spill / restore.
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llvm-svn: 28005
2006-04-28 02:23:35 +00:00
Evan Cheng
51ab4498e7
Added a temporary option -no-isel-fold-inflight to control whether a "inflight"
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node can be folded.
llvm-svn: 28003
2006-04-28 02:09:19 +00:00
Evan Cheng
54acf6eddc
When isel'ing a node, mark its operands "InFlight" before selecting them. These
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nodes should not be folded into other nodes.
This fixes the miscompilation of PR 749.
Temporarily under flag control.
llvm-svn: 28002
2006-04-28 02:08:10 +00:00
Chris Lattner
84e95d00b5
When we have a two-address instruction where the input cannot be clobbered
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and is already available, instead of falling back to emitting a load, fall
back to emitting a reg-reg copy. This generates significantly better code
for some SSE testcases, as SSE has lots of two-address instructions and
none of them are read/modify/write. As one example, this change does:
pshufd %XMM5, XMMWORD PTR [%ESP + 84], 255
xorps %XMM2, %XMM5
cmpltps %XMM1, %XMM0
- movaps XMMWORD PTR [%ESP + 52], %XMM0
- movapd %XMM6, XMMWORD PTR [%ESP + 52]
+ movaps %XMM6, %XMM0
cmpltps %XMM6, XMMWORD PTR [%ESP + 68]
movapd XMMWORD PTR [%ESP + 52], %XMM6
movaps %XMM6, %XMM0
cmpltps %XMM6, XMMWORD PTR [%ESP + 36]
cmpltps %XMM3, %XMM0
- movaps XMMWORD PTR [%ESP + 20], %XMM0
- movapd %XMM7, XMMWORD PTR [%ESP + 20]
+ movaps %XMM7, %XMM0
cmpltps %XMM7, XMMWORD PTR [%ESP + 4]
movapd XMMWORD PTR [%ESP + 20], %XMM7
cmpltps %XMM4, %XMM0
... which is far better than a store followed by a load!
llvm-svn: 28001
2006-04-28 01:46:50 +00:00
Evan Cheng
c4d77c46b8
Test case for PR748
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llvm-svn: 28000
2006-04-28 01:21:37 +00:00
Chris Lattner
a4c2c4a276
Add a note
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llvm-svn: 27999
2006-04-28 00:04:05 +00:00
Chris Lattner
b209131b56
Add a note
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llvm-svn: 27998
2006-04-27 21:40:57 +00:00
Chris Lattner
b6cb64b7e6
Add support for inserting undef into a vector. This implements
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Transforms/InstCombine/vec_insert_to_shuffle.ll
llvm-svn: 27997
2006-04-27 21:14:21 +00:00
Chris Lattner
51fecaa8b3
This should turn into one vector shuffle instruction.
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llvm-svn: 27996
2006-04-27 21:13:58 +00:00
Evan Cheng
f4f3f0d25f
Make x86 isel lowering produce tailcall nodes. They are match to normal calls
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for now.
Patch contributed by Alexander Friedman.
llvm-svn: 27994
2006-04-27 08:40:39 +00:00
Evan Cheng
ec04a37edd
A couple of new entries.
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llvm-svn: 27993
2006-04-27 08:31:33 +00:00
Evan Cheng
89001ad729
Support for passing 128-bit vector arguments via XMM registers.
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llvm-svn: 27992
2006-04-27 08:31:10 +00:00
Evan Cheng
3784f3c57c
Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses
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(VAND, VADD, etc.). Legalizer will assert otherwise.
llvm-svn: 27991
2006-04-27 08:29:42 +00:00
Reid Spencer
bb0be98fed
For PR747:
...
If we fail to find a required program, simply set that program to echo
out something that tells the user the situation. That is, instead of just
"true runtest" we now get "echo 'Skipped: runtest not found'".
llvm-svn: 27990
2006-04-27 07:49:24 +00:00
Evan Cheng
a0374e1bed
Oops
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llvm-svn: 27989
2006-04-27 05:44:50 +00:00
Evan Cheng
24eb3f4765
Bug fix: not updating NumIntRegs.
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llvm-svn: 27988
2006-04-27 05:35:28 +00:00
Chris Lattner
393d96a56c
Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and
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PR748.
llvm-svn: 27987
2006-04-27 05:01:07 +00:00
Chris Lattner
fb1ab10337
new testcase
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llvm-svn: 27986
2006-04-27 05:00:43 +00:00
Evan Cheng
48940d16b2
- Clean up formal argument lowering code. Prepare for vector pass by value work.
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- Fixed vararg support.
llvm-svn: 27985
2006-04-27 01:32:22 +00:00
Chris Lattner
f98b4aa2e7
Fix some nondeterminstic behavior in the mem2reg pass that (in addition to
...
nondeterminism being bad) could cause some trivial missed optimizations (dead
phi nodes being left around for later passes to clean up).
With this, llvm-gcc4 now bootstraps and correctly compares. I don't know
why I never tried to do it before... :)
llvm-svn: 27984
2006-04-27 01:14:43 +00:00
Jeff Cohen
027fbc2a6a
Actually, semantical doesn't appear to be a word.
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llvm-svn: 27983
2006-04-26 21:03:17 +00:00
Chris Lattner
e8cbdbf314
Implement Transforms/IndVarsSimplify/complex-scev.ll, a case where we didn't
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recognize some simple affine IV's.
llvm-svn: 27982
2006-04-26 18:34:07 +00:00
Chris Lattner
684a8546f4
new testcase
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llvm-svn: 27981
2006-04-26 18:32:59 +00:00
Evan Cheng
1c39903297
Fix fastcc failures.
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llvm-svn: 27980
2006-04-26 18:21:31 +00:00
Chris Lattner
6b764e7625
Unfortunately this really isn't the place for advertisement.
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llvm-svn: 27979
2006-04-26 18:10:59 +00:00
Jeff Cohen
e42f3ba44c
Fix typo.
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llvm-svn: 27978
2006-04-26 18:05:25 +00:00
Reid Spencer
4d3171fc41
Fix some anchors.
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llvm-svn: 27977
2006-04-26 15:46:53 +00:00
Reid Spencer
9aa244ed16
Add some notes about the current state of source (front end) languages
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so we can point to them on llvm-dev.
llvm-svn: 27976
2006-04-26 14:52:19 +00:00
Evan Cheng
e0bcfbe811
Switching over FORMAL_ARGUMENTS mechanism to lower call arguments.
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llvm-svn: 27975
2006-04-26 01:20:17 +00:00
Evan Cheng
9618df1190
Don't forget return void.
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llvm-svn: 27974
2006-04-25 23:03:35 +00:00
Nate Begeman
4530327c04
Keep the stack from on darwin 16-byte aligned. This fixes many JIT
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failres.
llvm-svn: 27973
2006-04-25 20:54:26 +00:00
Evan Cheng
a9467aab0a
Separate LowerOperation() into multiple functions, one per opcode.
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llvm-svn: 27972
2006-04-25 20:13:52 +00:00
Andrew Lenharth
3c775bcd86
slightly more useful error message
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llvm-svn: 27971
2006-04-25 19:33:41 +00:00
Andrew Lenharth
f5a713d273
better c99 struct handling
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llvm-svn: 27970
2006-04-25 19:33:23 +00:00
Andrew Lenharth
a3f7583408
another c99 style problem
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llvm-svn: 27969
2006-04-25 19:27:56 +00:00
Evan Cheng
4cc3e0b05f
Fix a typo.
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llvm-svn: 27968
2006-04-25 17:48:41 +00:00
Nate Begeman
48ccd3f826
Fix a warning
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llvm-svn: 27967
2006-04-25 17:46:32 +00:00
Nate Begeman
318bb96f9e
No functionality changes, but cleaner code with correct comments.
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llvm-svn: 27966
2006-04-25 04:45:59 +00:00
Evan Cheng
fb46b2bf5d
Explicitly specify result type for def : Pat<> patterns (if it produces a vector
...
result). Otherwise tblgen will pick the default (v16i8 for 128-bit vector).
llvm-svn: 27965
2006-04-25 00:50:01 +00:00
Evan Cheng
25b09295f8
Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is
...
a temporary workaround for the 2-wide vector_shuffle problem (i.e. its mask
would have type v2i32 which is not legal).
llvm-svn: 27964
2006-04-24 23:34:56 +00:00
Evan Cheng
d03631ee76
Add a new entry.
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llvm-svn: 27963
2006-04-24 23:30:10 +00:00
Evan Cheng
347a5a7afa
Added a movq test case.
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llvm-svn: 27962
2006-04-24 23:03:22 +00:00
Evan Cheng
5c2bfb069e
Special case handling two wide build_vector(0, x).
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llvm-svn: 27961
2006-04-24 22:58:52 +00:00
Evan Cheng
63bd4d3730
Some missing movlps, movhps, movlpd, and movhpd patterns.
...
llvm-svn: 27960
2006-04-24 21:58:20 +00:00
Evan Cheng
b0461080e4
A little bit more build_vector enhancement for v8i16 cases.
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llvm-svn: 27959
2006-04-24 18:01:45 +00:00
Evan Cheng
2f9b0bcbd5
Remove a completed entry.
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llvm-svn: 27958
2006-04-24 17:38:16 +00:00
Chris Lattner
3046d54df2
Suggest looking at the SPARC backend. How weird is that?? :)
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llvm-svn: 27957
2006-04-24 16:34:45 +00:00
Evan Cheng
60bb622e4d
Added addJumpTableIndex
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llvm-svn: 27956
2006-04-24 06:42:15 +00:00
Evan Cheng
ab0ee6340c
MakeMIInst() should handle jump table index operands.
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llvm-svn: 27955
2006-04-24 05:37:35 +00:00