8 Commits

Author	SHA1	Message	Date
Duraid Madina	41ff502549	fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn) ... fix hack in division (clean up frcpa instruction) llvm-svn: 21153	2005-04-08 10:01:48 +00:00
Duraid Madina	b484f7c55e	add immediate forms of add, sub, shift ... llvm-svn: 21129	2005-04-07 12:32:24 +00:00
Duraid Madina	03c530786c	add fms instruction ... llvm-svn: 21112	2005-04-06 09:54:09 +00:00
Duraid Madina	dbc810022b	add implicit use op ... llvm-svn: 21074	2005-04-04 04:50:57 +00:00
Duraid Madina	0ccac38ed3	add fnegabs op ... llvm-svn: 21022	2005-04-02 10:06:27 +00:00
Duraid Madina	0720dc14ed	add support FNEG and FABS ... llvm-svn: 21012	2005-04-02 05:18:38 +00:00
Duraid Madina	73c2777a0e	add what we need to fudge a 'floating point conditional move', this is ... used to get FP div-by-zero working properly (shunt the right answer depending on how frcpa sets its predicate output) llvm-svn: 20954	2005-03-31 07:32:32 +00:00
Duraid Madina	91ed0a11cf	and so it begins... ... PHASE 1: write instruction selector PHASE 2: ??? PHASE 3: profit! llvm-svn: 20652	2005-03-17 18:17:03 +00:00