llvm-project

Commit Graph

Author	SHA1	Message	Date
Stefan Pintilie	cb4f0c5c07	[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler We want to run the Machine Scheduler instead of the List Scheduler after RA. Checked with a performance run on a Power 9 machine with SPEC 2006 and while some benchmarks improved and others degraded the geomean was slightly improved with the Machine Scheduler. Differential Revision: https://reviews.llvm.org/D45265 llvm-svn: 336295	2018-07-04 18:54:25 +00:00
Nemanja Ivanovic	b0783cccb7	[PowerPC] Follow-up to r318436 to get the missed CSE opportunities The last of the three patches that https://reviews.llvm.org/D40348 was broken up into. Canonicalize the materialization of constants so that they are more likely to be CSE'd regardless of the bit-width of the use. If a constant can be materialized using PPC::LI, materialize it the same way always. For example: li 4, -1 li 4, 255 li 4, 65535 are equivalent if the uses only use the low byte. Canonicalize it to the first form. Differential Revision: https://reviews.llvm.org/D40348 llvm-svn: 320473	2017-12-12 12:09:34 +00:00
Guozhi Wei	433e8d3e04	[PPC] Change i32 constant in store instruction to i64 This patch changes all i32 constant in store instruction to i64 with truncation, to increase the chance that the referenced constant can be shared with other i64 constant. Differential Revision: https://reviews.llvm.org/D39352 llvm-svn: 318436	2017-11-16 18:27:34 +00:00

Author

SHA1

Message

Date

Stefan Pintilie

cb4f0c5c07

[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler

We want to run the Machine Scheduler instead of the List Scheduler after RA.
  Checked with a performance run on a Power 9 machine with SPEC 2006 and while
  some benchmarks improved and others degraded the geomean was slightly improved
  with the Machine Scheduler.

  Differential Revision: https://reviews.llvm.org/D45265

llvm-svn: 336295

2018-07-04 18:54:25 +00:00

Nemanja Ivanovic

b0783cccb7

[PowerPC] Follow-up to r318436 to get the missed CSE opportunities

The last of the three patches that https://reviews.llvm.org/D40348 was
broken up into.
Canonicalize the materialization of constants so that they are more likely
to be CSE'd regardless of the bit-width of the use. If a constant can be
materialized using PPC::LI, materialize it the same way always.
For example:
  li 4, -1
  li 4, 255
  li 4, 65535
are equivalent if the uses only use the low byte. Canonicalize it to the
first form.

Differential Revision: https://reviews.llvm.org/D40348

llvm-svn: 320473

2017-12-12 12:09:34 +00:00

Guozhi Wei

433e8d3e04

[PPC] Change i32 constant in store instruction to i64

This patch changes all i32 constant in store instruction to i64 with truncation, to increase the chance that the referenced constant can be shared with other i64 constant.

Differential Revision: https://reviews.llvm.org/D39352

llvm-svn: 318436

2017-11-16 18:27:34 +00:00

3 Commits