Commit Graph

646 Commits

Author SHA1 Message Date
Evan Cheng 2bb4035707 Move TargetRegistry and TargetSelect from Target to Support where they belong.
These are strictly utilities for registering targets and components.

llvm-svn: 138450
2011-08-24 18:08:43 +00:00
Evan Cheng 4d6c9d711d Some refactoring so TargetRegistry.h no longer has to include any files
from MC.

llvm-svn: 138367
2011-08-23 20:15:21 +00:00
Chandler Carruth c099a6f9ce Actually finish switching to the new system for Target sublibrary
TableGen deps introduced in r136023. This completes the fixing that
dgregor started in r136621. Sorry for missing these the first time
around.

This should fix some of the random race-condition failures people are
still seeing with CMake.

llvm-svn: 136643
2011-08-01 19:55:11 +00:00
Chandler Carruth 9d7feab3e0 Rewrite the CMake build to use explicit dependencies between libraries,
specified in the same file that the library itself is created. This is
more idiomatic for CMake builds, and also allows us to correctly specify
dependencies that are missed due to bugs in the GenLibDeps perl script,
or change from compiler to compiler. On Linux, this returns CMake to
a place where it can relably rebuild several targets of LLVM.

I have tried not to change the dependencies from the ones in the current
auto-generated file. The only places I've really diverged are in places
where I was seeing link failures, and added a dependency. The goal of
this patch is not to start changing the dependencies, merely to move
them into the correct location, and an explicit form that we can control
and change when necessary.

This also removes a serialization point in the build because we don't
have to scan all the libraries before we begin building various tools.
We no longer have a step of the build that regenerates a file inside the
source tree. A few other associated cleanups fall out of this.

This isn't really finished yet though. After talking to dgregor he urged
switching to a single CMake macro to construct libraries with both
sources and dependencies in the arguments. Migrating from the two macros
to that style will be a follow-up patch.

Also, llvm-config is still generated with GenLibDeps.pl, which means it
still has slightly buggy dependencies. The internal CMake
'llvm-config-like' macro uses the correct explicitly specified
dependencies however. A future patch will switch llvm-config generation
(when using CMake) to be based on these deps as well.

This may well break Windows. I'm getting a machine set up now to dig
into any failures there. If anyone can chime in with problems they see
or ideas of how to solve them for Windows, much appreciated.

llvm-svn: 136433
2011-07-29 00:14:25 +00:00
Chandler Carruth 97c069c1d2 Clean up a pile of hacks in our CMake build relating to TableGen.
The first problem to fix is to stop creating synthetic *Table_gen
targets next to all of the LLVM libraries. These had no real effect as
CMake specifies that add_custom_command(OUTPUT ...) directives (what the
'tablegen(...)' stuff expands to) are implicitly added as dependencies
to all the rules in that CMakeLists.txt.

These synthetic rules started to cause problems as we started more and
more heavily using tablegen files from *subdirectories* of the one where
they were generated. Within those directories, the set of tablegen
outputs was still available and so these synthetic rules added them as
dependencies of those subdirectories. However, they were no longer
properly associated with the custom command to generate them. Most of
the time this "just worked" because something would get to the parent
directory first, and run tablegen there. Once run, the files existed and
the build proceeded happily. However, as more and more subdirectories
have started using this, the probability of this failing to happen has
increased. Recently with the MC refactorings, it became quite common for
me when touching a large enough number of targets.

To add insult to injury, several of the backends *tried* to fix this by
adding explicit dependencies back to the parent directory's tablegen
rules, but those dependencies didn't work as expected -- they weren't
forming a linear chain, they were adding another thread in the race.

This patch removes these synthetic rules completely, and adds a much
simpler function to declare explicitly that a collection of tablegen'ed
files are referenced by other libraries. From that, we can add explicit
dependencies from the smaller libraries (such as every architectures
Desc library) on this and correctly form a linear sequence. All of the
backends are updated to use it, sometimes replacing the existing attempt
at adding a dependency, sometimes adding a previously missing dependency
edge.

Please let me know if this causes any problems, but it fixes a rather
persistent and problematic source of build flakiness on our end.

llvm-svn: 136023
2011-07-26 00:09:08 +00:00
Evan Cheng 6376593ed1 createXXXMCCodeGenInfo should be static.
llvm-svn: 135826
2011-07-23 00:01:04 +00:00
Evan Cheng 8c886a40d2 Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.

llvm-svn: 135812
2011-07-22 21:58:54 +00:00
Evan Cheng efd9b4240f - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
- Introduce JITDefault code model. This tells targets to set different default
  code model for JIT. This eliminates the ugly hack in TargetMachine where
  code model is changed after construction.

llvm-svn: 135580
2011-07-20 07:51:56 +00:00
Evan Cheng 2129f59637 Introduce MCCodeGenInfo, which keeps information that can affect codegen
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.

llvm-svn: 135468
2011-07-19 06:37:02 +00:00
Evan Cheng d60fa58ba1 Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.

llvm-svn: 135424
2011-07-18 20:57:22 +00:00
Evan Cheng a83b37a9db Move some parts of TargetAsmInfo down to MCAsmInfo. This is not the greatest
solution but it is a small step towards removing the horror that is
TargetAsmInfo.

llvm-svn: 135237
2011-07-15 02:09:41 +00:00
Chandler Carruth 9a0001aedb Major update to CMake build to reflect changes in r135219 in the
backend. Moved some MCAsmInfo files down into the MCTargetDesc
sublibraries, removed some (i suspect long) dead files from other parts
of the CMake build, etc. Also copied the include directory hack from the
Makefile.

Finally, updated the lib deps. I spot checked this, and think its
correct, but review appreciated there.

llvm-svn: 135234
2011-07-15 00:40:52 +00:00
Evan Cheng 1705ab00ab Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes.
llvm-svn: 135219
2011-07-14 23:50:31 +00:00
Evan Cheng bc153d49b7 Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.

llvm-svn: 135184
2011-07-14 20:59:42 +00:00
Evan Cheng c5e6d2f519 - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
  detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
  MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
  MCSubtargetInfo so MC code emitter can do the right thing.

llvm-svn: 134884
2011-07-11 03:57:24 +00:00
Evan Cheng 91111d2706 Change createAsmParser to take a MCSubtargetInfo instead of triple,
CPU, and feature string. Parsing some asm directives can change
subtarget state (e.g. .code 16) and it must be reflected in other
modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance
must be shared.

llvm-svn: 134795
2011-07-09 05:47:46 +00:00
Cameron Zwarich f03fa189ca Add an intrinsic and codegen support for fused multiply-accumulate. The intent
is to use this for architectures that have a native FMA instruction.

llvm-svn: 134742
2011-07-08 21:39:21 +00:00
Evan Cheng 4d1ca96bfc Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
  to generate asm matcher subtarget feature queries. e.g.
  "ModeThumb,FeatureThumb2" is translated to
  "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".

llvm-svn: 134678
2011-07-08 01:53:10 +00:00
Evan Cheng 1a72add615 Compute feature bits at time of MCSubtargetInfo initialization.
llvm-svn: 134606
2011-07-07 07:07:08 +00:00
Evan Cheng c9c090d7a5 Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.
llvm-svn: 134281
2011-07-01 22:36:09 +00:00
Evan Cheng 0d639a28aa Rename TargetSubtarget to TargetSubtargetInfo for consistency.
llvm-svn: 134259
2011-07-01 21:01:15 +00:00
Evan Cheng 54b68e3432 - Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.

llvm-svn: 134257
2011-07-01 20:45:01 +00:00
Evan Cheng 703a0fbf39 Hide the call to InitMCInstrInfo into tblgen generated ctor.
llvm-svn: 134244
2011-07-01 17:57:27 +00:00
Evan Cheng fe6e405e8c Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!

llvm-svn: 134127
2011-06-30 01:53:36 +00:00
Evan Cheng 194c3dc01f Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
llvm-svn: 134030
2011-06-28 21:14:33 +00:00
Evan Cheng 0beca53a29 Hide more details in tablegen generated MCRegisterInfo ctor function.
llvm-svn: 134027
2011-06-28 20:44:22 +00:00
Evan Cheng 1e210d08d8 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
llvm-svn: 134024
2011-06-28 20:07:07 +00:00
Evan Cheng 6cc775f905 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
2011-06-28 19:10:37 +00:00
Evan Cheng d9997acd14 Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc
into XXXGenRegisterInfo.inc.

llvm-svn: 133922
2011-06-27 18:32:37 +00:00
Evan Cheng 247533179a Starting to refactor Target to separate out code that's needed to fully describe
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.

llvm-svn: 133782
2011-06-24 01:44:41 +00:00
Jakob Stoklund Olesen 3982029f60 Allocate SystemZ callee-saved registers backwards: R13-R6
The reserved R14-R15 are always saved in the prolog, and using CSRs
starting from R13 allows them to be saved in one instruction.

Thanks to Anton for explaining this.

llvm-svn: 133233
2011-06-17 03:47:30 +00:00
Jakob Stoklund Olesen 99f35eab45 Use set operations instead of plain lists to enumerate register classes.
This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.

I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.

llvm-svn: 133105
2011-06-15 23:28:14 +00:00
Jakob Stoklund Olesen 5977109f14 Remove custom allocation orders in SystemZ.
Note that this actually changes code generation, and someone who
understands this target better should check the changes.

- R12Q is now allocatable. I think it was omitted from the allocation
  order by mistake since it isn't reserved. It as apparently used as a
  GOT pointer sometimes, and it should probably be reserved if that is
  the case.

- The GR64 registers are allocated in a different order now. The
  register allocator will automatically put the CSRs last. There were
  other changes to the order that may have been significant.

The test fix is because r0 and r1 swapped places in the allocation order.

llvm-svn: 133067
2011-06-15 18:02:56 +00:00
Eric Christopher 0713a9d8fc Add a parameter to CCState so that it can access the MachineFunction.
No functional change.

Part of PR6965

llvm-svn: 132763
2011-06-08 23:55:35 +00:00
Rafael Espindola 08600bcf65 Use the dwarf->llvm mapping to print register names in the cfi
directives.

Fixes PR9826.

llvm-svn: 132317
2011-05-30 20:20:15 +00:00
Rafael Espindola 595fd7a058 Remove the DwarfNumbers from the subregisters. They should use DW_OP_bit_piece
and for now the generic dwarf emission will automatically use the superregister
numbers.

llvm-svn: 132312
2011-05-30 15:56:04 +00:00
Eli Friedman 2518f8376d Make the logic for determining function alignment more explicit. No functionality change.
llvm-svn: 131012
2011-05-06 20:34:06 +00:00
Jakob Stoklund Olesen 093a94cdae Implement SystemZRegisterInfo::getMatchingSuperRegClass to enable cross-class joins.
llvm-svn: 130857
2011-05-04 19:02:04 +00:00
Chris Lattner 0ab5e2cded Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!

llvm-svn: 129558
2011-04-15 05:18:47 +00:00
Owen Anderson b2c80da4ae Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
llvm-svn: 126518
2011-02-25 21:41:48 +00:00
Oscar Fuentes ba1186c23e Use explicit add_subdirectory's for LLVM target sublibraries instead
of testing for its presence at cmake time.

This way the build automatically regenerates the makefiles when a svn
update brings in a new sublibrary.

llvm-svn: 126068
2011-02-20 02:55:27 +00:00
Anton Korobeynikov 1f3bc9b5e6 Fix imm printing for logical instructions.
Patch by Brian G. Lucas!

llvm-svn: 124679
2011-02-01 20:22:53 +00:00
Rafael Espindola aea4958ea6 Remove duplicated code.
llvm-svn: 124054
2011-01-23 04:28:49 +00:00
Jakob Stoklund Olesen 4bc5e38960 Teach frame lowering to ignore debug values after the terminators.
llvm-svn: 123399
2011-01-13 21:28:52 +00:00
Anton Korobeynikov 441ae5b88c Update CMake stuff
llvm-svn: 123171
2011-01-10 12:39:23 +00:00
Anton Korobeynikov 2f93128109 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
llvm-svn: 123170
2011-01-10 12:39:04 +00:00
Chris Lattner 2a0a3b43d7 Flag -> Glue, the ongoing saga
llvm-svn: 122513
2010-12-23 18:28:41 +00:00
Chris Lattner 3e5fbd74ed rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.

llvm-svn: 122310
2010-12-21 02:38:05 +00:00
Anton Korobeynikov 7283b8d18c Move more PEI-related hooks to TFI
llvm-svn: 120229
2010-11-27 23:05:25 +00:00
Anton Korobeynikov d08fbd19f5 Move callee-saved regs spills / reloads to TFI
llvm-svn: 120228
2010-11-27 23:05:03 +00:00
Wesley Peck 527da1b6e2 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
llvm-svn: 119990
2010-11-23 03:31:01 +00:00
Anton Korobeynikov 4687778398 Move some more hooks to TargetFrameInfo
llvm-svn: 119904
2010-11-20 15:59:32 +00:00
Anton Korobeynikov 0eecf5d201 Move hasFP() and few related hooks to TargetFrameInfo.
llvm-svn: 119740
2010-11-18 21:19:35 +00:00
Anton Korobeynikov 51d2e9ca29 Attempt to unbreak cmake-based builds
llvm-svn: 119098
2010-11-15 00:48:12 +00:00
Anton Korobeynikov f7183edb59 First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
llvm-svn: 119097
2010-11-15 00:06:54 +00:00
Chris Lattner 66031ed839 move all the target's asmprinters into the main target. The piece
that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.

llvm-svn: 119056
2010-11-14 18:43:56 +00:00
Rafael Espindola 19fa38000a Remove some explicit arguments to getELFSection. This is
a leftover from the removal of isExplicit.

llvm-svn: 118774
2010-11-11 03:40:25 +00:00
Oscar Fuentes b4b12535e8 Removed a bunch of unnecessary target_link_libraries.
llvm-svn: 114999
2010-09-28 22:39:14 +00:00
Chris Lattner 0e023ea02a fix a long standing wart: all the ComplexPattern's were being
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel 
like detangling).   Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.

llvm-svn: 114471
2010-09-21 20:31:19 +00:00
Chris Lattner 676c61db0e update a bunch of code to use the MachinePointerInfo version of getStore.
llvm-svn: 114461
2010-09-21 18:41:36 +00:00
Chris Lattner 7727d05dbb convert the targets off the non-MachinePointerInfo of getLoad.
llvm-svn: 114410
2010-09-21 06:44:06 +00:00
Chris Lattner e3d864b857 convert targets to the new MF.getMachineMemOperand interface.
llvm-svn: 114391
2010-09-21 04:39:43 +00:00
Chris Lattner 65b48b5dfc zap dead code.
llvm-svn: 113073
2010-09-04 18:12:00 +00:00
Jim Grosbach 6a77066913 Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
to try to re-use scavenged frame index reference registers. rdar://8277890

llvm-svn: 112241
2010-08-26 23:32:16 +00:00
Eric Christopher 4adaccf0bf Constify some arguments.
llvm-svn: 108812
2010-07-20 06:52:21 +00:00
Jakob Stoklund Olesen 8289f78569 Remove the isMoveInstr() hook.
llvm-svn: 108567
2010-07-16 22:35:46 +00:00
Benjamin Kramer 92d8998348 Don't pass StringRef by reference.
llvm-svn: 108366
2010-07-14 22:38:02 +00:00
Jakob Stoklund Olesen 7c1392a765 Remove redundant branch. Thanks, Anton!
llvm-svn: 108097
2010-07-11 17:17:35 +00:00
Jakob Stoklund Olesen 74e5bf85f7 Replace copyRegToReg with copyPhysReg for SystemZ.
llvm-svn: 108092
2010-07-11 16:40:46 +00:00
Dan Gohman fe7532a308 Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.

llvm-svn: 107786
2010-07-07 15:54:55 +00:00
Devang Patel a3ca21b228 Propagate debug loc.
llvm-svn: 107710
2010-07-06 22:08:15 +00:00
Dan Gohman 3439629239 Reapply r107655 with fixes; insert the pseudo instruction into
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.

llvm-svn: 107691
2010-07-06 20:24:04 +00:00
Dan Gohman f4f04107ef Revert r107655.
llvm-svn: 107668
2010-07-06 15:49:48 +00:00
Dan Gohman 12205645a6 Fix a bunch of custom-inserter functions to handle the case where
the pseudo instruction is not at the end of the block.

llvm-svn: 107655
2010-07-06 15:18:19 +00:00
Evan Cheng 0664a67fe1 Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
llvm-svn: 107550
2010-07-03 00:40:23 +00:00
Eric Christopher 6dd51a2bb6 Remove isTwoAddress from SystemZ.
llvm-svn: 106467
2010-06-21 20:25:57 +00:00
Stuart Hastings 0125b6410a Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.

This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.

llvm-svn: 106243
2010-06-17 22:43:56 +00:00
Rafael Espindola f2dffcef82 Remove the TargetRegisterClass member from CalleeSavedInfo
llvm-svn: 105344
2010-06-02 20:02:30 +00:00
Rafael Espindola ef2b6ce00a cleanup
llvm-svn: 105322
2010-06-02 13:53:17 +00:00
Jakob Stoklund Olesen e02996ca8f Merge the SystemZ subreg_even32 SubRegIndex into subreg_32bit. The SubRegIndices
were overspecified when inheriting sub-subregisters, for instance:

R0Q:subreg_even32 = R0Q:subreg_32bit = R0Q:subreg_even:subreg_32bit.

This meant that composeSubRegIndices(subreg_even, subreg_32bit) was ambiguous.

llvm-svn: 105063
2010-05-28 23:48:29 +00:00
Jakob Stoklund Olesen 7de379467e Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

llvm-svn: 104704
2010-05-26 17:27:12 +00:00
Jakob Stoklund Olesen 50eec620f4 Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."
This reverts commit 104654.

llvm-svn: 104660
2010-05-26 01:21:14 +00:00
Jakob Stoklund Olesen 0b0274524c Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

llvm-svn: 104654
2010-05-26 00:28:19 +00:00
Jakob Stoklund Olesen 673e7e0f37 Remove NumberHack entirely.
SubRegIndex instances are now numbered uniquely the same way Register instances
are - in lexicographical order by name.

llvm-svn: 104627
2010-05-25 19:49:33 +00:00
Jakob Stoklund Olesen 36caaf1c59 Use enums instead of literals for SystemZ subregisters
llvm-svn: 104612
2010-05-25 17:04:18 +00:00
Jakob Stoklund Olesen fdb25de17e Switch SubRegSet to using symbolic SubRegIndices
llvm-svn: 104571
2010-05-24 23:03:18 +00:00
Jakob Stoklund Olesen edab242488 Replace the tablegen RegisterClass field SubRegClassList with an alist-like data
structure that represents a mapping without any dependencies on SubRegIndex
numbering.

This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.

llvm-svn: 104563
2010-05-24 21:46:58 +00:00
Jakob Stoklund Olesen 8a57aeca2a Use SubRegIndex in SystemZ.
Anton, please review the change to SystemZAsmPrinter.cpp. It could be a bug.

llvm-svn: 104515
2010-05-24 17:43:01 +00:00
Evan Cheng 168ced94d8 Implement @llvm.returnaddress. rdar://8015977.
llvm-svn: 104421
2010-05-22 01:47:14 +00:00
Evan Cheng 738e920edf Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
llvm-svn: 104147
2010-05-19 20:19:50 +00:00
Bill Wendling 0160e55893 SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and
replace the check with the appropriate predicate. Modify the testcase to reflect
the correct code. (It should be saving callee-saved registers on the stack
allocated by the calling fuction.)

llvm-svn: 103829
2010-05-14 22:17:42 +00:00
Bill Wendling 95f6ebcb37 Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.

llvm-svn: 103802
2010-05-14 21:14:32 +00:00
Dan Gohman bb919dfb6b Implement a bunch more TargetSelectionDAGInfo infrastructure.
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.

llvm-svn: 103481
2010-05-11 17:31:57 +00:00
Dan Gohman 779c69bbc5 Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.

llvm-svn: 103194
2010-05-06 20:33:48 +00:00
Evan Cheng efb126a665 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
llvm-svn: 103193
2010-05-06 19:06:44 +00:00
Dan Gohman 25c1653700 Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.

llvm-svn: 102809
2010-05-01 00:01:06 +00:00
Evan Cheng 4158a0ff6b Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181

llvm-svn: 101984
2010-04-21 03:18:23 +00:00
Dan Gohman 21cea8ac2e Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.

llvm-svn: 101635
2010-04-17 15:26:15 +00:00
Dan Gohman 9becdddc49 Add skeleton target-specific SelectionDAGInfo files.
llvm-svn: 101564
2010-04-16 23:04:22 +00:00
Dan Gohman bcaf681cde Add const qualifiers to CodeGen's use of LLVM IR constructs.
llvm-svn: 101334
2010-04-15 01:51:59 +00:00
Chris Lattner 5418dd5fda move elf section uniquing to MCContext. Along the way
merge XCore's section into MCSectionELF

llvm-svn: 100812
2010-04-08 21:26:26 +00:00
Chris Lattner 2104b8d36e rename llvm::llvm_report_error -> llvm::report_fatal_error
llvm-svn: 100709
2010-04-07 22:58:41 +00:00
John McCall 796583eec0 Fix a number of clang -Wsign-compare warnings that didn't have an obvious
solution.  The only reason these don't fire with gcc-4.2 is that gcc turns off
part of -Wsign-compare in C++ on accident.

llvm-svn: 100581
2010-04-06 23:35:53 +00:00
Chris Lattner a49ac8ace0 prune some #includes.
llvm-svn: 100399
2010-04-05 04:04:10 +00:00
Chris Lattner 8b30492da3 simplify various getAnalysisUsage implementations.
llvm-svn: 100376
2010-04-05 00:38:44 +00:00
Chris Lattner 21dc46e256 remove TargetMachine.h #include, also, TRI isn't used frequently
enough to warrant caching in AsmPrinter, so remove it.

llvm-svn: 100336
2010-04-04 18:06:11 +00:00
Chris Lattner d20699bc87 Momentous day: remove the "O" member from AsmPrinter. Now all
"asm printering" happens through MCStreamer.  This also 
Streamerizes PIC16 debug info, which escaped my attention.

This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.

llvm-svn: 100327
2010-04-04 08:18:47 +00:00
Chris Lattner 3d86cd6710 convert the non-MCInstPrinter'ized EmitInstruction
implementations to use EmitRawText instead of writing
directly to "O".

llvm-svn: 100318
2010-04-04 06:12:20 +00:00
Chris Lattner 76c564b1bb change a ton of code to not implicitly use the "O" raw_ostream
member of AsmPrinter.  Instead, pass it in explicitly.

llvm-svn: 100306
2010-04-04 04:47:45 +00:00
Chris Lattner f33c7fcc28 asmstreamerize the .size directive for function bodies, force clients
of printOffset to pass in a stream to print to.

llvm-svn: 100296
2010-04-03 22:28:33 +00:00
Chris Lattner 6f306d7d30 use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
llvm-svn: 100214
2010-04-02 20:16:16 +00:00
Dale Johannesen 4244d12769 Teach AnalyzeBranch, RemoveBranch and the branch
folder to be tolerant of debug info following the
branch(es) at the end of a block.

llvm-svn: 100168
2010-04-02 01:38:09 +00:00
Chris Lattner a520b166dc Improve systemz to model cmp and ucmp nodes as returning
their flags correctly.

llvm-svn: 99738
2010-03-28 05:21:52 +00:00
Chris Lattner 0433699ef0 set SDNPVariadic on nodes throughout the rest of the targets that
need them.

llvm-svn: 98937
2010-03-19 05:33:51 +00:00
Chris Lattner 29bdac4928 eliminate the now-unneeded context argument of MBB::getSymbol()
llvm-svn: 98451
2010-03-13 21:04:28 +00:00
Chris Lattner e468f88b26 rearrange MCContext ownership. Before LLVMTargetMachine created it
and passing off ownership to AsmPrinter.  Now MachineModuleInfo
creates it and owns it by value.  This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code.  This also allows MachineFunction to 
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.

llvm-svn: 98450
2010-03-13 20:55:24 +00:00
Jeffrey Yasskin 9eeda13a52 Fix LLVM build when the user specifies CPPFLAGS on the make command line.
llvm-svn: 98394
2010-03-12 21:42:14 +00:00
Chris Lattner 0b822ab447 inline GetGlobalValueSymbol into the rest its callers and
remove it.

llvm-svn: 98390
2010-03-12 21:19:23 +00:00
Jim Grosbach fae913adf8 Change the Value argument to eliminateFrameIndex to a type-tagged value. This
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).

No functionality change.

llvm-svn: 98086
2010-03-09 21:45:49 +00:00
Chris Lattner 6742f1f338 fix a type compatibility bug. imm is i32 in the input
pattern, not i64.

llvm-svn: 97956
2010-03-08 18:52:55 +00:00
Chris Lattner f98f124a73 Sink InstructionSelect() out of each target into SDISel, and rename it
DoInstructionSelection.  Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.

Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.

 17 files changed, 114 insertions(+), 430 deletions(-)

llvm-svn: 97555
2010-03-02 06:34:30 +00:00
Dan Gohman b0e07d53c1 Add explicit keywords.
llvm-svn: 97460
2010-03-01 17:56:46 +00:00
Dan Gohman 8c5d683aa9 The mayHaveSideEffects flag is no longer used.
llvm-svn: 97348
2010-02-27 23:47:46 +00:00
Anton Korobeynikov ab663a0bfe Move TLOF implementations to libCodegen to resolve layering violation.
llvm-svn: 96288
2010-02-15 22:37:53 +00:00
Evan Cheng 5e73ff2e3a Split SelectionDAGISel::IsLegalAndProfitableToFold to
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.

This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.

llvm-svn: 96255
2010-02-15 19:41:07 +00:00
David Greene 15478ac350 Remove an assumption of default arguments. This is in anticipation of a
change to SelectionDAG build APIs.

llvm-svn: 96238
2010-02-15 16:57:13 +00:00
Chris Lattner ff68a42121 print all the newlines at the end of instructions with
OutStreamer.AddBlankLine instead of textually.

llvm-svn: 95734
2010-02-10 00:36:00 +00:00
Chris Lattner b06015aa69 move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
2010-02-09 19:54:29 +00:00
Chris Lattner 996ec840d0 rejigger the world so that EmitInstruction prints the \n at
the end of the instruction instead of expecting the caller to
do it.  This currently causes the asm-verbose instruction 
comments to be on the next line.

llvm-svn: 95178
2010-02-03 01:09:55 +00:00
Evan Cheng 6f36a083ef Revert 95130.
llvm-svn: 95160
2010-02-02 23:55:14 +00:00
Chris Lattner b0d44c3807 refactor code so that LLVMTargetMachine creates the asmstreamer and
mccontext instead of having AsmPrinter do it.  This allows other 
types of MCStreamer's to be passed in.

llvm-svn: 95155
2010-02-02 23:37:42 +00:00
Evan Cheng c1b0116ff1 Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
llvm-svn: 95130
2010-02-02 21:29:10 +00:00
Chris Lattner fd97a3369e Switch MSP430, SPU, Sparc, and SystemZ to use EmitFunctionBody().
Diffstat:
 6 files changed, 30 insertions(+), 284 deletions(-)

llvm-svn: 94727
2010-01-28 01:48:52 +00:00
Chris Lattner 94a946cac4 Remove the argument from EmitJumpTableInfo, because it doesn't need it.
Move the X86 implementation of function body emission up to 
AsmPrinter::EmitFunctionBody, which works by calling the virtual
EmitInstruction method.

llvm-svn: 94716
2010-01-28 01:02:27 +00:00
Chris Lattner 9da5e1f650 Switch MSP430, CellSPU, SystemZ, Darwin/PPC, Alpha, and Sparc to
EmitFunctionHeader:

7 files changed, 16 insertions(+), 210 deletions(-)

llvm-svn: 94630
2010-01-27 00:17:20 +00:00
Evan Cheng 67a69dd2ed Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.

llvm-svn: 94626
2010-01-27 00:07:07 +00:00
Chris Lattner f13e5f7323 constify a method argument.
llvm-svn: 94612
2010-01-26 23:15:09 +00:00
Chris Lattner ff234e09b9 Eliminate SetDirective, and replace it with HasSetDirective.
Default HasSetDirective to true, since most targets have it.

The targets that claim to not have it probably do, or it is
spelled differently. These include Blackfin, Mips, Alpha, and
PIC16.  All of these except pic16 are normal ELF targets, so
they almost certainly have it.

llvm-svn: 94585
2010-01-26 20:40:54 +00:00
Chris Lattner d051af7551 add a new MachineBasicBlock::getSymbol method, replacing
the AsmPrinter::GetMBBSymbol.

llvm-svn: 94515
2010-01-26 04:55:51 +00:00
Chris Lattner a4074257ab eliminate redundant argument to EmitJumpTableInfo
llvm-svn: 94464
2010-01-25 22:41:33 +00:00
Chris Lattner d96bcb5f22 don't reset the default.
llvm-svn: 94380
2010-01-24 20:53:12 +00:00
Chris Lattner 823aed16f9 make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.
llvm-svn: 94378
2010-01-24 20:43:08 +00:00
Chris Lattner 76bdea3290 resolve a fixme: the "nonexecutable stack directive" is actually
a .section.  Switch to it with SwitchSection.

However, I think that this directive should be safe on any ELF target.
If so, we should hoist it up out of the X86 and SystemZ targets.

llvm-svn: 94298
2010-01-23 07:21:06 +00:00
Chris Lattner 7ba0661f27 Stop building RTTI information for *most* llvm libraries. Notable
missing ones are libsupport, libsystem and libvmcore.  libvmcore is
currently blocked on bugpoint, which uses EH.  Once it stops using
EH, we can switch it off.

This #if 0's out 3 unit tests, because gtest requires RTTI information.
Suggestions welcome on how to fix this.

llvm-svn: 94164
2010-01-22 06:49:46 +00:00
Chris Lattner 2b4364fe03 revert 93934, removing the MCAsmInfo endianness bit. I can't
stomache MCAsmInfo having this, and I found a better solution to
this layering issue.

llvm-svn: 93985
2010-01-20 06:34:14 +00:00
Chris Lattner 003b5c8472 give MCAsmInfo a 'has little endian' bit. This is unfortunate, but
I really want clients of the streamer to be able to say "emit this
64-bit integer" and have it get broken down right by the streamer.

I may change this in the future, we'll see how it works out.

llvm-svn: 93934
2010-01-19 22:42:28 +00:00
Chris Lattner c7a062d187 Now that we have everything nicely factored (e.g. asmprinter is not
doing global variable classification anymore) and hookized, sink almost
all target targets global variable emission code into AsmPrinter and out
of each target.

Some notes:

1. PIC16 does completely custom and crazy stuff, so it is not changed.
2. XCore has some custom handling for extra directives.  I'll look at it next.
3. This switches linux/ppc to use .globl instead of .global.  If .globl is
   actually wrong, let me know and I'll fix it.
4. This makes linux/ppc get a lot of random cases right which were obviously
   wrong before, it is probably now a bit healthier.
5. Blackfin will probably start getting .comm and other things that it didn't
   before.  If this is undesirable, it should explicitly opt out of these
   things by clearing the relevant fields of MCAsmInfo.

This leads to a nice diffstat:
 14 files changed, 127 insertions(+), 830 deletions(-)

llvm-svn: 93858
2010-01-19 05:38:33 +00:00
Chris Lattner 5b585f8b1a introduce a section kind for common linkage. Use this to slightly
simplify and commonize some of the asmprinter logic for globals.

This also avoids printing the MCSection for .zerofill, which broke
the llvm-gcc build.

llvm-svn: 93843
2010-01-19 02:48:26 +00:00
Chris Lattner 8b5d55ed06 now that MCSymbol::print doesn't use it's MAI argument, we can
remove it and change all the code that prints MCSymbols to use 
<< instead, which is much simpler and cleaner.

llvm-svn: 93695
2010-01-17 21:43:43 +00:00
Chris Lattner fedff0f67d remove the string form of printVisibility.
llvm-svn: 93609
2010-01-16 01:17:26 +00:00
Chris Lattner 426f31f458 switch more stuff onto MCSymbols
llvm-svn: 93608
2010-01-16 01:12:01 +00:00
Chris Lattner 719e908e7c MCize a bunch more stuff, eliminating a lot of uses of the mangler
and CurrentFnName.

llvm-svn: 93594
2010-01-16 00:21:18 +00:00
Dan Gohman ea6f91ff64 Change SelectCode's argument from SDValue to SDNode *, to make it more
clear what information these functions are actually using.

This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.

llvm-svn: 92564
2010-01-05 01:24:18 +00:00
Anton Korobeynikov d91a14dba5 Fix invalid chain folding for memory variant of sdiv / udiv
llvm-svn: 92472
2010-01-04 10:31:54 +00:00
Dan Gohman 047a767d74 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634
2009-12-05 00:44:40 +00:00
Chris Lattner a48f44d9ee improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!

llvm-svn: 90365
2009-12-03 00:50:42 +00:00
David Greene 659c1a9d78 Move DebugInfo checks into EmitComments and remove them from
target-specific AsmPrinters.  Not all comments need DebugInfo.

Re-enable the line numbers comment test.

llvm-svn: 88697
2009-11-13 21:34:57 +00:00
David Greene be851acfb0 Make the MachineFunction argument of getFrameRegister const.
This also fixes a build error.

llvm-svn: 87027
2009-11-12 21:00:03 +00:00
David Greene 1fbe054450 Add a bool flag to StackObjects telling whether they reference spill
slots.  The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values.  It's too easy to pass a wrong argument
value when multiple arguments have default values.  Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..

llvm-svn: 87022
2009-11-12 20:49:22 +00:00
Chris Lattner 8714348afd indicate what the native integer types for the target are.
Please verify.

llvm-svn: 86397
2009-11-07 19:07:32 +00:00
Chris Lattner d82510e109 add some missing #includes
llvm-svn: 86367
2009-11-07 09:20:54 +00:00
Dan Gohman b15f4a1cbd Remove uninteresting and confusing debug output.
llvm-svn: 86149
2009-11-05 18:47:09 +00:00
Dan Gohman 453d64c9f5 Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.

llvm-svn: 85517
2009-10-29 18:10:34 +00:00
Evan Cheng 83896a59e1 Add a second ValueType argument to isFPImmLegal.
llvm-svn: 85361
2009-10-28 01:43:28 +00:00
Dan Gohman 9c6bc1f563 Update SystemZ to use PSW following the way x86 uses EFLAGS. Besides
eliminating a use of MVT::Flag, this is needed for an upcoming CodeGen
change.

This unfortunately requires SystemZ to switch to the list-burr
scheduler, in order to handle the physreg defs properly, however
that's what LLVM has available at this time.

llvm-svn: 85357
2009-10-28 00:55:57 +00:00
Evan Cheng 16993aa30b Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
llvm-svn: 85281
2009-10-27 19:56:55 +00:00
Nick Lewycky 974e12b2d3 Remove includes of Support/Compiler.h that are no longer needed after the
VISIBILITY_HIDDEN removal.

llvm-svn: 85043
2009-10-25 06:57:41 +00:00
Nick Lewycky 02d5f77d26 Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.

llvm-svn: 85042
2009-10-25 06:33:48 +00:00
Evan Cheng 8759585aba Revert 84315 for now. Re-thinking the patch.
llvm-svn: 84321
2009-10-17 07:53:04 +00:00
Evan Cheng 0818d87ed1 Rename getFixedStack to getStackObject. The stack objects represented are not
necessarily fixed. Only those will negative frame indices are "fixed."

llvm-svn: 84315
2009-10-17 06:22:26 +00:00
Dan Gohman be8137b0b4 Replace TargetInstrInfo::isInvariantLoad and its target-specific
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475
2009-10-07 17:38:06 +00:00
Jim Grosbach fa14dd430c Add register-reuse to frame-index register scavenging. When a target uses
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.

eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.

ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.

llvm-svn: 83467
2009-10-07 17:12:56 +00:00
Dan Gohman 10d3dc569b Instead of printing unnecessary basic block labels as labels in
verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.

Also, factor out the relevant code out of all the targets and into
target-independent code.

llvm-svn: 83392
2009-10-06 17:38:38 +00:00
Devang Patel 051454a16f Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction.
llvm-svn: 83363
2009-10-06 02:19:11 +00:00
Devang Patel e0709cfc92 Use MachineInstr as an processDebugLoc() argument.
This will allow processDebugLoc() to handle scopes for DWARF debug info. 

llvm-svn: 83183
2009-09-30 23:12:50 +00:00
Dan Gohman 48b185d6f7 Improve MachineMemOperand handling.
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
   This eliminates MachineInstr's std::list member and allows the data to be
   created by isel and live for the remainder of codegen, avoiding a lot of
   copying and unnecessary translation. This also shrinks MemSDNode.
 - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
   fields for MachineMemOperands.
 - Change MemSDNode to have a MachineMemOperand member instead of its own
   fields with the same information. This introduces some redundancy, but
   it's more consistent with what MachineInstr will eventually want.
 - Ignore alignment when searching for redundant loads for CSE, but remember
   the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.

llvm-svn: 82794
2009-09-25 20:36:54 +00:00
Dan Gohman 32f71d714b Rename getTargetNode to getMachineNode, for consistency with the
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.

llvm-svn: 82790
2009-09-25 18:54:59 +00:00
Dan Gohman 757acfea63 Fix the offset values for these memoperands. For frame objects, the
PseudoSourceValue already effectively represents the offset from the
frame base, so the actual offset should not be added to it.

llvm-svn: 82465
2009-09-21 17:58:09 +00:00
Evan Cheng 9827ad39a7 Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
llvm-svn: 82311
2009-09-19 09:51:03 +00:00
Evan Cheng 270d0f986f Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.

llvm-svn: 82273
2009-09-18 21:02:19 +00:00
Chris Lattner eb2cc68254 remove all but one reference to TargetRegisterDesc::AsmName.
llvm-svn: 81714
2009-09-13 20:31:40 +00:00
Chris Lattner ad10b3be3e the tblgen produced 'getRegisterName' method does not access
the object, make it static instead of const.

llvm-svn: 81711
2009-09-13 20:19:22 +00:00
Chris Lattner 06c5eed9e9 make tblgen produce a function that returns the name for a physreg.
Nothing is using this info yet.

llvm-svn: 81707
2009-09-13 20:08:00 +00:00
Chris Lattner 1d04aa78f3 replace printBasicBlockLabel with EmitBasicBlockStart,
now that printBasicBlockLabel is only used for starting
a MBB.  This allows elimination of a bunch of arguments.

llvm-svn: 81684
2009-09-13 18:25:37 +00:00
Chris Lattner 4cd449813a convert some uses of printBasicBlockLabel to use GetMBBSymbol
instead.

llvm-svn: 81677
2009-09-13 17:14:04 +00:00
Chris Lattner 321bc99a74 remove DebugLoc from MCInst and eliminate "Comment printing" from
the MCInst path of the asmprinter.  Instead, pull comment printing
out of the autogenerated asmprinter into each target that uses the
autogenerated asmprinter.  This causes code duplication into each
target, but in a way that will be easier to clean up later when more
asmprinter stuff is commonized into the base AsmPrinter class.

This also fixes an xcore strangeness where it inserted two tabs
before every instruction.

llvm-svn: 81396
2009-09-09 23:14:36 +00:00
Duncan Sands 2fbeaf084f Remove some unused variables and methods warned about by
icc (#177, partial).  Patch by Erick Tryzelaar.

llvm-svn: 81106
2009-09-06 08:33:48 +00:00
Sandeep Patel 68c5f477fa Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.
llvm-svn: 80773
2009-09-02 08:44:58 +00:00
Benjamin Kramer 3c62f5095a Normalize makefile comments and sort cmake file lists.
llvm-svn: 80584
2009-08-31 13:05:24 +00:00
Daniel Dunbar 34ee203337 Fix some refactos for iostream changes (in -Asserts mode).
- The world needs better C++ refactoring tools, can I get an Amen!?

llvm-svn: 79843
2009-08-23 08:50:52 +00:00
Chris Lattner 317dbbcfb1 eliminate uses of cerr()
llvm-svn: 79834
2009-08-23 07:05:07 +00:00
Chris Lattner af29ea6d57 eliminate the last DOUTs from the targets.
llvm-svn: 79833
2009-08-23 06:49:22 +00:00
Benjamin Kramer f7b571726a Forgot to update some CMakeLists.
llvm-svn: 79780
2009-08-22 22:20:11 +00:00
Chris Lattner e9a75a6654 rename TAI -> MAI, being careful not to make MAILJMP instructions :)
llvm-svn: 79777
2009-08-22 21:43:10 +00:00
Chris Lattner 7b26fce23e Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
llvm-svn: 79763
2009-08-22 20:48:53 +00:00
Anton Korobeynikov f0d31ab7b8 Some dummy cost model for s390x:
- Prefer short-imm instructions over ext-imm, when possible
 - Prefer Z10 instructions over Z9, when possible

This hopefully should fix some dejagnu test fails on solaris

llvm-svn: 79741
2009-08-22 11:46:16 +00:00
Anton Korobeynikov f31a44ec01 Add fcopysign instructions
llvm-svn: 79664
2009-08-21 20:02:37 +00:00
Anton Korobeynikov 47398930e4 Expand few nodes until someone will be crazy enough to implement them natively :)
llvm-svn: 79659
2009-08-21 18:52:42 +00:00
Anton Korobeynikov cb7444342b Typo :(
llvm-svn: 79657
2009-08-21 18:41:02 +00:00
Anton Korobeynikov 81be4b345a Correct instruction names for subtract-with-borrow
llvm-svn: 79656
2009-08-21 18:37:28 +00:00
Anton Korobeynikov a39f96c6ed Handle 'r' inline asm constraint
llvm-svn: 79648
2009-08-21 18:15:41 +00:00
Chris Lattner 4b7dadb76e eliminate AsmPrinter::SwitchToSection and just have clients
talk to the MCStreamer directly instead.

llvm-svn: 79405
2009-08-19 05:49:37 +00:00
Dan Gohman ef3d457126 Various AsmWriter output cleanups. Use WriteAsOperand instead of
PrintUnmangledNameSafely.

llvm-svn: 78878
2009-08-13 01:36:44 +00:00
Chris Lattner 9a6cf91261 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802
2009-08-12 07:22:17 +00:00
Chris Lattner 2b083cf989 prune #include
llvm-svn: 78749
2009-08-11 23:07:27 +00:00
Owen Anderson 9f94459d24 Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.

llvm-svn: 78713
2009-08-11 20:47:22 +00:00
Chris Lattner 2c30970b22 pass the TargetTriple down from each target ctor to the
LLVMTargetMachine ctor.  It is currently unused.

llvm-svn: 78711
2009-08-11 20:42:37 +00:00
Owen Anderson 53aa7a960c Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
llvm-svn: 78610
2009-08-10 22:56:29 +00:00
Chris Lattner b94284b5e2 make printInstruction return void since its result is omitted. Make the
error condition get trapped with an assert.

llvm-svn: 78449
2009-08-08 01:32:19 +00:00
Chris Lattner b1692dc267 don't check the result of printInstruction anymore.
llvm-svn: 78444
2009-08-08 00:05:42 +00:00
Anton Korobeynikov be47ccffef Convert bswap test to filecheck, add more test entries & convert stuff to filecheck
llvm-svn: 78212
2009-08-05 16:50:53 +00:00
Anton Korobeynikov 2e627cb37f Add memory versions of some instructions.
Patch by Neale Ferguson!

llvm-svn: 78203
2009-08-05 16:16:11 +00:00
Dan Gohman f9bbcd1afd Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.

llvm-svn: 78142
2009-08-05 01:29:28 +00:00
Dan Gohman c6b5e8a5c5 Don't flush the raw_ostream between each MachineFunction. These flush
calls were originally put in place because errs() at one time was
not unbuffered, and these print routines are commonly used with errs()
for debugging. However, errs() is now properly unbuffered, so the
flush calls are no longer needed. This significantly reduces the
number of write(2) calls for regular asm printing when there are many
small functions.

llvm-svn: 78137
2009-08-05 00:49:25 +00:00
Daniel Dunbar c3719c36e6 Move most targets TargetMachine constructor to only taking a target triple.
- The C, C++, MSIL, and Mips backends still need the module.

llvm-svn: 77927
2009-08-02 23:37:13 +00:00
Daniel Dunbar 31b44e8f6c Normalize Subtarget constructors to take a target triple string instead of
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918
2009-08-02 22:11:08 +00:00
Chris Lattner 7ee0246f51 eliminate the TM argument to the TAI class, remove comment about supporting
solaris :)

llvm-svn: 77865
2009-08-02 04:32:07 +00:00
Chris Lattner b25afe081c remove TargetAsmInfo::TM, which is now dead. The basic TAI class now
no longer depends on TM!

llvm-svn: 77863
2009-08-02 04:27:24 +00:00
Chris Lattner b2bbb61f33 REmove dead fields of TAI.
llvm-svn: 77820
2009-08-01 22:40:22 +00:00
Chris Lattner 5034329f8d pass the mangler down into the various SectionForGlobal methods.
No functionality change.

llvm-svn: 77432
2009-07-29 05:09:30 +00:00
Chris Lattner 5e693ed07b Rip all of the global variable lowering logic out of TargetAsmInfo. Since
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.

Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.

This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
   pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
   CStringSection_.  Factor the code better.
5. fixes some bugs in string lowering on ELF targets.

llvm-svn: 77294
2009-07-28 03:13:23 +00:00
Chris Lattner 86b7255776 Eliminate getNamed/getUnnamedSection, adding a new and unified getOrCreateSection
instead.

llvm-svn: 77186
2009-07-27 06:17:14 +00:00
Chris Lattner 149465ea06 Eliminate SectionFlags, just embed a SectionKind into Section
instead and drive things based off of that.

llvm-svn: 77184
2009-07-27 05:32:16 +00:00
Chris Lattner 602d44fa70 untangle a TargetAsmInfo hack where ELFTargetAsmInfo would create a
'unnamed' bss section, but some impls would want a named one.  Since
they don't have consistent behavior, just make each target do their
own thing, instead of doing something "sortof common" then having
targets change immutable objects later.

llvm-svn: 77165
2009-07-26 19:23:28 +00:00
Daniel Dunbar 9813b0b025 Eliminate some uses of DOUT, cerr, and getNameStart().
llvm-svn: 77145
2009-07-26 07:49:05 +00:00
Daniel Dunbar ee01b242e8 Factor commonality in triple match routines into helper template for registering
classes, and migrate existing targets over.

llvm-svn: 77126
2009-07-26 05:03:33 +00:00
Daniel Dunbar bc981d8efa Kill Target specific ModuleMatchQuality stuff.
- This was overkill and inconsistently implemented.

llvm-svn: 77114
2009-07-26 02:22:58 +00:00
Daniel Dunbar 691a4784db Simplify JIT target selection.
- Instead of requiring targets to define a JIT quality match function, we just
   have them specify if they support a JIT.

 - Target selection for the JIT just gets the host triple and looks for the best
   target which matches the triple and has a JIT.

llvm-svn: 77060
2009-07-25 10:09:50 +00:00
Daniel Dunbar 5680b4f285 Add new helpers for registering targets.
- Less boilerplate == good.

llvm-svn: 77052
2009-07-25 06:49:55 +00:00
Owen Anderson 47db941fd3 Get rid of the Pass+Context magic.
llvm-svn: 76702
2009-07-22 00:24:57 +00:00
Eli Friedman 1f74b1fdfd Missed a piece of the commit to remove the shift flavor.
llvm-svn: 76635
2009-07-21 20:15:24 +00:00
Chris Lattner 100865e59d make AsmPrinter::doFinalization iterate over the global variables
and call PrintGlobalVariable, allowing elimination and simplification
of various targets.

llvm-svn: 76604
2009-07-21 18:38:57 +00:00
Chris Lattner 249df80306 fix Sparc, SystemZ, and MSP430 to not override AsmPrinter::doInitialization.
This eliminates redundancy setting up the mangler and adds support to them
for module-level inline asm and a .file directive.

llvm-svn: 76592
2009-07-21 17:37:35 +00:00
Chris Lattner 1177cee9dc Rename LessPrivateGlobalPrefix -> LinkerPrivateGlobalPrefix to match the
LLVM IR concept.

llvm-svn: 76590
2009-07-21 17:30:51 +00:00
Bill Wendling dde1a8eef4 Pass in the unfortunately named "LessPrivatePrefix" for the
"LinkerPrivatePrefix". It seems to have been used in only one place before I
started this "linker_private" business. I'm thinking that a rename is in
order...

llvm-svn: 76479
2009-07-20 21:30:28 +00:00
Bill Wendling a3c6f6bffa Add plumbing for the `linker_private' linkage type. This type is meant for
"private" symbols which the assember shouldn't strip, but which the linker may
remove after evaluation. This is mostly useful for Objective-C metadata.

This is plumbing, so we don't have a use of it yet. More to come, etc.

llvm-svn: 76385
2009-07-20 01:03:30 +00:00
Daniel Dunbar 88f35c870b CMake support for SystemZ.
llvm-svn: 76384
2009-07-20 00:24:17 +00:00
Daniel Dunbar 87ad1e54d4 SystemZ *does* have a CodeGen/AsmPrinter split.
- What it doesn't have is the rest of its cmake files...

llvm-svn: 76352
2009-07-19 00:46:44 +00:00
Daniel Dunbar 7eaf6dd84a Tweak cmake files for the four targets that don't split CodeGen out.
- We should canonicalize this and get rid of the cmake and llvm-config hacks to
   support both variants.

llvm-svn: 76350
2009-07-19 00:26:46 +00:00
Daniel Dunbar 83779208cc Add dependencies from TargetInfo onto .td generation.
- Shouldn't really be necessary, but currently .inc files get included into
   some main target headers.

llvm-svn: 76349
2009-07-19 00:21:12 +00:00
Daniel Dunbar 67038c1333 Put Target definitions inside Target specific header, and llvm namespace.
llvm-svn: 76344
2009-07-18 23:03:22 +00:00
Anton Korobeynikov 0ef680bcbd Add carry producing / using versions of add / sub
llvm-svn: 76316
2009-07-18 14:16:06 +00:00
Anton Korobeynikov 8486df0ed2 Expand frem
llvm-svn: 76315
2009-07-18 13:44:25 +00:00
Anton Korobeynikov de5e015bfd Turn abort() into unreachable
llvm-svn: 76314
2009-07-18 13:34:59 +00:00
Anton Korobeynikov 30b1c2f636 Turn few asserts into errors / unreachable's
llvm-svn: 76313
2009-07-18 13:33:17 +00:00
Anton Korobeynikov 6e4bdd7d78 Handle vector returns
llvm-svn: 76312
2009-07-18 12:51:06 +00:00
Anton Korobeynikov 39f2a22401 Provide expansion for ct* intrinsics
llvm-svn: 76311
2009-07-18 12:26:13 +00:00
Anton Korobeynikov c3b10f0677 Expand sext_inreg for i1
llvm-svn: 76310
2009-07-18 12:20:36 +00:00
Anton Korobeynikov acd2f4dcea Add missed return
llvm-svn: 76209
2009-07-17 18:28:59 +00:00
Duncan Sands 35e95639c0 Avoid a compiler warning when assertions are turned off.
llvm-svn: 76176
2009-07-17 12:25:14 +00:00
Daniel Dunbar 7ecc62d8c1 Fix 'may be used uninitialized' warning.
- Anton, please review.

llvm-svn: 76144
2009-07-17 02:19:26 +00:00
Anton Korobeynikov 02fc607d54 Unbreak
llvm-svn: 76064
2009-07-16 14:36:52 +00:00
Anton Korobeynikov 73fcd3d962 Temporary disable 16 bit bswap
llvm-svn: 76063
2009-07-16 14:35:57 +00:00
Anton Korobeynikov 460e59034b Add instruction formats and few opcodes
llvm-svn: 76062
2009-07-16 14:35:20 +00:00
Anton Korobeynikov 902facfe96 Add bswap patterns
llvm-svn: 76061
2009-07-16 14:34:52 +00:00
Anton Korobeynikov ff21565821 Provide crazy pseudos for regpairs spills / reloads
llvm-svn: 76060
2009-07-16 14:34:15 +00:00
Anton Korobeynikov 7fa0ce1a21 Handle long-disp stuff more consistently
llvm-svn: 76059
2009-07-16 14:33:52 +00:00
Anton Korobeynikov 30e1cb2ab9 All FP instructions have 12 bit memory displacement field
llvm-svn: 76058
2009-07-16 14:33:27 +00:00
Anton Korobeynikov 5b03970c7b Another predicate routine
llvm-svn: 76057
2009-07-16 14:33:01 +00:00
Anton Korobeynikov 5761e33ce4 More helpers
llvm-svn: 76056
2009-07-16 14:32:41 +00:00
Anton Korobeynikov b22afc7bcc Add bunch of branch folding stuff
llvm-svn: 76055
2009-07-16 14:32:19 +00:00
Anton Korobeynikov 0f8c47a7bb Add missed opcodes to short => long displacement conversion
llvm-svn: 76054
2009-07-16 14:31:52 +00:00
Anton Korobeynikov 201d49d56a Cleanup
llvm-svn: 76053
2009-07-16 14:31:32 +00:00
Anton Korobeynikov 3ae30e08ef Fix logic inversion for RI-mode address selection
llvm-svn: 76052
2009-07-16 14:31:14 +00:00
Anton Korobeynikov 4121039bef Expand 32-bit bitconverts via memory
llvm-svn: 76050
2009-07-16 14:30:29 +00:00
Anton Korobeynikov bc2ead6ea3 Fix incomin arg stack frame offset in case we need to generate stack frame
llvm-svn: 76049
2009-07-16 14:29:57 +00:00
Anton Korobeynikov 3729850b50 Fix instruction mnemonics for some fp_to_sint operations
llvm-svn: 76048
2009-07-16 14:29:26 +00:00
Anton Korobeynikov a293caf2ed i32 values are passed extended also on stack. Handle this in generic way
llvm-svn: 76047
2009-07-16 14:29:05 +00:00
Anton Korobeynikov 1fa01d307c We definitely have 1-0 bools
llvm-svn: 76046
2009-07-16 14:28:46 +00:00
Anton Korobeynikov bd41c83ab0 Revert the commit, it just hides the real bug
llvm-svn: 76045
2009-07-16 14:28:26 +00:00
Anton Korobeynikov 6fb6e09781 Out GR128 regclass is not a 'real' i128 one.
llvm-svn: 76044
2009-07-16 14:27:53 +00:00
Anton Korobeynikov fef4a3b762 Add missed condbranch opcodes
llvm-svn: 76043
2009-07-16 14:27:26 +00:00
Anton Korobeynikov 6c01db428f Handle bitconverts
llvm-svn: 76042
2009-07-16 14:27:01 +00:00
Anton Korobeynikov 70d0bceed6 Unbreak mvi and friends - emit only 'significant' part of the operand
llvm-svn: 76041
2009-07-16 14:26:38 +00:00
Anton Korobeynikov 573fab1879 Expand fp_to_uint too
llvm-svn: 76040
2009-07-16 14:26:06 +00:00
Anton Korobeynikov d57f8cee1d We don't have FP truncstores
llvm-svn: 76039
2009-07-16 14:25:46 +00:00
Anton Korobeynikov 3f254d536a Expand uint_to_fp
llvm-svn: 76038
2009-07-16 14:25:30 +00:00
Anton Korobeynikov 1ae8098144 Emit proper rounding mode for fp_to_sint
llvm-svn: 76037
2009-07-16 14:25:12 +00:00
Anton Korobeynikov 35a5d6f7ca f32/f64 regs are stored on stack if we're short in FP regs
llvm-svn: 76036
2009-07-16 14:24:57 +00:00
Anton Korobeynikov 2acdac0f8e Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
llvm-svn: 76035
2009-07-16 14:24:41 +00:00
Anton Korobeynikov 8c18d8972c Make FP zero to be legal FP immediate via LOAD ZERO
llvm-svn: 76034
2009-07-16 14:24:16 +00:00
Anton Korobeynikov 3894c8b6c2 Loads are not two-address in any way
llvm-svn: 76033
2009-07-16 14:24:01 +00:00
Anton Korobeynikov c8f76f47dd Add LOAD NEGATIVE instruction
llvm-svn: 76032
2009-07-16 14:23:44 +00:00
Anton Korobeynikov ae2d8abf2c LOAD COMPLEMENT instruction is not really two-addr
llvm-svn: 76031
2009-07-16 14:23:30 +00:00
Anton Korobeynikov 82af42d361 Add multiple add/sub instructions
llvm-svn: 76030
2009-07-16 14:23:16 +00:00
Anton Korobeynikov b106b60456 Handle FP callee-saved regs
llvm-svn: 76029
2009-07-16 14:23:01 +00:00
Anton Korobeynikov 871784ba88 Proper FP extloads
llvm-svn: 76028
2009-07-16 14:22:46 +00:00
Anton Korobeynikov 12400008a7 Add proper PWS impdef's
llvm-svn: 76027
2009-07-16 14:22:30 +00:00
Anton Korobeynikov 3c44a39156 Propagate FP select_cc to dag inserters
llvm-svn: 76026
2009-07-16 14:22:15 +00:00
Anton Korobeynikov 430ab4f382 Implement fp_to_sint
llvm-svn: 76025
2009-07-16 14:21:57 +00:00
Anton Korobeynikov 345e08d24c Implement FP regs spills / restores
llvm-svn: 76024
2009-07-16 14:21:41 +00:00
Anton Korobeynikov 0fcdd8d424 Add fabs
llvm-svn: 76023
2009-07-16 14:21:27 +00:00
Anton Korobeynikov 50485d65d4 Add fneg
llvm-svn: 76022
2009-07-16 14:21:12 +00:00
Anton Korobeynikov d7416e7c0b We don't have native sine / cosine instructions
llvm-svn: 76021
2009-07-16 14:20:56 +00:00
Anton Korobeynikov 77928399b0 More sint_to_fp stuff
llvm-svn: 76020
2009-07-16 14:20:39 +00:00
Anton Korobeynikov 8195797de2 Add bunch of FP instructions
llvm-svn: 76019
2009-07-16 14:20:24 +00:00
Anton Korobeynikov 45a56de726 We don't have any FP extloads
llvm-svn: 76018
2009-07-16 14:20:08 +00:00
Anton Korobeynikov ead9b9fb31 Implement all comparisons
llvm-svn: 76017
2009-07-16 14:19:54 +00:00
Anton Korobeynikov 7cb00653c1 Add constpool lowering / printing
llvm-svn: 76016
2009-07-16 14:19:35 +00:00
Anton Korobeynikov c806cea4cb Allow FP arguments pass / return
llvm-svn: 76015
2009-07-16 14:19:16 +00:00