Commit Graph

231425 Commits

Author SHA1 Message Date
Rafael Espindola 78d947b4f5 Fix pr27728.
Sorry for the lack testcase. There is one in the pr, but it depends on
std::sort and the .ll version is 110 lines, so I don't think it is
wort it.

The bug was that we were sorting after adding a terminator, and the
sorting algorithm could end up putting the terminator in the middle of
the List vector.

With that we would create a Spans map entry keyed on nullptr which would
then be added to CUs and fail in that sorting.

llvm-svn: 270165
2016-05-20 00:38:28 +00:00
Reid Kleckner a769fd50ba Avoid depending on test inputes that aren't in Inputs
Some people have weird CI systems that run each test subdirectory
independently without access to other parallel trees.

Unfortunately, this means we have to suffer some duplication until Art
can sort out how to share these types.

llvm-svn: 270164
2016-05-20 00:38:25 +00:00
Quentin Colombet cfd97b9386 [RegBankSelect] Introduce MappingCost helper class.
This helper class will be used to represent the cost of mapping an
instruction to a specific register bank.
The particularity of these costs is that they are mostly local, thus the
frequency of the basic block is irrelevant. However, for few
instructions (e.g., phis and terminators), the cost may be non-local and
then, we need to account for the frequency of the involved basic blocks.

This will be used by the greedy mode I am working on.

llvm-svn: 270163
2016-05-20 00:35:26 +00:00
Jason Molenda 1ebb2c92f2 Some changes to prevent searching down the stack for saved register
values for the pc or return address register.

On ios with arm64 and a binary that has multiple functions without 
individual symbol boundaries, we end up with an assembly profile
unwind plan that says lr=<same> - that is, the link register contents
are unmodified from the caller's value.  This gets the unwinder in
a loop.  

When we're off the 0th frame, we never want to look to a caller for
a pc or return-address register value.

Add checks to ReadGPRValue and ReadRegister to prevent both the pc
and ra register values from recursing.

If this causes problems with backtraces on android, let me know or
back it out and I'll look into it -- but I think these are
straightforward and don't expect problems.

<rdar://problem/24610365> 

llvm-svn: 270162
2016-05-20 00:16:14 +00:00
Richard Smith dcccd929d1 Restore ASCIIbetical order.
llvm-svn: 270161
2016-05-20 00:05:55 +00:00
Vedant Kumar 95a2a7f2a1 [Lexer] Don't merge macro args from different macro files
The lexer sets the end location of macro arguments incorrectly *if*,
while merging consecutive args to fit into a single SLocEntry, it finds
args which come from different macro files.

Fix the issue by using separate SLocEntries in this situation.

This fixes a code coverage crasher (rdar://problem/26181005). Because
the lexer reported end locations for certain macro args incorrectly, we
would generate bogus coverage mappings with negative line offsets.

Reviewed-by: akyrtzi

Differential Revision: http://reviews.llvm.org/D20401

llvm-svn: 270160
2016-05-19 23:44:02 +00:00
Chris Bieneman db373bed66 [obj2yaml] [yaml2obj] Adding a test for r270124
This test covers strings after load command structs and zero fill bytes.

llvm-svn: 270159
2016-05-19 23:26:39 +00:00
Chris Bieneman 1abf005fe6 [yaml2obj] Removing debug code that scribbled 0xDEADBEEF
Now that MachO load command fields are fully covered we can fill unaccounted for bytes with 0. That allows us to sparsely specify YAML to simplify tests.

Simplifying load_commands test accordingly.

llvm-svn: 270158
2016-05-19 23:26:31 +00:00
Lang Hames 45bd7ca7fc [RuntimeDyld][MachO] Add support for SUBTRACTOR relocations between anonymous
symbols on x86-64.

llvm-svn: 270157
2016-05-19 23:26:05 +00:00
Rafael Espindola 0a78f8c463 clang-format. NFC.
llvm-svn: 270156
2016-05-19 23:17:37 +00:00
Sanjoy Das 2351975860 Add const qualifiers to appease bots; NFC
llvm-svn: 270155
2016-05-19 23:15:59 +00:00
Anton Yartsev 8a88b90817 [analyzer] Fix for PR23790 : constrain return value of strcmp() rather than returning a concrete value.
The function strcmp() can return any value, not just {-1,0,1} : "The strcmp(const char *s1, const char *s2) function returns an integer greater than, equal to, or less than zero, accordingly as the string pointed to by s1 is greater than, equal to, or less than the string pointed to by s2." [C11 7.24.4.2p3]
https://llvm.org/bugs/show_bug.cgi?id=23790
http://reviews.llvm.org/D16317

llvm-svn: 270154
2016-05-19 23:03:49 +00:00
Easwaran Raman bb578ef0dd Allow -inline-threshold to override default threshold.
Before r257832, the threshold used by SimpleInliner was explicitly specified or generated from opt levels and passed to the base class Inliner's constructor. There, it was first overridden by explicitly specified -inline-threshold. The refactoring in r257832 did not preserve this behavior for all opt levels. This change brings back the original behavior.

Differential Revision: http://reviews.llvm.org/D20452

llvm-svn: 270153
2016-05-19 23:02:09 +00:00
Richard Smith ad940f23ee Forgotten file from r269992.
llvm-svn: 270152
2016-05-19 22:56:37 +00:00
Sanjoy Das f5f0331a3b [GuardWidening] Introduce range check merging
Sequences of range checks expressed using guards, like

  guard((I - 2) u< L)
  guard((I - 1) u< L)
  guard((I + 0) u< L)
  guard((I + 1) u< L)
  guard((I + 2) u< L)

can sometimes be combined into a smaller sequence:

  guard((I - 2) u< L AND (I + 2) u< L)

if we can prove that (I - 2) u< L AND (I + 2) u< L implies all of checks
expressed in the previous sequence.

This change teaches GuardWidening to do this kind of merging when
feasible.

llvm-svn: 270151
2016-05-19 22:55:46 +00:00
Justin Lebar 2e4ecfdebe [CUDA] Implement __ldg using intrinsics.
Summary:
Previously it was implemented as inline asm in the CUDA headers.

This change allows us to use the [addr+imm] addressing mode when
executing ld.global.nc instructions.  This translates into a 1.3x
speedup on some benchmarks that call this instruction from within an
unrolled loop.

Reviewers: tra, rsmith

Subscribers: jhen, cfe-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D19990

llvm-svn: 270150
2016-05-19 22:49:13 +00:00
Quentin Colombet b926bdac4c Reapply r263460: [SpillPlacement] Fix a quadratic behavior in spill placement.
Using Chandler's words from r265331:
This commit was greatly exacerbating PR17409 and effectively regressed
build time for lot of (very large) code when compiled with ASan or MSan.

PR17409 is fixed by r269249, so this is fine to reapply r263460.

Original commit message:
The bad behavior happens when we have a function with a long linear
chain of basic blocks, and have a live range spanning most of this
chain, but with very few uses.

Let say we have only 2 uses.

The Hopfield network is only seeded with two active blocks where the
uses are, and each iteration of the outer loop in
`RAGreedy::growRegion()` only adds two new nodes to the network due to
the completely linear shape of the CFG.  Meanwhile,
`SpillPlacer->iterate()` visits the whole set of discovered nodes, which
adds up to a quadratic algorithm.

This is an historical accident effect from r129188.

When the Hopfield network is expanding, most of the action is happening
on the frontier where new nodes are being added. The internal nodes in
the network are not likely to be flip-flopping much, or they will at
least settle down very quickly. This means that while
`SpillPlacer->iterate()` is recomputing all the nodes in the network, it
is probably only the two frontier nodes that are changing their output.

Instead of recomputing the whole network on each iteration, we can
maintain a SparseSet of nodes that need to be updated:

- `SpillPlacement::activate()` adds the node to the todo list.
- When a node changes value (i.e., `update()` returns true), its
  neighbors are added to the todo list.
- `SpillPlacement::iterate()` only updates the nodes in the list.

The result of Hopfield iterations is not necessarily exact. It should
converge to a local minimum, but there is no guarantee that it will find
a global minimum. It is possible that updating nodes in a different
order will cause us to switch to a different local minimum. In other
words, this is not NFC, but although I saw a few runtime improvements
and regressions when I benchmarked this change, those were side effects
and actually the performance change is in the noise as expected.

Huge thanks to Jakob Stoklund Olesen <stoklund@2pi.dk> for his
feedbacks, guidance and time for the review.

llvm-svn: 270149
2016-05-19 22:40:37 +00:00
Jim Ingham d9e02c4f3c Remove a should have been deleted extra assignment to a variable.
Also fix up the formatting a bit, it looks like something was inserting
actual tabs.  Replace with 4 spaces.

llvm-svn: 270148
2016-05-19 22:22:57 +00:00
Rafael Espindola ab03eb007c Record a TargetMachine instead of a Reloc::Model.
Addresses r270095's code review.

llvm-svn: 270147
2016-05-19 22:07:57 +00:00
Dan Liew 3868e468fe [LibFuzzer]
Work around crashes in ``__sanitizer_malloc_hook()`` under Mac OSX.

Under Mac OSX we intercept calls to malloc before thread local
storage is initialised leading to a crash when accessing
``AllocTracer``. To workaround this ``AllocTracer`` is only accessed
in the hook under Linux. For symmetry ``__sanitizer_free_hook()``
is also modified in the same way.

To support this change a set of new macros
LIBFUZZER_LINUX and LIBFUZZER_APPLE has been defined which can be
used to check the target being compiled for.

Differential Revision: http://reviews.llvm.org/D20402

llvm-svn: 270145
2016-05-19 22:00:33 +00:00
Benjamin Kramer 97d7a66299 [Sema] Fix use after move. Found by ubsan.
llvm-svn: 270144
2016-05-19 21:53:33 +00:00
Easwaran Raman 7cefdb81c5 Remove specializations of ProfileSummary
This removes the subclasses of ProfileSummary, moves the members of the derived classes to the base class.

Differential Revision: http://reviews.llvm.org/D20390

llvm-svn: 270143
2016-05-19 21:53:28 +00:00
Matthew Simpson 476c0afc01 [ARM, AArch64] Match additional patterns to ldN instructions
When matching an interleaved load to an ldN pattern, the interleaved access
pass checks that all users of the load are shuffles. If the load is used by an
instruction other than a shuffle, the pass gives up and an ldN is not
generated. This patch considers users of the load that are extractelement
instructions. It attempts to modify the extracts to use one of the available
shuffles rather than the load. After the transformation, the load is only used
by shuffles and will then be matched with an ldN pattern.

Differential Revision: http://reviews.llvm.org/D20250

llvm-svn: 270142
2016-05-19 21:39:00 +00:00
Xinliang David Li 5f153e686e [profile] entry eviction support in value profiler
Differential revision: http://reviews.llvm.org/D20408

llvm-svn: 270141
2016-05-19 21:35:34 +00:00
Matt Arsenault 4e3d383c46 AMDGPU: Remove pointless conversions
llvm-svn: 270139
2016-05-19 21:09:58 +00:00
Dan Gohman 847afa2231 [WebAssembly] Simplify code that never has to handle physical registers. NFC.
llvm-svn: 270137
2016-05-19 21:07:20 +00:00
Easwaran Raman e5a17e3f1d Move ProfileSummary to IR.
This splits ProfileSummary into two classes: a ProfileSummary class that has methods to convert from/to metadata and a ProfileSummaryBuilder class that computes the profiles summary which is in ProfileData.

Differential Revision: http://reviews.llvm.org/D20314

llvm-svn: 270136
2016-05-19 21:07:12 +00:00
Guozhi Wei b1d37199cc [InstCombine] Avoid combining the bitcast of a var that is used as both address and result of load instructions
This patch fixes https://llvm.org/bugs/show_bug.cgi?id=27703.

If there is a sequence of one or more load instructions, each loaded value is used as address of later load instruction, bitcast is necessary to change the value type, don't optimize it.

llvm-svn: 270135
2016-05-19 21:07:01 +00:00
Sanjay Patel cfe75fa72e comment out line that is causing UBSAN bot failures
Patch is awaiting review here:
http://reviews.llvm.org/D20434

llvm-svn: 270128
2016-05-19 21:00:02 +00:00
Chris Bieneman 9f243e9a1c [obj2yaml] [yaml2obj] Support for MachO Load Command data
This re-applies r270115.

Many of the MachO load commands can have data appended after the command structure. This data is frequently strings, but can actually be anything. This patch adds support for three optional fields on load command yaml descriptions.

The new PayloadString YAML field is populated with the data after load commands known to have strings as extra data.

The new ZeroPadBytes YAML field is a count of zero'd bytes after the end of the load command structure before the next command. This can apply anywhere in the file. MachO2YAML verifies that bytes are zero before populating this field, and YAML2MachO will add zero'd bytes.

The new PayloadBytes YAML field stores all bytes after the end of the load command structure before the next command if they are non-zero. This is a catch all for all unhandled bytes. If MachO2Yaml populates PayloadBytes it will not populate ZeroPadBytes, instead zero'd bytes will be in the PayloadBytes structure.

llvm-svn: 270124
2016-05-19 20:54:43 +00:00
Chris Bieneman f605d10a06 Revert "[obj2yaml] [yaml2obj] Support for MachO Load Command data"
This reverts commit r270115.

This failed on several builders using GCC.

llvm-svn: 270121
2016-05-19 20:48:54 +00:00
David Blaikie bc744272f8 Fix -Wunused-variable in non-Asserts build
llvm-svn: 270118
2016-05-19 20:44:22 +00:00
Chris Bieneman f590c971c7 [obj2yaml] [yaml2obj] Support for MachO Load Command data
Many of the MachO load commands can have data appended after the command structure. This data is frequently strings, but can actually be anything. This patch adds support for three optional fields on load command yaml descriptions.

The new PayloadString YAML field is populated with the data after load commands known to have strings as extra data.

The new ZeroPadBytes YAML field is a count of zero'd bytes after the end of the load command structure before the next command. This can apply anywhere in the file. MachO2YAML verifies that bytes are zero before populating this field, and YAML2MachO will add zero'd bytes.

The new PayloadBytes YAML field stores all bytes after the end of the load command structure before the next command if they are non-zero. This is a catch all for all unhandled bytes. If MachO2Yaml populates PayloadBytes it will not populate ZeroPadBytes, instead zero'd bytes will be in the PayloadBytes structure.

llvm-svn: 270115
2016-05-19 20:40:03 +00:00
Wei Mi 0456d9dd18 Recommit r255691 since PR26509 has been fixed.
llvm-svn: 270113
2016-05-19 20:38:03 +00:00
David Blaikie f869d3190c Simplify conditional unreachable into an assertion
llvm-svn: 270111
2016-05-19 20:28:40 +00:00
Reid Kleckner e1587bce96 Fix -Wmicrosoft-enum-value warning
llvm-svn: 270110
2016-05-19 20:20:22 +00:00
Hans Wennborg 172eee9cfc X86: Don't reset the stack after calls that don't return (PR27117)
Since the calls don't return, the instruction afterwards will never run,
and is just taking up unnecessary space in the binary.

Differential Revision: http://reviews.llvm.org/D20406

llvm-svn: 270109
2016-05-19 20:15:33 +00:00
Artem Belevich 3650bbeebc [CUDA] Do not allow non-empty destructors for global device-side variables.
According to Cuda Programming guide (v7.5, E2.3.1):
> __device__, __constant__ and __shared__ variables defined in namespace
> scope, that are of class type, cannot have a non-empty constructor or a
> non-empty destructor.

Clang already deals with device-side constructors (see D15305).
This patch enforces similar rules for destructors.

Differential Revision: http://reviews.llvm.org/D20140

llvm-svn: 270108
2016-05-19 20:13:53 +00:00
Artem Belevich 85b6f63f42 [CUDA] Split device-var-init.cu tests into separate Sema and CodeGen parts.
Codegen tests for device-side variable initialization are subset of test
cases used to verify Sema's part of the job.
Including CodeGenCUDA/device-var-init.cu from SemaCUDA makes it easier to
keep both sides in sync.

Differential Revision: http://reviews.llvm.org/D20139

llvm-svn: 270107
2016-05-19 20:13:39 +00:00
Adrian McCarthy a972d6121e Modify emitTypeInformation to use MemoryTypeTableBuilder
A baby step toward translating DIType records to CodeView.

This does not (yet) combine the record length with the record data. I'm going back and forth trying to determine if that's a good idea.

llvm-svn: 270106
2016-05-19 20:12:56 +00:00
Matthew Simpson 330a125542 [ARM, AArch64] Properly initialize InterleavedAccessPass
InterleavedAccessPass is an IR-level pass, so this change will enable testing
it with opt. This is part of D20250.

llvm-svn: 270101
2016-05-19 20:08:32 +00:00
David Majnemer 9572372a31 [Target] Don't return a std::string in getRegAsmName
getRegAsmName ends up making a copy of the register's name in order to
make a lower-case version of it.  This is bad because
getRegForInlineAsmConstraint, it's sole caller, does a lowercase
comparison anyway.

This resulted in a significant regression in compile time for the Linux
kernel because getRegAsmName is called in a loop by
getRegForInlineAsmConstraint.

Instead, forgo the call to lower in getRegAsmName and have it return a
StringRef.

No functionality change is intended.

llvm-svn: 270099
2016-05-19 20:03:16 +00:00
Sean Callanan 37e2664f30 Fixed a crash if a FunctionDecl couldn't be imported.
llvm-svn: 270097
2016-05-19 19:23:37 +00:00
Sanjay Patel c48a879ef8 [x86] add tests for urem lowering
llvm-svn: 270096
2016-05-19 18:57:54 +00:00
Rafael Espindola 46107b9e62 Remember the relocation model. NFC.
This avoids passing a TargetMachine in a few places.

llvm-svn: 270095
2016-05-19 18:49:29 +00:00
Artem Belevich 31c3bad499 [CUDA] Enable fusing FP ops (-ffp-contract=fast) for CUDA by default.
This matches default nvcc behavior and gives substantial
performance boost on GPU where fmad is much cheaper compared to add+mul.

Differential Revision: http://reviews.llvm.org/D20341

llvm-svn: 270094
2016-05-19 18:44:45 +00:00
Rafael Espindola cb2d266360 Style fixes. NFC.
llvm-svn: 270093
2016-05-19 18:34:20 +00:00
Zhan Jun Liau e327fa12a1 [SystemZ] Test commit - remove idea from README
Remove a comment about not supporting LRVH/STRVH from the README
LRVH/STRVH are being generated as of r269688

llvm-svn: 270092
2016-05-19 18:30:17 +00:00
Matt Arsenault 4318ea354a AMDGPU: Also look for s_cbranch_vccz
llvm-svn: 270091
2016-05-19 18:20:25 +00:00
Dima Stepanov fb8978fc6a Fix the function to set the section VMA/LMA fields in case of using
the linker script. The cycle in the ELF/LinkerScript.cpp:assignAddresses()
routine will be used to go through all the sections and set all the
addresses correctly.

Add new test to check this case.

llvm-svn: 270090
2016-05-19 18:15:54 +00:00