Commit Graph

359038 Commits

Author SHA1 Message Date
River Riddle 5d699d18b3 [mlir] Remove locking for dialect/operation registration.
Moving forward dialects should only be registered in a thread safe context. This matches the existing usage we have today, but it allows for removing quite a bit of expensive locking from the context.

This led to ~.5 a second compile time improvement when running one conversion pass on a very large .mlir file(hundreds of thousands of operations).

Differential Revision: https://reviews.llvm.org/D82595
2020-06-30 15:52:33 -07:00
River Riddle 2e2cdd0a52 [mlir] Refactor InterfaceGen to support generating interfaces for Attributes and Types.
This revision adds support to ODS for generating interfaces for attributes and types, in addition to operations. These interfaces can be specified using `AttrInterface` and `TypeInterface` in place of `OpInterface`. All of the features of `OpInterface` are supported except for the `verify` method, which does not have a matching representation in the Attribute/Type world. Generating these interface can be done using `gen-(attr|type)-interface-(defs|decls|docs)`.

Differential Revision: https://reviews.llvm.org/D81884
2020-06-30 15:52:33 -07:00
River Riddle 9fbb2de8e4 [mlir] Add support for defining Traits and Interfaces on Attributes/Types.
This revisions add mechanisms to Attribute/Type for attaching traits and interfaces. The mechanisms are modeled 1-1 after those for operations to keep the system consistent. AttrBase and TypeBase now accepts a trailing list of `Trait` types that will be attached to the object. These traits should inherit from AttributeTrait::TraitBase and TypeTrait::TraitBase respectively as necessary. A followup commit will refactor the interface gen mechanisms in ODS to support Attribute/Type interface generation and add tests for the mechanisms.

Differential Revision: https://reviews.llvm.org/D81883
2020-06-30 15:52:32 -07:00
Sam McCall ffa63dde8e [clangd] Run formatting operations asynchronously.
Summary:
They don't need ASTs or anything, so they should still run immediately.

These were sync for historical reasons (they predate clangd having a pervasive
threading model). This worked ok as they were "cheap".
Aside for consistency, there are a couple of reasons to make them async:
 - they do IO (finding .clang-format) so aren't trivially cheap
 - having TUScheduler involved in running these tasks means we can use it as
   an injection point for configuration.
   (TUScheduler::run will need to learn about which file is being operated on,
   but that's an easy change).
 - adding the config system adds more potential IO, too

Reviewers: kbobyrev

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82642
2020-07-01 00:52:08 +02:00
Arthur Eubanks b210c9899b [BasicAA] Replace -basicaa with -basic-aa in polly
Follow up to https://reviews.llvm.org/D82607.
2020-06-30 15:50:17 -07:00
Kit Barton 4c2c6c7cc1 [PPC][NFC] Replace TM with Subtarget->getTargetMachine() in preparation for GlobalISel.
There are two uses of TM (instance of TargetMachine) when checking options.
These will not work once we enable GlobalISel. This patch replaces those uses of
TM with Subtarget->getTargetMachine().
2020-06-30 17:19:24 -05:00
Alex Lorenz c8f1d442d0 split darwin-version-min-load-command.s into Arm64 subtest to avoid failures
Some buildbot configurations don't build the arm64 backend, so the test-cases
that need arm64 should go into the aarch64 subdirectory.
2020-06-30 14:49:04 -07:00
Craig Topper 1df1186ab1 [X86] Use some preprocessor macros to reduce the very similar repeated code in getVPTESTMOpc. NFCI
This function picks X86 opcode name based on type, masking,
and whether not a load or broadcast has been folded using multiple
switch statements. The contents of the switches mostly just vary in
a few characters in the instruction name. So use some macros to
build the instruction names to reduce the repetiveness.
2020-06-30 14:38:22 -07:00
Amy Kwan 73377c4597 [PowerPC][Power10] Add Vector Splat Imm/Permute/Blend/Shift Double Bit Imm Definitions and MC Tests
This patch adds the td definitions and asm/disasm tests for the
following instructions:

XXSPLTIW
XXSPLTIDP
XXSPLTI32DX
XXPERMX
XXBLENDVB
XXBLENDVH
XXBLENDVW
XXBLENDVD
VSLDBI
VSRDBI

Differential Revision: https://reviews.llvm.org/D82896
2020-06-30 16:07:21 -05:00
Zixu Wang 89a0c4066b [clang][diagnostics] Add '-Wundef-prefix' warning option
Summary:
Add an `-Wundef-prefix=<arg1>,<arg2>...` option, which is similar to `-Wundef`, but only give warnings for undefined macros with the given prefixes.

Reviewers: ributzka, steven_wu, cishida, bruno, arphaman, rsmith

Reviewed By: ributzka, arphaman

Subscribers: riccibruno, dexonsmith, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80751

This patch was authored by Zixu Wang <zixu_wang@apple.com>
2020-06-30 13:57:47 -07:00
Vince Bridgers ecae672ac2 [ASTImporter] Fix AST import crash for a friend decl
Summary:
Running CTU testing, we found that VisitFriendDecl in
ASTImporterLookup.cpp was not handling a particular non-dependent case,
so we reached the llvm_unreachable case.

The FriendDecl and QualType not handled were:

(gdb) p D->dump()
FriendDecl 0x7ffff5cf1958
< <<srcfile>>, 'nlohmann::basic_json<std::map, std::vector,
   std::basic_string<char>, bool, long long, unsigned long long, double,
   std::allocator, adl_serializer, std::vector<unsigned char,
   std::allocator<unsigned char>>>':'nlohmann::basic_json<std::map,
   std::vector, std::basic_string<char>, bool, long long, unsigned long
   long, double, std::allocator, adl_serializer, std::vector<unsigned char,
   std::allocator<unsigned char>>>'

(gdb) p Ty->dump()
SubstTemplateTypeParmType 0x7ffff5cf0df0 'class
nlohmann::basic_json<std::map, std::vector, class
   std::basic_string<char>, _Bool, long long, unsigned long long, double,
   std::allocator, adl_serializer, class std::vector<unsigned char, class
   std::allocator<unsigned char> > >' sugar
|-TemplateTypeParmType 0x7ffff643ea40 'BasicJsonType' dependent depth 0
index 0
| `-TemplateTypeParm 0x7ffff643e9e8 'BasicJsonType'
`-RecordType 0x1012ad20 'class nlohmann::basic_json<std::map,
std::vector, class std::basic_string<char>, _Bool, long long, unsigned
long long, double, std::allocator, adl_serializer, class
std::vector<unsigned char, class std::allocator<unsigned char> > >'
  `-ClassTemplateSpecialization 0x1012ab68 'basic_json'

Reviewers: martong, a.sidorin

Reviewed By: martong

Subscribers: kristof.beyls, rnkovacs, teemperor, cfe-commits, dkrupp

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82882
2020-06-30 15:57:01 -05:00
Eli Friedman df1f371e28 [SVE] Reject vector struct indexes for scalable vectors.
It's messy to pattern-match, and completely unnecessary: scalar indexes
work equally well.

See also discussion on D81620 and D82061.

Differential Revision: https://reviews.llvm.org/D82430
2020-06-30 13:52:38 -07:00
Louis Dionne 1eb211ada1 [libc++] Translate the std Lit parameter to the DSL 2020-06-30 16:51:20 -04:00
Julian Lettner 32791937d7 [Sanitizer] Remove obsolete assert for OS version checking on Darwin
macOS versions do not necessarily start with 10 anymore.  Remove an
obsolete assert.
2020-06-30 13:36:10 -07:00
Eli Friedman 0ec712afec [BitcodeReader] Fix DelayedShuffle handling for ConstantExpr shuffles.
The indexing was messed up, so the result was completely broken.

Shuffle constant exprs are rare in practice; without vscale types,
constant folding generally elminates them. So sort of hard to trip over.

Fixes regression from D72467.

(Recommitting after fix for memory leak.)

Differential Revision: https://reviews.llvm.org/D80330
2020-06-30 13:23:07 -07:00
Matt Arsenault f7b2997ad6 Sparc: Use Register 2020-06-30 16:14:23 -04:00
Matt Arsenault 08649f0a9d RISCV: Don't store function in RISCVMachineFunctionInfo
Targets should not depend on the MachineFunction state during the
MachineFunctionInfo construction.
2020-06-30 16:08:51 -04:00
Matt Arsenault d9f0c3663f PPC: Don't store function in PPCFunctionInfo
Continue migrating targets from depending on the MachineFunction
during the initial construction.
2020-06-30 16:08:51 -04:00
Matt Arsenault 669bb3111f Mips: Don't store MachineFunction in MipsFunctionInfo
It will soon be disallowed to depend on MachineFunction state on
construction.
2020-06-30 16:08:51 -04:00
Davide Italiano 983a4b520e Skip arm-(fp|gp)-read.test on Darwin.
Our assembler doesn't seem to grok floating point literals.

<rdar://problem/64951608>
2020-06-30 12:53:20 -07:00
Davide Italiano 4f1f253ce5 [TestReturnValue] Skip based on architecutre, not platform. 2020-06-30 12:48:23 -07:00
Jonas Devlieghere 2501e86acd [lldb/Scalar] Fix undefined behavior
Fix UBSan error detected in TestDataFormatterObjCCF.py and
TestDataFormatterObjCNSDate.py:

Scalar.cpp:698:27: runtime error: -4.96303e+08 is outside the range of
representable values of type 'unsigned long long'.
2020-06-30 12:41:41 -07:00
Eli Friedman 15440191b5 [IR] Delete llvm::Constants using the correct type.
In most cases, this doesn't have much impact: the destructors just call
the base class destructor anyway.  A few subclasses of ConstantExpr
actually store non-trivial data, though. Make sure we clean up
appropriately.

This is sort of ugly, but I don't see a good alternative given the
constraints.

Issue found by asan buildbots running the testcase for D80330.

Differential Revision: https://reviews.llvm.org/D82509
2020-06-30 12:37:53 -07:00
Florian Hahn 1ccc49924a [AArch64] Add getCFInstrCost, treat branches as free for throughput.
D79164/2596da31740f changed getCFInstrCost to return 1 per default.
AArch64 did not have its own implementation, hence the throughput cost
of CFI instructions is overestimated. On most cores, most branches should
be predicated and essentially free throughput wise.

This restores a 9% performance regression on a SPEC2006 benchmark on
AArch64 with -O3 LTO & PGO.

This patch effectively restores pre 2596da3174 behavior for AArch64
and undoes the AArch64 test changes of the patch.

Reviewers: samparker, dmgreen, anemet

Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D82755
2020-06-30 20:34:04 +01:00
Alex Zinenko 4ab4398045 [mlir] minor tweaks in standard-to-llvm lowering
Fix a typo in the documentation and simplify the condition to drop
braces. Addresses post-commit review of https://reviews.llvm.org/D82647.
2020-06-30 21:19:19 +02:00
Craig Topper 3537939cda [X86] Move frontend CPU feature initialization to a look up table based implementation. NFCI
This replaces the switch statement implementation in the clang's
X86.cpp with a lookup table in X86TargetParser.cpp.

I've used constexpr and copy of the FeatureBitset from
SubtargetFeature.h to store the features in a lookup table.
After the lookup the bitset is translated into strings for use
by the rest of the frontend code.

I had to modify the implementation of the FeatureBitset to avoid
bugs in gcc 5.5 constexpr handling. It seems to not like the
same array entry to be used on the left side and right hand side
of an assignment or &= or |=. I've also used uint32_t instead of
uint64_t and sized based on the X86::CPU_FEATURE_MAX.

I've initialized the features for different CPUs outside of the
table so that we can express inheritance in an adhoc way. This
was one of the big limitations of the switch and we had resorted
to labels and gotos.

Differential Revision: https://reviews.llvm.org/D82731
2020-06-30 12:04:58 -07:00
Craig Topper f886f07248 [X86] Some CHECK-NOTs for FMA4/TBM/XOP for znver1/znver2 in predefined-arch-macros.c
These features exist in earlier CPUs, but were deprecated on
znver1/znver2. While working on D82731 I accidentally copied
them from the earlier CPU. And nothing caught my mistake. Having
these additional checks would have helped.
2020-06-30 12:04:26 -07:00
David Green 9e49d1d9b8 [InstCombine] fma x, y, 0 -> fmul x, y
If the addend of the fma is zero, common sense would suggest that we can
convert fma x, y, 0.0 to fmul x, y. This comes up with some user code
that was expecting the first fma in an unrolled loop to simplify to a
fmul.

Floating point often does not follow naive common sense though. Alive
suggests that this should be guarded by nsz (as fadd -0.0, 0.0 = 0.0).
fma x, y, -0.0 is always valid.

Differential Revision: https://reviews.llvm.org/D82778
2020-06-30 19:56:37 +01:00
Louis Dionne 99f213e07c [libc++] Fix the Lit DSL test in case a substitution is empty 2020-06-30 14:52:51 -04:00
Valentin Clement 1a70077b5a [openmp] Move Directive and Clause helper function to tablegen
Summary:
Follow up to D81736. Move getOpenMPDirectiveKind, getOpenMPClauseKind, getOpenMPDirectiveName and
getOpenMPClauseName to the new tablegen code generation. The code is generated in a new file named OMP.cpp.inc

Reviewers: jdoerfert, jdenny, thakis

Reviewed By: jdoerfert, jdenny

Subscribers: mgorny, yaxunl, hiraditya, guansong, sstefan1, llvm-commits, thakis

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82405
2020-06-30 14:51:59 -04:00
Marius Brehler 0f43fce783 [mlir] Fix case in MLIRGPUtoGPURuntimeTransforms
Summary:
This changes the casing of MLIRGPUtoGPURuntimeTransforms to be consistent
with other transform libraries.

Differential Revision: https://reviews.llvm.org/D82841
2020-06-30 20:48:47 +02:00
Alex Lorenz 24a1447b02 [macho] emit LC_BUILD_VERSION load command for supported OSes and platforms
This change lets LLVM use the LC_BUILD_VERSION command when building for macOS 10.14, iOS 12, tvOS 12, and watchOS 5.
Additionally, this change ensures that new platforms like Apple Silicon macOS / Mac Catalyst,
and simulators running on Apple Silicon alway use LC_BUILD_VERSION with the OS version set to the
minimum supported OS version if the deployment target version is older.

Differential Revision: https://reviews.llvm.org/D82836
2020-06-30 11:48:17 -07:00
Marius Brehler 7099d8e4f7 [mlir] Fix case in MLIRGPUtoNVVMTransforms
Summary:
This changes the casing of MLIRGPUtoNVVMTransforms to be consistent
with other transform libraries.

Reviewers: stephenneuendorffer, herhut

Reviewed By: herhut

Subscribers: jholewinski, mgorny, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82842
2020-06-30 20:44:25 +02:00
Marius Brehler cf6ed682f0 [mlir] Fix case in MLIRGPUtoROCDLTransforms
Summary:
This changes the casing of MLIRGPUtoROCDLTransforms to be consistent
with other transform libraries.

Differential Revision: https://reviews.llvm.org/D82843
2020-06-30 20:43:15 +02:00
Jonas Devlieghere 66d9c0d4fc [lldb/Test] Skip TestIOHandlerResizeNoEditline with reproducers 2020-06-30 11:40:17 -07:00
Nathan James a06a5ed978
[clang-tidy] Added option to readability-else-after-return
Added a 'RefactorConditionVariables' option to control how the check handles condition variables

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D82824
2020-06-30 19:34:45 +01:00
Francesco Petrogalli d54e4dded7 [sve][acle] Enable feature macros for SVE ACLE extensions.
Summary:
The following feature macros have been added:

__ARM_FEATURE_SVE_BF16

__ARM_FEATURE_SVE_MATMUL_INT8

__ARM_FEATURE_SVE_MATMUL_FP32

__ARM_FEATURE_SVE_MATMUL_FP64

The driver has been updated to enable them accordingly to the value of
the target feature passed at command line.

The SVE ACLE tests using the macros have been modified to work with
the target feature instead of passing the macro at command line.

Reviewers: sdesmalen, efriedma, c-rhodes, kmclaughlin, SjoerdMeijer, rengolin

Subscribers: tschuett, kristof.beyls, rkruppe, psnobl, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82623
2020-06-30 18:33:03 +00:00
Sameer Arora 2bdcd8b14f [llvm-install-name-tool] Add -change option
Implement `-change` option for install-name-tool. The behavior exactly
matches that of cctools. Depends on D82410.

Reviewed By: jhenderson, smeenai

Differential Revision: https://reviews.llvm.org/D82613
2020-06-30 11:28:53 -07:00
Sameer Arora ca518c4918 [llvm-install-name-tool] Add -id option
Implement `-id` option for install-name-tool. Differences from cctool's
behavior:
 - Does **NOT** throw an error if multiple -id options are specified.
    Instead, picks the last one.
 - Throws an error in case empty id is specified.

Reviewed By: jhenderson, smeenai

Differential Revision: https://reviews.llvm.org/D82410
2020-06-30 11:28:53 -07:00
Reid Kleckner b7402edce3 [PDB] Defer public serialization until PDB writing
This reduces peak memory on my test case from 1960.14MB to 1700.63MB
(-260MB, -13.2%) with no measurable impact on CPU time. I'm currently
working with a publics stream that is about 277MB. Before this change,
we would allocate 277MB of heap memory, serialize publics into them,
hold onto that heap memory, open the PDB, and commit into it.  After
this change, we defer the serialization until commit time.

In the last change I made to public writing, I re-sorted the list of
publics multiple times in place to avoid allocating new temporary data
structures. Deferring serialization until later requires that we don't
reorder the publics. Instead of sorting the publics, I partially
construct the hash table data structures, store a publics index in them,
and then sort the hash table data structures. Later, I replace the index
with the symbol record offset.

This change also addresses a FIXME and moves the list of global and
public records from GSIHashStreamBuilder to GSIStreamBuilder. Now that
publics aren't being serialized, it makes even less sense to store them
as a list of CVSymbol records. The hash table used to deduplicate
globals is moved as well, since that is specific to globals, and not
publics.

Reviewed By: aganea, hans

Differential Revision: https://reviews.llvm.org/D81296
2020-06-30 11:28:04 -07:00
Sanjay Patel 09b8dbf70c [PhaseOrdering][NewPM] update test that silently showed bug with SpeculativeExecutionPass; NFC
See D82735 / rG1a6cebb4d12c744699e23624f8afda5cbe216fe6
2020-06-30 14:22:20 -04:00
Adrian Prantl 0da0437b2a Improve the detection of iOS/tvOS/watchOS simulator binaries in
debugserver and lldb

This patch improves the heuristics for correctly identifying simulator binaries on Darwin and adds support for simulators running on Apple Silicon.

rdar://problem/64046344

Differential Revision: https://reviews.llvm.org/D82616
2020-06-30 11:22:03 -07:00
Christopher Tetreault ab35ba5742 [SVE] Remove calls to VectorType::getNumElements from AArch64
Reviewers: efriedma, paquette, david-arm, kmclaughlin

Reviewed By: david-arm

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82214
2020-06-30 11:17:50 -07:00
Louis Dionne 73370b2c0c [libc++] Add missing include in test 2020-06-30 14:16:47 -04:00
Christopher Tetreault 9b500e564a [SVE] Remove calls to VectorType::getNumElements from ExecutionEngine
Reviewers: efriedma, lhames, sdesmalen, fpetrogalli

Reviewed By: lhames, sdesmalen

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82211
2020-06-30 11:05:38 -07:00
Eric Christopher 8164f69e4c Update the phabricator docs to reflect the monorepo change.
Patch by Nathan Froyd!

Differential Revision: https://reviews.llvm.org/D82389
2020-06-30 10:53:38 -07:00
Louis Dionne ce6153a528 [libc++] Split dylib instantiations for deprecated std::random_shuffle into a separate source file
That makes it easier to exclude from the build if one wants to build libc++
without support for the deprecated std::random_shuffle.
2020-06-30 13:50:17 -04:00
Tim Keith 98202edacb [flang] Silence some warnings from clang-tidy
Disable some of the warnings from clang-tidy, in particular,
`readability-identifier-naming`. They add clutter to reviews.

Differential Revision: https://reviews.llvm.org/D82795
2020-06-30 10:15:12 -07:00
Hsiangkai Wang a7b0f39185 [MVT] Add new MVT types for RISC-V vector.
In RISC-V vector extension, users could group multiple vector registers
as one pseudo register. In mixed width operations, users could use
partial vector registers to reduce the register pressure. The parameter
to control register grouping and partial use is called LMUL. LMUL is a
part of the type. So, we have a bunch of vector types. In order to
support all these types, we need new MVT types in LLVM. In this patch, I
added several MVT types that are used in RISC-V vector implementation.
This is a standalone patch for MVT types without RISC-V related implementation.

Differential revision: https://reviews.llvm.org/D81724
2020-07-01 01:07:50 +08:00
David Green 787b1a4746 [InstCombine] New FMA tests and regenerate tests. NFC 2020-06-30 18:05:13 +01:00