Commit Graph

374198 Commits

Author SHA1 Message Date
Thomas Preud'homme 507bbc45bb [AST][NFC] Silence GCC warning about broken strict aliasing rules
The deserialize() method would trigger the following warning on GCC <7:

   warning: dereferencing type-punned pointer will break
       strict-aliasing rules [-Wstrict-aliasing]

       ParamIdx P(*reinterpret_cast<ParamIdx *>(&S));
                                                  ^

&S was previously reinterpret_casted from a ParamIdx into a SerialType,
it is therefore safe to cast back into a ParamIdx. Similar to what was
done in D50608, we replace it with two static_cast via void * which
silences the warning and presumably makes GCC understand that no
strict-aliasing violation is happening.

No functional change intended.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D92384
2020-12-04 14:34:51 +00:00
Hansang Bae c4a22224d9 [OpenMP] Add __kmpc_omp_target_task_alloc to dllexport
This patch enables use of the entry on Windows.

Differential Revision: https://reviews.llvm.org/D92618
2020-12-04 08:11:14 -06:00
Nicolas Vasilache a1cd559ce5 [mlir][Linalg] Properly use distribution options.
Let tiling to scf.for actually use the distribution method.
For now only Cyclic is supported.

Differential Revision: https://reviews.llvm.org/D92653
2020-12-04 14:00:54 +00:00
Nico Weber 16b1f6e385 [mac/lld] Add support for the LC_LINKER_OPTION load command in o files
clang puts `-framework CoreFoundation` in this load command for files
that use @available / __builtin_available. Without support for this,
binaries that don't explicitly link to CoreFoundation fail to link.

Differential Revision: https://reviews.llvm.org/D92624
2020-12-04 08:46:53 -05:00
Yaxun (Sam) Liu 0519e1ddb3 [HIP] Fix bug in driver about wavefront size
The static variable causes it only initialized once and take
the same value for different GPU archs, whereas they
may be different for different GPU archs, e.g. when
there are both gfx900 and gfx1010.

Removing static fixes that.

Differential Revision: https://reviews.llvm.org/D92628
2020-12-04 08:36:52 -05:00
Christian Sigg dcec2ca5bd Remove typeConverter from ConvertToLLVMPattern and use the existing one in ConversionPattern.
ftynse

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D92564
2020-12-04 14:27:16 +01:00
Georgii Rymar 44794cde18 [llvm-profgen] - Fix compilation issue after ELFFile<ELFT> interface update.
`D92560` changed `ELFObjectFile::getELFFile` to return reference.
2020-12-04 16:09:25 +03:00
Georgii Rymar ffbce65f95 [lib/Object, tools] - Make ELFObjectFile::getELFFile return reference.
We always have an object, so we don't have to return a pointer.

Differential revision: https://reviews.llvm.org/D92560
2020-12-04 16:02:29 +03:00
Kazushi (Jam) Marukawa e936d1e113 [VE] Add vfadd, vfsub, vfmul, and vfdiv intrinsic instructions
Add vfadd, vfsub, vfmul, and vfdiv intrinsic instructions and
regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D92649
2020-12-04 21:58:51 +09:00
Simon Pilgrim b96a521077 [X86] LowerRotate - enable custom lowering of ROTL/ROTR vXi16 on VBMI2 targets. 2020-12-04 12:16:59 +00:00
Cullen Rhodes 333de690ea [IR] Disallow scalable vectors in ShuffleVectorInst::isExtractSubvectorMask
It's not possible to express an extract subvector shuffle mask for
a scalable vector.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D92312
2020-12-04 11:30:51 +00:00
Simon Pilgrim d073805be6 [X86] LowerRotate - VBMI2 targets can lower vXi16 rotates using funnel shifts.
Ideally we'd do this inside DAGCombine but until we can make the FSHL/FSHR opcodes legal for VBMI2 it won't help us.
2020-12-04 11:29:23 +00:00
Haojian Wu 445289aa63 [clangd] Fix an assertion violation in rename.
NamedDecl::getName() asserts the name must be an identifier.

Differential Revision: https://reviews.llvm.org/D92642
2020-12-04 12:23:26 +01:00
Simon Pilgrim df1ddc4234 [X86] Let VBMI2 non-VLX targets still use funnel shifts instructions 2020-12-04 11:06:43 +00:00
Georgii Rymar 7ac06444b8 [yaml2obj,obj2yaml] - Make Symbol::Section field optional.
This is similar to what we did earlier for fields of the Section class.

When a field is optional we can use the =<none> syntax in macros.

This was splitted from D92478.

Differential revision: https://reviews.llvm.org/D92565
2020-12-04 13:45:47 +03:00
Raphael Isemann e97b991eef [lldb] Remove LLDB session dir and just store test traces in the respective test build directory
Test runs log some of their output to files inside the LLDB session dir. This
session dir is shared between all tests, so all the tests have to make sure they
choose a unique file name inside that directory. We currently choose by default
`<test-class-name>-<test-method-name>` as the log file name. However, that means
that if not every test class in the test suite has a unique class name, then we
end up with a race condition as two tests will try to write to the same log
file.

I already tried in D83767 changing the format to use the test file basename
instead (which we already require to be unique for some other functionality),
but it seems the code for getting the basename didn't work on Windows.

This patch instead just changes that dotest stores the log files in the build
directory for the current test. We know that directory is unique for this test,
so no need to generate some unique file name now. Also removes all the
environment vars and parameters related to the now unused session dir.

The new log paths now look like this for a failure in 'TestCppOperators`:
```
./lldb-test-build.noindex/lang/cpp/operators/TestCppOperators.test_dwarf/Failure.log
./lldb-test-build.noindex/lang/cpp/operators/TestCppOperators.test_dsym/Failure.log
./lldb-test-build.noindex/lang/cpp/operators/TestCppOperators.test_gmodules/Failure.log
```

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D92498
2020-12-04 11:43:10 +01:00
Georgii Rymar 5c650d3d9b [llvm-readobj] - Report unique warnings in printProgramHeaders.
This converts `reportWarning` -> `reportUniqueWarning`

Differential revision: https://reviews.llvm.org/D92568
2020-12-04 13:35:44 +03:00
Raphael Isemann 594308c7ad [lldb][NFC] Rename TypeSystemClang::GetScratch to ScratchTypeSystemClang::GetForTarget
Also add some documentation while I'm at it.
2020-12-04 11:29:08 +01:00
QingShan Zhang c25b039e21 [PowerPC] Fix the regression caused by commit 9c588f53fc
Add a TypeLegal check for MVT::i1 and add the test.
2020-12-04 10:22:13 +00:00
Simon Pilgrim 6f4ee6f870 [DAGCombiner] Use const APInt& for getConstantOperandAPInt results. NFCI.
Avoid unnecessary instantiation.

Noticed while removing unnecessary autos
2020-12-04 09:44:58 +00:00
Simon Pilgrim 8eedd18fcb [X86] Remove unnecessary bitcast. NFC.
The X86ISD::SUBV_BROADCAST node is already VT
2020-12-04 09:44:57 +00:00
Simon Pilgrim 9c766b8418 [X86] Regenerate midpoint-int.ll tests
Replace X32 check prefixes with X86 - X32 is generally used for gnux triple tests
2020-12-04 09:44:56 +00:00
Martin Storsjö 0b71bf7939 [libcxx] [test] Add a test for conversions between wchar_t, utf8, char16_t, char32_t and windows native narrow code pages
Differential Revision: https://reviews.llvm.org/D91133
2020-12-04 11:37:05 +02:00
Martin Storsjö 6be11e35d5 [libcxx] Implement c++2a char8_t input/output of std::filesystem::path
This implements the std::filesystem parts of P0482 (which is already
marked as in progress), and applies the actions that are suggested
in P1423.

Differential Revision: https://reviews.llvm.org/D90222
2020-12-04 11:37:05 +02:00
Martin Storsjö c17fdca188 [clang] [Headers] Use the corresponding _aligned_free or __mingw_aligned_free in _mm_free
Differential Revision: https://reviews.llvm.org/D92570
2020-12-04 11:34:12 +02:00
Evgeniy Brevnov 061cebb46f [NFC][NARY-REASSOCIATE] Restructure code to aviod isPotentiallyReassociatable
Currently we have to duplicate the same checks in isPotentiallyReassociatable and tryReassociate. With simple pattern like add/mul this may be not a big deal. But the situation gets much worse when I try to add support for min/max. Min/Max may be represented by several instructions and can take different forms. In order reduce complexity for upcoming min/max support we need to restructure the code a bit to avoid mentioned code duplication.

Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D88286
2020-12-04 16:19:43 +07:00
Evgeniy Brevnov f61c29b3a7 [NARY-REASSOCIATE] Simplify traversal logic by post deleting dead instructions
Currently we delete optimized instructions as we go. That has several negative consequences. First it complicates traversal logic itself. Second if newly generated instruction has been deleted the traversal is repeated from scratch.

But real motivation for the change is upcoming change with support for min/max reassociation. Here we employ SCEV expander to generate code. As a result newly generated instructions may be inserted not right before original instruction (because SCEV may do hoisting) and there is no way to know 'next' instruction.

Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D88285
2020-12-04 16:17:50 +07:00
Raphael Isemann 973f3907a4 [lldb][NFC] Rename TypeSystemClangForExpressions to ScratchTypeSystemClang
We keep referring to the single object created by this class as
'scratch AST/Context/TypeSystem' so at this point we might as well rename the
class. It's also not involved at all in expression evaluation, so the
'ForExpressions' prefix is a bit misleading.
2020-12-04 09:41:42 +01:00
Haojian Wu 5b9fc44d81 [clang] Add a C++17 deduction guide testcase.
From https://bugs.llvm.org/show_bug.cgi?id=47219.

It was crashing before the commit 1e14588d0f.

Differential Revision: https://reviews.llvm.org/D92573
2020-12-04 09:02:50 +01:00
Kazu Hirata e2fc11cf9f [JumpThreading] Call eraseBlock when folding a conditional branch
This patch teaches the jump threading pass to call BPI->eraseBlock
when it folds a conditional branch.

Without this patch, BranchProbabilityInfo could end up with stale edge
probabilities for the basic block containing the conditional branch --
one edge probability with less than 1.0 and the other for a removed
edge.

Differential Revision: https://reviews.llvm.org/D92608
2020-12-03 23:50:17 -08:00
Hanhan Wang f5f1a5c244 [mlir][Linalg] Handle fusion on tensors for projected permutation.
In the past, the reshape op can be folded only if the indexing map is
permutation in consumer's usage. We can relax to condition to be projected
permutation.

This patch still limits the fusion for scalar cases. Scalar case is a corner
case, because we need to decide where to put extra dims.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D92466
2020-12-03 23:11:29 -08:00
Kai Luo f5d52916ce [PowerPC] Pre-commit neg abs test for vector. NFC. 2020-12-04 06:52:05 +00:00
Max Kazantsev 12b6c5e682 Return "[IndVars] ICmpInst should not prevent IV widening"
This reverts commit 4bd35cdc3a.

The patch was reverted during the investigation. The investigation
shown that the patch did not cause any trouble, but just exposed
the existing problem that is addressed by the previous patch
"[IndVars] Quick fix LHS/RHS bug". Returning without changes.
2020-12-04 12:34:43 +07:00
Max Kazantsev 3df0daceb2 [IndVars] Quick fix LHS/RHS bug
The code relies on fact that LHS is the NarrowDef but never
really checks it. Adding the conservative restrictive check,
will follow-up with handling of case where RHS is a NarrowDef.
2020-12-04 12:34:42 +07:00
Fangrui Song dec1bbb47c Fix -allow-deprecated-dag-overlap in test/CodeGen/dso-local-executable.c 2020-12-03 21:24:38 -08:00
David Blaikie c4af1c8d93 PR48383: Disallow decltype(auto) in pseudodestructor calls 2020-12-03 20:41:06 -08:00
Mircea Trofin e51c2d6a74 [tools] Update update_test_prefix.py to handle %s after prefixes
Sometimes the check-prefixes is followed by %s, and we want to keep a
white space before it.

Differential Revision: https://reviews.llvm.org/D92542
2020-12-03 20:07:28 -08:00
Qiu Chaofan 9378a366b2 [NFC] [Clang] Fix ppc64le vaarg OpenMP test in CodeGen
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D92544
2020-12-04 11:29:55 +08:00
Jianzhou Zhao 80e326a8c4 [dfsan] Support passing non-i16 shadow values in TLS mode
This is a child diff of D92261.

It extended TLS arg/ret to work with aggregate types.

For a function
  t foo(t1 a1, t2 a2, ... tn an)
Its arguments shadow are saved in TLS args like
  a1_s, a2_s, ..., an_s
TLS ret simply includes r_s. By calculating the type size of each shadow
value, we can get their offset.

This is similar to what MSan does. See __msan_retval_tls and __msan_param_tls
from llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp.

Note that this change does not add test cases for overflowed TLS
arg/ret because this is hard to test w/o supporting aggregate shdow
types. We will be adding them after supporting that.

Reviewed-by: morehouse

Differential Revision: https://reviews.llvm.org/D92440
2020-12-04 02:45:07 +00:00
David Blaikie c98a7ab1b1 IntrusiveRefCntPtr: Ensure RefCount is initialized during ThreadSafeRefCountedBase copy construction
Post commit feedback on 2e83ccc2ee from Nathan James!
2020-12-03 18:43:01 -08:00
Arthur Eubanks 0173eb0faf Use isIgnored instead of checking pass name
In preparation for https://reviews.llvm.org/D92616 which will remove
angle brackets from pass manager/adaptor names.

Reviewed By: dexonsmith, thakis

Differential Revision: https://reviews.llvm.org/D92625
2020-12-03 18:37:57 -08:00
Nico Weber 305852686b [mac/lld] Run tests with -fatal_warnings by default
This helps us catch cases where we add support for a flag but forget to
remove HelpHidden from Options.td.

More explicit alternative to D92455

Differential Revision: https://reviews.llvm.org/D92575
2020-12-03 21:23:47 -05:00
Sam Clegg 1bb79875e4 [lld][WebAssembly] Set memory limits correctly for PIC + shared memory
Don't early return from layoutMemory in PIC mode before we have set the
memory limits.

This matters in particular with shared-memory + PIC because shared
memories require maximum size.

Secondly, when we need a maximum, but the user does not supply one,
default to MAX_INT rather than 0 (defaulting to zero is completely
useless and means that building with -shared didn't previously work at
all without --maximum-memory, because zero is never big enough).

This is part of an ongoing effort to enable dynamic linking with
threads in emscripten.

See https://github.com/emscripten-core/emscripten/issues/3494

Differential Revision: https://reviews.llvm.org/D92528
2020-12-03 18:14:28 -08:00
Duncan P. N. Exon Smith e763e032f8 Support: Change InMemoryFileSystem::addFileNoOwn to take a MemoryBufferRef, NFC
Found this by chance when looking at the InMemoryFileSystem API, seems
like an easy cleanup.

Differential Revision: https://reviews.llvm.org/D90893
2020-12-03 18:09:52 -08:00
River Riddle c7cae0e4fa [mlir][Attributes][NFC] Move all builtin Attribute classes to BuiltinAttributes.h
This mirrors the file structure of Types.

Differential Revision: https://reviews.llvm.org/D92499
2020-12-03 18:02:11 -08:00
River Riddle 09f7a55fad [mlir][Types][NFC] Move all of the builtin Type classes to BuiltinTypes.h
This is part of a larger refactoring the better congregates the builtin structures under the BuiltinDialect. This also removes the problematic "standard" naming that clashes with the "standard" dialect, which is not defined within IR/. A temporary forward is placed in StandardTypes.h to allow time for downstream users to replaced references.

Differential Revision: https://reviews.llvm.org/D92435
2020-12-03 18:02:10 -08:00
River Riddle e66c2e259f [mlir][NFC] Remove Function.h and Module.h in favor of BuiltinOps.h
The definitions of ModuleOp and FuncOp are now within BuiltinOps.h, making the individual files obsolete.

Differential Revision: https://reviews.llvm.org/D92622
2020-12-03 18:02:10 -08:00
Xiang1 Zhang f2e2924463 [X86] Unbind the ebx with GOT address in regcall calling convention
No register can be allocated for indirect call when it use regcall calling
convention and passed 5/5+ args.
For example:
call vreg (ag1, ag2, ag3, ag4, ag5, ...) --> 5 regs (EAX, ECX, EDX, ESI, EDI)
used for pass args, 1 reg (EBX )used for hold GOT point, so no regs can be
allocated to vreg.

The Intel386 architecture provides 8 general purpose 32-bit registers. RA
mostly use 6 of them (EAX, EBX, ECX, EDX, ESI, EDI). 5 of this regs can be
used to pass function arguments (EAX, ECX, EDX, ESI, EDI).
EBX used to hold the GOT pointer when making function calls via the PLT.
ESP and EBP usually be "reserved" in register allocation.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D91020
2020-12-04 10:00:13 +08:00
David Blaikie 2e83ccc2ee ADT: Support copying of IntrusiveRefCntPtr objects
This was partially supported but untested for RefCountedBase (the
implicit copy assignment would've been problematic - so delete that) and
unsupported (would not have compiled, because std::atomic is
non-copyable) for ThreadSafeRefCountedBase (implement similar support
to RefCountedBase)

Fix the test that had a copy ctor for the derived object but called
RefCountBase's default ctor from that copy ctor - which meant it wasn't
actually testing RefCountBase's copy semantics.
2020-12-03 17:42:32 -08:00
Aart Bik c95acf052b [mlir][vector][avx512] move avx512 lowering pass into general vector lowering
A separate AVX512 lowering pass does not compose well with the regular
vector lowering pass. As such, it is at risk of code duplication and
lowering inconsistencies. This change removes the separate AVX512 lowering
pass and makes it an "option" in the regular vector lowering pass
(viz. vector dialect "augmented" with AVX512 dialect).

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D92614
2020-12-03 17:23:46 -08:00