8e129296fe
Misc code refactorings:
...
* Remove unnecessary arguments now that ForceExpAbs is a method.
* Use ForceExpAbs in EmitAbsValue.
llvm-svn: 131683
2011-05-19 21:40:34 +00:00
4014e5e208
Oddly people want to use the 'r' constraint for fp constants on x86.
...
Fixes rdar://9218925
Fixes PR9601
llvm-svn: 131682
2011-05-19 21:33:47 +00:00
de745ba396
Implement the EndProlog Win64 EH method on the base MCStreamer.
...
llvm-svn: 131679
2011-05-19 21:24:54 +00:00
d0c937d4b2
This fixes one divergence between LLVM and binutils for ARM in the
...
text section.
Assume the following bit of annotated assembly:
.section .data.rel.ro,"aw",%progbits
.align 2
.LAlpha:
.long startval(GOTOFF)
.text
.align 2
.type main,%function
.align 4
main: ;;; assume "main" starts at offset 0x20
0x0 push {r11, lr}
0x4 movw r0, :lower16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-4) + 8) = -20
0x8 movt r0, :upper16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-8) + 8) = -16
0xc ... blah
.LBeta:
0x10 add r0, pc, r0
0x14 ... blah
.LGamma:
0x18 add r1, pc, r1
Above snippet results in the following relocs in the .o file for the
first pair of movw/movt instructions
00000024 R_ARM_MOVW_PREL_NC .LAlpha
00000028 R_ARM_MOVT_PREL .LAlpha
And the encoded instructions in the .o file for main: must be
00000020 <main>:
20: e92d4800 push {fp, lr}
24: e30f0fec movw r0, #65516 ; 0xffec i.e. -20
28: e34f0ff0 movt r0, #65520 ; 0xfff0 i.e. -16
However, llc (prior to this commit) generates the following sequence
00000020 <main>:
20: e92d4800 push {fp, lr}
24: e30f0fec movw r0, #65516 ; 0xffec - i.e. -20
28: e34f0fff movt r0, #65535 ; 0xffff - i.e. -1
What has to happen in the ArmAsmBackend is that if the relocation is PC
relative, the 16 bits encoded as part of movw and movt must be both addends,
not addresses. It makes sense to encode addresses by right shifting the value
by 16, but the result is incorrect for PIC.
i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case.
This change agrees with what GNU as does, and makes the PIC code run.
MC/ARM/elf-movt.s covers this case.
llvm-svn: 131674
2011-05-19 20:55:25 +00:00
1407fb4bbe
Reapply r131605. This time with a fix, which is to use NoFolder.
...
llvm-svn: 131673
2011-05-19 20:52:46 +00:00
0fc5e89c82
ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.
...
Fixes PR9934.
We really need to start tblgening the relocation info :-(
llvm-svn: 131669
2011-05-19 20:32:34 +00:00
9e6a8cca5d
Align i64 arguments to 64 bit boundaries.
...
llvm-svn: 131668
2011-05-19 20:29:48 +00:00
7e6e8951af
Implement the Win64 EH prolog instruction methods on the base MCStreamer.
...
I had to change the API slightly to avoid overloading issues.
llvm-svn: 131666
2011-05-19 19:35:55 +00:00
2b9bd38678
crc32 with 64-bit output zeros upper 32-bits. rdar://9467055
...
llvm-svn: 131664
2011-05-19 18:57:12 +00:00
4a4e5a2b55
Update some currently-disabled code, preparing for eventual use.
...
llvm-svn: 131663
2011-05-19 18:48:20 +00:00
05fd5aa1d0
Increase number of available registers when target is MIPS32.
...
llvm-svn: 131660
2011-05-19 18:25:03 +00:00
dc867ae1fc
Add comment.
...
llvm-svn: 131659
2011-05-19 18:18:39 +00:00
92ab6db6c8
Simplify CC_MipsO32 and merge it with CC_MipsO32_VarArgs. Patch by Sasa Stankovic.
...
llvm-svn: 131657
2011-05-19 18:06:05 +00:00
74ba2623ce
Reapply 131644 including the missing header changes:
...
Introduce -fatal-assembler-warnings for the obvious purpose
llvm-svn: 131655
2011-05-19 18:00:13 +00:00
c72240bbd9
Reverting 131641 to investigate 'bot complaint.
...
llvm-svn: 131654
2011-05-19 17:54:42 +00:00
3e2f17499e
Revert r131644; it's breaking the build.
...
llvm-svn: 131653
2011-05-19 17:48:09 +00:00
4cd8856704
Turns out GAS does have Win64 EH directives. (It also supports WinCE EH.) Make
...
ours compatible with GAS.
In retrospect, I should have emailed binutils about this earlier. Thanks to
Kai Tietz for pointing out that GAS already had SEH directives.
llvm-svn: 131652
2011-05-19 17:46:39 +00:00
eca54e4e6d
80 columns.
...
llvm-svn: 131649
2011-05-19 17:34:53 +00:00
59b523169f
Introduce -fatal-assembler-warnings for the obvious purpose
...
llvm-svn: 131644
2011-05-19 17:27:01 +00:00
d1465bd68b
Fix data layout string. i64 is aligned to 64 bit boundaries.
...
llvm-svn: 131642
2011-05-19 17:21:09 +00:00
b476b0cc9f
Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be
...
pseudos. rdar://problem/8614450
llvm-svn: 131641
2011-05-19 16:59:50 +00:00
9eb5a410bd
Use the correct register class for Cell varargs spilling. This fixes all of the
...
verifier failures in the CodeGen/CellSPU tests.
llvm-svn: 131631
2011-05-19 04:44:19 +00:00
6d9e1c7c2e
Fixed sdiv and udiv for <4 x i16>. The test from r125402 still applies for this change.
...
llvm-svn: 131630
2011-05-19 04:15:07 +00:00
b4222589bf
Implement the StartChained and EndChained Win64 EH methods on MCStreamer.
...
llvm-svn: 131629
2011-05-19 04:04:13 +00:00
41025dc95b
Make CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll pass with the verifier.
...
llvm-svn: 131627
2011-05-19 03:11:06 +00:00
dadd73390f
Fix PR8828 by removing the explicit def in MovePCToLR as well as the pointless
...
piclabel operand. The operand in the tablegen definition doesn't actually turn
into an MI operand, so it just confuses anything checking the TargetInstrDesc
for the number of operands. It suffices to just have an implicit def of LR.
llvm-svn: 131626
2011-05-19 02:56:28 +00:00
58eafde58b
Reuse the TargetInstrDesc.
...
llvm-svn: 131625
2011-05-19 02:56:23 +00:00
d991ec4e68
Implement the StartProc and EndProc Win64 EH methods on the base MCStreamer.
...
Based largely on Rafael Espindola's work on CFI. Other methods soon to follow.
llvm-svn: 131623
2011-05-19 02:49:00 +00:00
964602d7ba
revert 131605 to fix PR9946.
...
llvm-svn: 131620
2011-05-19 02:26:30 +00:00
00b780e280
Correctly constrain a register class when computing frame offsets, as the Thumb2
...
add instruction takes an rGPR. This fixes the last of PR8825.
llvm-svn: 131619
2011-05-19 02:18:27 +00:00
fe5795a1f6
Revert r128961 because it didn't include a test and causes the verifier to fail
...
on CodeGen/X86/2007-05-07-InvokeSRet.ll. There is probably a bug here that was
fixed by r128961, but since there is no test or reference to a source file I have
to revert it.
llvm-svn: 131618
2011-05-19 01:56:19 +00:00
6efb64ea8e
Make the demanded bits/elements optimizations preserve debug line information.
...
I'm not sure this is quite ideal, but I can't really think of any better way to do it.
llvm-svn: 131616
2011-05-19 01:20:42 +00:00
13733a137c
Avoid a Twine that referenced a tmp (which proceded to go out of scope before
...
the Twine was used).
llvm-svn: 131612
2011-05-19 00:45:05 +00:00
3015a54813
Use IRBuilder.
...
llvm-svn: 131609
2011-05-19 00:13:33 +00:00
31458a0002
Use IRBuilder while simplifying unreachable.
...
llvm-svn: 131607
2011-05-19 00:09:21 +00:00
f1bda7c90c
Revert my previous patch. The cmake build had already been fixed.
...
llvm-svn: 131606
2011-05-19 00:02:45 +00:00
4b13f39b77
Use IRBuilder while simplifying conditional branch.
...
llvm-svn: 131605
2011-05-18 23:59:51 +00:00
41e509a33d
More instcombine cleanup, towards improving debug line info.
...
llvm-svn: 131604
2011-05-18 23:58:37 +00:00
6bfca4efd8
Restore sanity to 131601.
...
llvm-svn: 131603
2011-05-18 23:56:43 +00:00
efbdd80d77
Fix the cmake build.
...
llvm-svn: 131602
2011-05-18 23:56:40 +00:00
b098471538
Objective C functions may use a magic '\1' on the name. Handle that when
...
dealing with them in the MCJIT.
llvm-svn: 131601
2011-05-18 23:53:21 +00:00
d1b0f0f1b8
Shuffle StandardPasses.cpp into VMCore; add it to CMake.
...
llvm-svn: 131600
2011-05-18 23:51:11 +00:00
7de6c4bf75
Use IRBuilder while simplifying branch.
...
llvm-svn: 131598
2011-05-18 23:18:47 +00:00
6fc94dd687
Revert unintentional commit.
...
llvm-svn: 131597
2011-05-18 23:13:10 +00:00
1754a25977
More instcombine simplifications towards better debug locations.
...
llvm-svn: 131596
2011-05-18 23:11:30 +00:00
b9bef106c6
Add missing mayLoad / mayStore flags to instruction definitions without patterns,
...
which fixes all of the CodeGen/MBlaze verifier failures.
llvm-svn: 131595
2011-05-18 23:03:10 +00:00
9ddeceff19
Reserve the segment registers on x86 to fix verifier failures in any code that
...
uses them.
llvm-svn: 131591
2011-05-18 22:24:48 +00:00
27117af772
Remove comments as Chris requested.
...
llvm-svn: 131590
2011-05-18 22:13:51 +00:00
8b2e426555
Reserve r29 on Alpha. This fixes all verifier failures in CodeGen/Alpha.
...
llvm-svn: 131587
2011-05-18 21:54:32 +00:00
1d11720ae4
Handle perfect shuffle case that generates a vrev for vectors of floats.
...
Add test case.
llvm-svn: 131582
2011-05-18 21:44:54 +00:00
fadb03d6cc
Third pass at allowing plugins to modify default passes. This time with a tweak so that we don't depend on an uninitialized argument.
...
llvm-svn: 131581
2011-05-18 21:40:04 +00:00
dd14e0f7fa
Use IRBuilder while simplifying return instruction.
...
llvm-svn: 131580
2011-05-18 21:33:11 +00:00
492f87de4e
Fix an obvious typo in r131572.
...
llvm-svn: 131579
2011-05-18 21:29:07 +00:00
ec645bf75d
Fix more of PR8825. Now all of CodeGen/ARM passes with VerifyCoalescing turned on.
...
llvm-svn: 131578
2011-05-18 21:25:14 +00:00
3268e4d692
When forming an ICmpZero LSRUse, normalize the non-IV operand
...
of the comparison, so that the resulting expression is fully
normalized. This fixes PR9939.
llvm-svn: 131576
2011-05-18 21:02:18 +00:00
77e0610d7c
Add some more Win64 EH directives:
...
- StartChained and EndChained delimit a chained unwind area, which can contain
additional operations to be undone if an exception occurs inside of it.
- UnwindOnly declares that this function doesn't handle any exceptions. If it
has a handler, it's an unwind handler instead of an exception handler.
- Lsda declares the location and size of the LSDA, which in the Win64 EH
scheme is kept inside the UNWIND_INFO struct. Windows itself ignores the
LSDA; it's used by the Language-Specific Handler (the "Personality Function"
from DWARF).
llvm-svn: 131572
2011-05-18 20:54:10 +00:00
583805530c
Spread use of IRBuilder even more.
...
llvm-svn: 131571
2011-05-18 20:53:17 +00:00
65816ac54d
Revert r131556; it's breaking buildbots/clang tests.
...
llvm-svn: 131567
2011-05-18 20:39:27 +00:00
a7ec47d23c
Use IRBuilder while simplifying switch instruction.
...
llvm-svn: 131566
2011-05-18 20:35:38 +00:00
071634612d
Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immediate operand.
...
llvm-svn: 131565
2011-05-18 20:32:41 +00:00
0b373dca1f
Use IRBuilder while simplifying unwind.
...
llvm-svn: 131561
2011-05-18 20:01:18 +00:00
f4e832b14e
Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible.
...
llvm-svn: 131560
2011-05-18 19:59:50 +00:00
49346010f8
More instcombine cleanup aimed towards improving debug line info.
...
llvm-svn: 131559
2011-05-18 19:57:14 +00:00
13c90786e1
Second pass at allowing plugins to modify default passes. This time without bonus inter-library dependencies.
...
llvm-svn: 131556
2011-05-18 19:00:41 +00:00
522fbfea3b
Revise r131553. Just use the type of the input node and forgo the bitcast. rdar://9449159.
...
llvm-svn: 131555
2011-05-18 18:59:17 +00:00
80632c91b0
Fix an ARMTargetLowering::LowerSELECT bug: legalized result must have same type as input. Sorry test cases only trigger when dag combine is disabled. rdar://9449178
...
llvm-svn: 131553
2011-05-18 18:47:27 +00:00
2c2ea226b7
Use IRBuilder while simplifying terminator.
...
llvm-svn: 131552
2011-05-18 18:43:31 +00:00
767f6930bc
Use IRBuilder while simplifying unconditional branch.
...
llvm-svn: 131551
2011-05-18 18:28:48 +00:00
5c810ce4a3
Use IRBuilder while folding two entry PHINode.
...
llvm-svn: 131548
2011-05-18 18:16:44 +00:00
2fd66441c6
Switch more inst insertion in instcombine to IRBuilder.
...
llvm-svn: 131547
2011-05-18 18:10:28 +00:00
15ad6761da
Set up IRBuilder for use during simplification.
...
llvm-svn: 131545
2011-05-18 18:01:27 +00:00
0b43b9ee98
Switch more inst insertion in instcombine to IRBuilder.
...
llvm-svn: 131544
2011-05-18 17:58:37 +00:00
8fa6ebf975
fix typo
...
llvm-svn: 131543
2011-05-18 17:37:10 +00:00
cde9c1628c
Switch inst insertion in instcombine transform to IRBuilder.
...
llvm-svn: 131542
2011-05-18 17:31:55 +00:00
1fabbe921b
Use IRBuiler while constant folding terminator.
...
llvm-svn: 131541
2011-05-18 17:26:46 +00:00
728f6260b9
Fix inelegant initialization.
...
llvm-svn: 131538
2011-05-18 15:54:26 +00:00
bbdcd17d44
PTX: add flag to disable mad/fma selection
...
Patch by Dan Bailey
llvm-svn: 131537
2011-05-18 15:42:23 +00:00
3d9407f4eb
Revert commit 131534 since it seems to have broken several buildbots.
...
Original log entry:
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.
llvm-svn: 131536
2011-05-18 14:57:56 +00:00
c5c27ede55
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
...
code in one place.
llvm-svn: 131534
2011-05-18 12:26:38 +00:00
27bd0df352
Now that SrcBits and DestBits always represent the primitive size, rather
...
than either the primitive size or the element primitive size (in the case
of vectors), simplify the vector logic. No functionality change. There
is some distracting churn in the patch because I lined up comments better
while there - sorry about that.
llvm-svn: 131533
2011-05-18 10:59:25 +00:00
7f64656d21
Tighten up checking of the validity of casts. (1) The IR parser would
...
happily accept things like "sext <2 x i32> to <999 x i64>". It would
also accept "sext <2 x i32> to i64", though the verifier would catch
that later. Fixed by having castIsValid check that vector lengths match
except when doing a bitcast. (2) When creating a cast instruction, check
that the cast is valid (this was already done when creating constexpr
casts). While there, replace getScalarSizeInBits (used to allow more
vector casts) with getPrimitiveSizeInBits in getCastOpcode and isCastable
since vector to vector casts are now handled explicitly by passing to the
element types; i.e. this bit should result in no functional change.
llvm-svn: 131532
2011-05-18 09:21:57 +00:00
a8514535a4
Teach getCastOpcode about element-by-element vector casts. For example, "trunc"
...
can be used to turn a <4 x i64> into a <4 x i32> but getCastOpcode would assert
if you passed these types to it. Note that this strictly extends the previous
functionality: if getCastOpcode previously accepted two vector types (i.e. didn't
assert) then it still will and returns the same opcode (BitCast). That's because
before it would only accept vectors with the same bitwidth, and the new code only
touches vectors with the same length. However if two vectors have both the same
bitwidth and the same length then their element types have the same bitwidth, so
the new logic will return BitCast as before.
llvm-svn: 131530
2011-05-18 07:13:41 +00:00
48b182c3a4
In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32.
...
Updated test case and reverted change to the PerfectShuffle Table.
llvm-svn: 131529
2011-05-18 06:42:21 +00:00
8d9c99042f
Implement the Win64 EH directive methods for the assembly language streamer.
...
GAS has no such directives (not even mingw-w64 GAS has them), so I took
creative license with their names in assembly. I prefixed them all with
"w64_" to avoid namespace collisions, for example. If I discover that GAS
has taken a different approach, I'll change ours to match.
llvm-svn: 131525
2011-05-18 04:58:05 +00:00
07b5c276f4
Eliminate dead dead code elimination code.
...
llvm-svn: 131524
2011-05-18 04:51:15 +00:00
f3dc225972
Also use shrinkToUses after AdjustCopiesBackFrom().
...
The 'last use' may not be in the same basic block, and we still want a correct
live range.
llvm-svn: 131523
2011-05-18 04:51:12 +00:00
384041d0dc
While thinking about how to know where the functions' boundaries are for
...
the purposes of the Win64 EH tables, I realized we had no way to tell where
the function ends. (MASM bounds functions with PROC and ENDP keywords.)
Add a directive to delimit the end of the function, and rename the 'frame'
directive to more accurately reflect its duality with the new directive.
llvm-svn: 131522
2011-05-18 04:47:22 +00:00
595a47d462
Properly shrink live ranges after deleting dead copies. Clean up after all joined copies.
...
LiveInterval::shrinkToUses recomputes the live range from scratch instead of
removing snippets. This should avoid the problem with dangling live ranges.
Leave physreg identity copies alone. They can be created when joining a virtreg
with a physreg. They don't affect register allocation, and they will be removed
by the rewriter.
llvm-svn: 131521
2011-05-18 04:18:19 +00:00
f9839e4257
Fix typo.
...
llvm-svn: 131519
2011-05-18 02:29:50 +00:00
d7c55fe2ef
Fix more of PR8825 by correctly using rGPR registers when lowering atomic
...
compare-and-swap intrinsics.
llvm-svn: 131518
2011-05-18 02:20:07 +00:00
96254a0d53
Start trying to make InstCombine preserve more debug info. The idea here is to set the debug location on the IRBuilder, which will be then right location in most cases. This should magically give many transformations debug locations, and fixing places which are missing a debug location will usually just means changing the code creating it to use the IRBuilder.
...
As an example, the change to InstCombineCalls catches a common case where a call to a bitcast of a function is rewritten.
Chris, does this approach look reasonable?
llvm-svn: 131516
2011-05-18 01:28:27 +00:00
b9ed18f2cb
Use ReplaceInstUsesWith instead of replaceAllUsesWith where appropriate in instcombine.
...
llvm-svn: 131512
2011-05-18 00:32:01 +00:00
b849cd511b
Preseve line numbers while simplifying CFG.
...
llvm-svn: 131508
2011-05-17 23:29:05 +00:00
33a67ddbd2
Actually, the address operand of the Thumb2 LDREX / STREX instructions *can*
...
take r13, so we can just make it a GPR. This fixes PR8825.
llvm-svn: 131507
2011-05-17 23:26:20 +00:00
c5d272766f
Correct a minor problem with the Thumb2 LDREX and STREX instruction encodings. They
...
were marked as taking a tGPR when in reality they take an rGPR.
llvm-svn: 131506
2011-05-17 23:11:12 +00:00
0671ba8448
Conditionalize the format of the GCOV files by target type. Darwin uses the 4.2
...
format.
llvm-svn: 131503
2011-05-17 23:05:13 +00:00
e9692808b7
Make fast-isel miss counting in -stats and -fast-isel-verbose take terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant.
...
llvm-svn: 131502
2011-05-17 23:02:10 +00:00
abffc991dc
Misc. code cleanups.
...
llvm-svn: 131497
2011-05-17 22:22:52 +00:00
4298df6d86
Misc. code cleanups.
...
llvm-svn: 131495
2011-05-17 22:20:36 +00:00
5bd18b6638
X86 pmovsx/pmovzx ignore the upper half of their inputs.
...
rdar://problem/6945110
llvm-svn: 131493
2011-05-17 22:13:31 +00:00
c7e291b354
vrev is incorrectly defined in the perfect shuffle table. The ordering is backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case.
...
llvm-svn: 131488
2011-05-17 20:48:40 +00:00
341b38c22a
Preserve line number information.
...
llvm-svn: 131482
2011-05-17 20:00:02 +00:00
c5933f2418
Set debug loc for new load instruction.
...
llvm-svn: 131481
2011-05-17 19:43:38 +00:00
c23bcbc498
Preserve line number information.
...
llvm-svn: 131480
2011-05-17 19:43:06 +00:00
6f6b44d19d
Enable autodetect of popcnt
...
llvm-svn: 131476
2011-05-17 18:33:37 +00:00
7b27942fe7
Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.
...
This is r131438 with a couple small fixes.
llvm-svn: 131474
2011-05-17 18:29:03 +00:00
d000a2c26e
Clean up the mess created by r131467+r131469.
...
llvm-svn: 131471
2011-05-17 18:02:22 +00:00
c65d8eda7b
Revert 131467 due to buildbot complaint.
...
llvm-svn: 131469
2011-05-17 16:59:46 +00:00
3cf5308890
Fix an obscure issue in X86_64 parameter passing: if a tiny byval is
...
passed as the fifth parameter, insure it's passed correctly (in R9).
rdar://problem/6920088
llvm-svn: 131467
2011-05-17 16:45:55 +00:00
52375e6a01
Tweak cross-class coalescing to be more aggressive when the target class is small.
...
The greedy register allocator has live range splitting and register class
inflation, so it can actually fully undo this join, including restoring the
original register classes.
We still don't want to do this for long live ranges, mostly because of the high
register pressure of there are many constrained live ranges overlapping.
llvm-svn: 131466
2011-05-17 16:38:37 +00:00
0693182265
Don't include information about the build into the information returned by
...
getHostTriple. This fixes a 32 bit clang running on a 64 bit ubuntu.
llvm-svn: 131463
2011-05-17 15:26:34 +00:00
d8edb1d5cc
Fix a bug in PerformEXTRACT_VECTOR_ELTCombine. The code created an ADD SDNode
...
with two different types, in cases where the index and the ptr had different
types.
llvm-svn: 131461
2011-05-17 08:31:57 +00:00
56a42ebf15
Update comment.
...
llvm-svn: 131459
2011-05-17 08:16:14 +00:00
a1d9e29552
Support XOR and AND optimization with no return value.
...
Finishes off rdar://8470697
llvm-svn: 131458
2011-05-17 08:10:18 +00:00
abfe3131e3
Couple less magic numbers.
...
llvm-svn: 131457
2011-05-17 07:50:41 +00:00
eb47a2a1e5
Make this code a little less magic number laden.
...
llvm-svn: 131456
2011-05-17 07:47:55 +00:00
1e81f57bf0
add a note
...
llvm-svn: 131455
2011-05-17 07:22:33 +00:00
7335e8a720
Back out r131444 and r131438; they're breaking nightly tests. I'll look into
...
it more tomorrow.
llvm-svn: 131451
2011-05-17 02:36:59 +00:00
83ba150f3a
Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.
...
llvm-svn: 131438
2011-05-17 00:13:47 +00:00
97f0cf32ea
@llvm.lifetime.begin acts as a load, not @llvm.lifetime.end.
...
llvm-svn: 131437
2011-05-17 00:05:49 +00:00
4edf17d91f
Teach LiveInterval::isZeroLength about null SlotIndexes.
...
When instructions are deleted, they leave tombstone SlotIndex entries.
The isZeroLength method should ignore these null indexes.
This causes RABasic to sometimes spill a callee-saved register in the
abi-isel.ll test, so don't run that test with -regalloc=basic. Prioritizing
register allocation according to spill weight can cause more registers to be
used.
llvm-svn: 131436
2011-05-16 23:50:05 +00:00
4e983166bc
Kill some dead code.
...
llvm-svn: 131431
2011-05-16 22:24:07 +00:00
d282f46c6b
Delete unused variables.
...
llvm-svn: 131430
2011-05-16 22:19:54 +00:00
d4d12d14b5
Trim #includes.
...
llvm-svn: 131429
2011-05-16 22:14:50 +00:00
ae9b1685a8
Fix whitespace and 80-column violations.
...
llvm-svn: 131428
2011-05-16 22:09:53 +00:00
a0b682db62
There is no need to force DebugLoc on a PHI at this point.
...
llvm-svn: 131427
2011-05-16 22:05:03 +00:00
e85c0dde7a
Track how many insns fast-isel successfully selects as well as how many it
...
misses.
llvm-svn: 131426
2011-05-16 21:51:07 +00:00
d4a3609d30
Remove dead code. Fix associated test to use FileCheck.
...
llvm-svn: 131424
2011-05-16 21:28:22 +00:00
8e60ff11db
Preserve debug info for unused zero extended boolean argument.
...
Radar 9422775.
llvm-svn: 131422
2011-05-16 21:24:05 +00:00
2701815ed8
Add a method I forgot in the last commit. Don't worry, this one passed
...
self-host :).
llvm-svn: 131421
2011-05-16 21:13:58 +00:00
a4d4a0162d
Make fast-isel work correctly s/uadd.with.overflow intrinsics.
...
llvm-svn: 131420
2011-05-16 21:06:17 +00:00
4c08bb450a
Fix silly typo.
...
llvm-svn: 131419
2011-05-16 20:34:53 +00:00
9ac944774f
Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon.
...
llvm-svn: 131417
2011-05-16 20:27:46 +00:00
94c31fdd31
Add a FIXME reminder to remove ForceARMElfPIC switch.
...
llvm-svn: 131411
2011-05-16 16:35:21 +00:00
e90c1cb221
sets bit 0 of the function address of thumb function in .symtab
...
("T is 1 if the target symbol S has type STT_FUNC and the
symbol addresses a Thumb instruction ;it is 0 otherwise."
from "ELF for the ARM Architecture" 4.7.1.2)
Patch by Koan-Sin Tan!
llvm-svn: 131406
2011-05-16 16:17:21 +00:00
71f8b08a80
Extra refactoring noticed by Eli Friedman.
...
llvm-svn: 131405
2011-05-16 15:48:45 +00:00
2050af838d
Don't do tail calls in a function that call setjmp. The stack might be
...
corrupted when setjmp returns again.
llvm-svn: 131399
2011-05-16 03:05:33 +00:00
2f10078ae7
Fix copy-pasto.
...
llvm-svn: 131384
2011-05-15 17:28:27 +00:00
af18d07ed6
Add stub methods to MCStreamer for emitting Win64 exception-handling
...
information.
llvm-svn: 131382
2011-05-15 17:20:01 +00:00
d96205c4e5
SimplifyCFG: Use ComputeMaskedBits to prune dead cases from switch instructions.
...
llvm-svn: 131345
2011-05-14 15:57:25 +00:00
66a82b966e
Avoid combining GEPs that might overflow at runtime.
...
rdar://problem/9267970
Patch by Julien Lerouge!
llvm-svn: 131339
2011-05-14 05:55:10 +00:00
8f1e11cde9
Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code.
...
llvm-svn: 131332
2011-05-14 00:47:51 +00:00
df9db7ed92
Don't produce a vmovntdq if we don't have AVX support.
...
llvm-svn: 131330
2011-05-14 00:30:01 +00:00
f080a57b81
Zap useless code; this hasn't done anything useful since fast-isel switched to being bottom-up (a very long time ago).
...
llvm-svn: 131329
2011-05-14 00:19:32 +00:00
f6b1846f39
Be a bit more permissive about symbols we don't understand. Just skip them
...
rather than throwing an error.
llvm-svn: 131322
2011-05-13 23:11:30 +00:00
0bd34fbd01
ExecutionEngine: move createJIT() definition (v2)
...
As an ExecutionEngine class function, its definition
really belongs in ExecutionEngine.cpp, not JIT.cpp.
llvm-svn: 131320
2011-05-13 22:02:53 +00:00
8418fdcd59
ExecutionEngine: push TargetMachine creation into clients (v2)
...
In particular, into EngineBuilder. This should only impact
the private API between the EE and EB classes, not external
clients, since JITCtor and MCJITCtor are both protected members.
llvm-svn: 131317
2011-05-13 21:51:29 +00:00
1756faa472
ExecutionEngine: fix JIT/MCJIT selectTarget() duplication (v2)
...
This prepares for making JITCtor/MCJITCtor take a
TargetMachine* directly from clients like EngineBuilder.
llvm-svn: 131316
2011-05-13 21:36:16 +00:00
65ed49dfc7
Teach the RtDyld to tell the memory manager about how much space a function
...
actually takes rather than how much memory was allocated for it. This
is more accurate and should help the manager pack things more effectively.
llvm-svn: 131305
2011-05-13 20:12:14 +00:00
e53b7d1a11
Make codegen able to handle values of empty types. This is one way
...
to fix PR9900. I will keep it open until sable is able to comment on it.
llvm-svn: 131294
2011-05-13 15:18:06 +00:00
7e11f9e26d
Fix a source of non determinism in FindUsedTypes, use a SetVector instead of a
...
set.
rdar://9423996
llvm-svn: 131283
2011-05-13 05:20:42 +00:00
03957dfeb1
Convert SimplifyIVUsers into a worklist instead of a single pass over
...
the users.
llvm-svn: 131277
2011-05-13 01:12:21 +00:00
aa02c0847d
Since I can't reproduce the failures from 131261, re-trying with a
...
simplified version. <rdar://problem/9298790>
llvm-svn: 131274
2011-05-13 00:51:54 +00:00
8d57d8ea64
Revert 131266 and 131261 due to buildbot complaints.
...
rdar://problem/9298790
llvm-svn: 131269
2011-05-13 00:15:17 +00:00
89f1b47e3a
Non-fast-isel followup to 129634; correctly handle branches controlled
...
by non-CMP expressions. The executable test case (129821) would test
this as well, if we had an "-O0 -disable-arm-fast-isel" LLVM-GCC
tester. Alas, the ARM assembly would be very difficult to check with
FileCheck.
The thumb2-cbnz.ll test is affected; it generates larger code (tst.w
vs. cmp #0 ), but I believe the new version is correct.
rdar://problem/9298790
llvm-svn: 131261
2011-05-12 23:36:41 +00:00
8a88026ae3
Update comment.
...
llvm-svn: 131258
2011-05-12 22:35:48 +00:00
12419aee7a
Doug convinced me that DW_AT_APPLE_objc_complete_type is more appropriate name.
...
s/DW_AT_APPLE_objc_class_extension/DW_AT_APPLE_objc_complete_type/g
llvm-svn: 131244
2011-05-12 21:29:42 +00:00
1b2d526c8b
MCJIT section loading should just skip non-text sections rather than
...
erroring out completely. Some modules produce sections that aren't referenced,
so it's friendlier to clients like LLDB to just skip them, at least for now.
llvm-svn: 131243
2011-05-12 21:21:16 +00:00
43054e6159
Re-enable branchfolding common code hoisting optimization. Fixed a liveness test bug and also taught it to update liveins.
...
llvm-svn: 131241
2011-05-12 20:30:01 +00:00
2409e7843b
Let Objective-C front-end identify class extension, in dwarf output, using an attribute DW_AT_APPLE_objc_class_extension.
...
llvm-svn: 131238
2011-05-12 19:06:16 +00:00
33469b2cae
Temporarily disable the transformation. It's breaking 186.crafty in some configuration.
...
llvm-svn: 131235
2011-05-12 18:44:58 +00:00
9efe39ea38
The MCJIT memory manager needs to initialize its Module member.
...
llvm-svn: 131234
2011-05-12 18:21:23 +00:00
e50a3d16e9
Fix setting of isCommutable flag.
...
llvm-svn: 131233
2011-05-12 17:42:08 +00:00
cfdf33904b
Re-commit 131172 with fix. MachineInstr identity checks should check dead
...
markers. In some cases a register def is dead on one path, but not on
another.
This is passing Clang self-hosting.
llvm-svn: 131214
2011-05-12 00:56:58 +00:00
81683ed232
indvars: Added SimplifyIVUsers.
...
Interleave IV simplifications. Currently involves EliminateComparison
and EliminateRemainder. Next I'll add EliminateExtend.
llvm-svn: 131210
2011-05-12 00:04:28 +00:00
7c6c90b35d
Remove an unused variable and move a couple others inside DEBUG.
...
llvm-svn: 131208
2011-05-11 23:34:51 +00:00
c09e726455
Address the last bit of relocation flag related divergence betweeen
...
LLVM and binutils.
With this patch, there are no functional differences between the .o
produced directly from LLVM versus the .s to .o via GNU as, for relocation tags
at least, for both PIC and non-PIC modes.
Because some non-PIC reloc tags are used (legally) on PIC, so IsPCRel flag is
necessary but not sufficient to determine whether the overall codegen mode is
PIC or not. Why is this necessary? There is an incompatibility of how relocs
are emitted in the .rodata section. Binutils PIC likes to emit certain relocs
as section relative offsets. Non-PIC does not do this.
So I added a hidden switch on the ELFObjectwriter "-arm-elf-force-pic" which
forces the objectwriter to pretend that all relocs are for PIC mode.
Todo: Activate ForceARMElfPIC to true if -relocation-model=pic is selected
on llc.
Todo: There are probably more issues for PIC mode on ARM/MC/ELF...
Todo: Existing tests in MC/ARM/elf-reloc*.ll need to be converted over to .s
tests as well as expanded to cover the gamut.
llvm-svn: 131205
2011-05-11 22:53:06 +00:00
2a9dbbbb12
Turn this into a table, this will make more sense shortly.
...
Part of rdar://8470697
llvm-svn: 131200
2011-05-11 21:44:58 +00:00
34a6620748
Identify end of prologue (and beginning of function body) using DW_LNS_set_prologue_end line table opcode.
...
llvm-svn: 131194
2011-05-11 19:22:19 +00:00
31a0b5e2f0
Avoid hoisting spills when looking at a copy from another register that is also
...
about to be spilled.
This can only happen when two extra snippet registers are included in the spill,
and there is a copy between them. Hoisting the spill creates problems because
the hoist will mark the copy for later dead code elimination, and spilling the
second register will turn the copy into a spill.
<rdar://problem/9420853>
llvm-svn: 131192
2011-05-11 18:25:10 +00:00
b745623b71
Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan.
...
llvm-svn: 131189
2011-05-11 17:00:48 +00:00
69005e5953
Typo and missing checkin from r131186.
...
llvm-svn: 131187
2011-05-11 16:44:08 +00:00
55aeb55aa3
Bugpoint support for miscompilations that result in a crash.
...
This change allows bugpoint to pinpoint the "opt" pass and bitcode
segment responsible for a crash caused by miscompilation. At least it
works well for me now, without having to create any custom execution
wrappers.
llvm-svn: 131186
2011-05-11 16:31:24 +00:00
8a7beb80f0
Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).
...
If there is a store after the load node, then there is a chain, which means
that there is another user. Thus, asking hasOneUser would fail. Instead we
ask hasNUsesOfValue on the 'data' value.
llvm-svn: 131183
2011-05-11 14:40:50 +00:00
8f971c27fb
Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a splat vector.
...
llvm-svn: 131179
2011-05-11 08:12:09 +00:00
2a09d65979
Revert 131172 as it is causing clang to miscompile itself. I will try
...
to provide a reduced testcase.
llvm-svn: 131176
2011-05-11 03:27:17 +00:00
50117f8186
Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp
...
intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>
llvm-svn: 131174
2011-05-11 01:11:55 +00:00
05fc35e275
Add a late optimization to BranchFolding that hoist common instruction sequences
...
at the start of basic blocks to their common predecessor. It's actually quite
common (e.g. about 50 times in JM/lencod) and has shown to be a nice code size
benefit. e.g.
pushq %rax
testl %edi, %edi
jne LBB0_2
## BB#1:
xorb %al, %al
popq %rdx
ret
LBB0_2:
xorb %al, %al
callq _foo
popq %rdx
ret
=>
pushq %rax
xorb %al, %al
testl %edi, %edi
je LBB0_2
## BB#1:
callq _foo
LBB0_2:
popq %rdx
ret
rdar://9145558
llvm-svn: 131172
2011-05-11 01:03:01 +00:00
4a34e61e53
Optimize atomic lock or that doesn't use the result value.
...
Next up: xor and and.
Part of rdar://8470697
llvm-svn: 131171
2011-05-10 23:57:45 +00:00
dc9d9f8eeb
Fix cmake again.
...
llvm-svn: 131164
2011-05-10 22:42:41 +00:00
1ec5c8a8bc
Remove empty file.
...
llvm-svn: 131162
2011-05-10 22:38:17 +00:00
de32fa163f
Avoid a gcc warning.
...
llvm-svn: 131161
2011-05-10 22:28:35 +00:00
b361d2b2bc
Fix cmake build.
...
llvm-svn: 131160
2011-05-10 22:19:33 +00:00
e09457b02b
Revert r131155 for now. It makes VMCore depend on Analysis and Transforms
...
headers.
llvm-svn: 131159
2011-05-10 22:16:06 +00:00
a678098f24
Initialize moveTypeModule.
...
llvm-svn: 131157
2011-05-10 21:54:59 +00:00
768de0a0f8
Disable my little CopyToReg argument hack with fast-isel. rdar://problem/9413587 .
...
llvm-svn: 131156
2011-05-10 21:50:58 +00:00
c2fcb4df5e
Add support for plugins add passes to the default set of passes. The standard set of passes used by front ends can now be modified by LLVM plugins, without needing to modify any front ends.
...
Still to do:
- Allow replacing / removing passes (infrastructure there, just needs an infrastructure exposed)
- Defining sets of passes to be added or removed as a group
- Extending the support to allow user-defined groups of optimisations
- Allow plugins to be specified for loading automatically (e.g. from plugins.conf or some similar mechanism)
Reviewed by Nick Lewycky.
llvm-svn: 131155
2011-05-10 21:36:48 +00:00
999fa3bf1f
Correctly walk through nested and adjacent CALLSEQ_START nodes. No
...
test case; I've only seen this on a release branch, and I can't get it
to reproduce on trunk. rdar://problem/7662569
llvm-svn: 131152
2011-05-10 21:20:03 +00:00
19c1a56287
Produce a __debug_frame section on darwin ARM when appropriate.
...
llvm-svn: 131151
2011-05-10 21:04:45 +00:00
99f6735532
On MachO, unlike ELF, there should be no relocation to produce the CIE pointer.
...
llvm-svn: 131149
2011-05-10 20:59:42 +00:00
2fe0ee1ce2
Rename DwarfRequiresRelocationForStmtList to
...
DwarfRequiresRelocationForSectionOffset as this is not specific to StmtList.
llvm-svn: 131148
2011-05-10 20:35:05 +00:00
d0d2354258
The EH symbols are only needed in eh_frame, not debug_frame.
...
llvm-svn: 131146
2011-05-10 19:51:53 +00:00
fdc3e6fab6
Use .cfi_sections to put the unwind info in .debug_frame when possible. With
...
this clang will use .debug_frame in, for example,
clang -g -c -m32 test.c
This matches gcc's behaviour. It looks like .debug_frame is a bit bigger
than .eh_frame, but has the big advantage of not being allocated.
llvm-svn: 131140
2011-05-10 18:39:09 +00:00
e33464663f
Refactor lock versions of binary operators to be a little less
...
cut and paste.
llvm-svn: 131139
2011-05-10 18:36:16 +00:00
62f1ab79ec
First cut at getting debugging support for ARM/MC/ELF/.o
...
DWARF stuff also gets fixed up by ELFARMAsmBackend::ApplyFixup(),
but the offset is not guaranteed to be mod 4 == 0 as in text/data.
llvm-svn: 131137
2011-05-10 18:07:25 +00:00
50215afd8a
Fix PR9883. Make sure all caches are invalidated when a live range is repaired.
...
The previous invalidation missed the alias interference caches.
Also add a stats counter for the number of repaired ranges.
llvm-svn: 131133
2011-05-10 17:37:41 +00:00
27390b4a0e
In a debug_frame the cfi offset is to the start of the debug_frame section!
...
llvm-svn: 131129
2011-05-10 15:20:23 +00:00
ec53aa9485
Add CFIStartSections to the asm printer. Add an assert that at least
...
one of the sections is created.
llvm-svn: 131124
2011-05-10 13:39:48 +00:00
72d74e4606
PTX: add PTX 2.3 setting in PTX sub-target.
...
Patch by Wei-Ren Chen
llvm-svn: 131123
2011-05-10 12:32:11 +00:00
1ecb12fc57
Add support for producing .deubg_frame sections.
...
llvm-svn: 131121
2011-05-10 03:54:12 +00:00
b6444c0401
Small cleanups.
...
llvm-svn: 131120
2011-05-10 03:26:21 +00:00
b6089d6cac
Factor some code into a new EmitFrames method.
...
llvm-svn: 131119
2011-05-10 03:14:15 +00:00
0e130d1d37
Remove unused argument.
...
llvm-svn: 131118
2011-05-10 03:01:39 +00:00
74b101f3e3
Parsing and plumbing for .cfi_sections.
...
llvm-svn: 131117
2011-05-10 01:10:18 +00:00
3fd06f760b
Preserve line number information.
...
llvm-svn: 131112
2011-05-10 00:03:11 +00:00
589845d887
Do not ignore InlinedAt while walking up scope chain to find subprogram node.
...
llvm-svn: 131106
2011-05-09 22:14:49 +00:00
4480428474
Look through struct wrapped types for inline asm statments.
...
Patch by Evan Cheng.
llvm-svn: 131093
2011-05-09 20:04:43 +00:00
0daf687e1d
Change a few std::maps to DenseMaps.
...
llvm-svn: 131088
2011-05-09 18:44:09 +00:00
5dc19f916c
Fix td file comments for Mips.
...
Patch by Liu <proljc@gmail.com>!
llvm-svn: 131086
2011-05-09 18:16:46 +00:00
92ff16b7bb
Fixed MC encoding for index_align for VLD1/VST1 (single element from one lane) for size 32
...
llvm-svn: 131085
2011-05-09 17:47:27 +00:00
6be291a2cd
Indent properly, no functionality change.
...
llvm-svn: 131082
2011-05-09 08:03:33 +00:00
392445823d
Eliminate an unused line to fix a warning.
...
llvm-svn: 131078
2011-05-08 23:19:04 +00:00
89bd2ae517
Remove an assertion to fix PR9872.
...
It can happen that a live debug variable is the last use of a sub-register, and
the register allocator will pick a larger register class for the virtual
register. If the allocated register doesn't support the sub-register index,
just use %noreg for the debug variables instead of asserting.
In PR9872, a debug variable ends up in the sub_8bit_hi part of a GR32_ABCD
register. The register is split and one part is inflated to GR32 and assigned
%ESI because there are no more normal uses of sub_8bit_hi.
Since %ESI doesn't have that sub-register, substPhysReg asserted. Now it will
simply insert a %noreg instead, and the debug variable will be marked
unavailable in that range.
We don't currently have a way of saying: !"value" is in bits 8-15 of %ESI, I
don't know if DWARF even supports that.
llvm-svn: 131073
2011-05-08 19:21:08 +00:00
d724a590e5
X86: Add a bunch of peeps for add and sub of SETB.
...
"b + ((a < b) ? 1 : 0)" compiles into
cmpl %esi, %edi
adcl $0, %esi
instead of
cmpl %esi, %edi
sbbl %eax, %eax
andl $1, %eax
addl %esi, %eax
This saves a register, a false dependency on %eax
(Intel's CPUs still don't ignore it) and it's shorter.
llvm-svn: 131070
2011-05-08 18:36:07 +00:00
ab39c63538
Don't force relaxation of AdvanceLoc instructions on OS X. gdb is happy with
...
the smaller encoding and this cuts 270336 bytes from a release version of
clang and 1246272 bytes from a debug build.
llvm-svn: 131067
2011-05-08 14:35:21 +00:00
c132174169
Eliminate the ARM sub-register indexes that are not needed by the sources.
...
Tablegen will invent its own names for these indexes, and the register file is a
bit simpler.
llvm-svn: 131059
2011-05-07 21:22:42 +00:00
af32728a57
The comparision "max(x,y)==x" is equivalent to "x>=y". Since the max is
...
often expressed as "x >= y ? x : y", there is a good chance we can extract
the existing "x >= y" from it and use that as a replacement for "max(x,y)==x".
llvm-svn: 131049
2011-05-07 16:56:49 +00:00
1e3db02bda
Fix the non-MC encoding of pkhbt and pkhtb.
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Patch by Stephen Hines.
llvm-svn: 131045
2011-05-07 04:37:27 +00:00
58799a35e5
Revert ExecutionEngine patches, they either failed to build or broke unit tests.
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Please ensure the build is clean and tests are passing when recommitting.
llvm-svn: 131044
2011-05-07 03:12:54 +00:00
bcabcdcedd
Switch Darwin to the generic CIE/FDE printer.
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llvm-svn: 131031
2011-05-06 22:29:04 +00:00
4c261a2831
ExecutionEngine: delete duplicated files
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Forgot to `svn rm` these in revisions 131025 / 131029.
llvm-svn: 131030
2011-05-06 22:24:04 +00:00
00dd3d6001
ExecutionEngine: add missing file
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From revision 131025.
llvm-svn: 131029
2011-05-06 22:20:09 +00:00
cbb7fa68ed
1. Keep lines in 80 columns.
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2. Remove unused function.
3. Correct indentation.
llvm-svn: 131028
2011-05-06 22:11:29 +00:00
8c0487006e
ExecutionEngine: move createJIT() definition
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As an ExecutionEngine class function, its definition
really belongs in ExecutionEngine.cpp, not JIT.cpp.
llvm-svn: 131027
2011-05-06 22:07:14 +00:00
ab6bd20da9
ExecutionEngine: push TargetMachine creation into clients
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In particular, into EngineBuilder. This should only impact
the private API between the EE and EB classes, not external
clients, since JITCtor and MCJITCtor are both protected members.
llvm-svn: 131026
2011-05-06 22:06:22 +00:00
fed7f0b3a0
ExecutionEngine: fix JIT/MCJIT selectTarget() duplication
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This prepares for making JITCtor/MCJITCtor take a
TargetMachine* directly from clients like EngineBuilder.
llvm-svn: 131025
2011-05-06 22:05:43 +00:00
a5c889982a
Emit a proper error message when register allocators run out of registers.
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This can't be just an assertion, users can always write impossible inline
assembly. Such an assembly statement should be included in the error message.
llvm-svn: 131024
2011-05-06 21:58:30 +00:00
2e116a4491
Added an assertion, and updated a comment.
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llvm-svn: 131022
2011-05-06 21:52:52 +00:00
64c9284411
It's valid to take the blockaddress of a different function, so remove this
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assert in the bitcode writer. No change needed because the ValueEnumerator holds
a whole-module numbering anyhow. Fixes PR9857!
llvm-svn: 131016
2011-05-06 21:09:44 +00:00
d26fc5e013
80 col violations.
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llvm-svn: 131015
2011-05-06 20:52:23 +00:00
2518f8376d
Make the logic for determining function alignment more explicit. No functionality change.
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llvm-svn: 131012
2011-05-06 20:34:06 +00:00
7a78f66145
Use array_lengthof. No functional change.
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llvm-svn: 131008
2011-05-06 19:50:10 +00:00
57c8f58aeb
Iterate backwards over debug locations when splitting them so they can be safely erased.
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This should unbreak dragonegg-i386-linux and build-self-4-mingw32.
llvm-svn: 131007
2011-05-06 19:31:19 +00:00
84f9ad9bf2
Typo: Reviewed by Alistair.
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llvm-svn: 131001
2011-05-06 18:14:32 +00:00
f8da028895
Update LiveDebugVariables after live range splitting.
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After a virtual register is split, update any debug user variables that resided
in the old register. This ensures that the LiveDebugVariables are still correct
after register allocation.
This may create DBG_VALUE instructions that place a user variable in a register
in parts of the function and in a stack slot in other parts. DwarfDebug
currently doesn't support that.
llvm-svn: 130998
2011-05-06 18:00:02 +00:00
c86fe05923
Use TargetMachine hooks to properly print debug variable locations.
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llvm-svn: 130997
2011-05-06 17:59:59 +00:00
6cc4e4ddd0
Also count identity copies.
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llvm-svn: 130996
2011-05-06 17:59:57 +00:00
aab77fe574
Post-RA scheduler compile time fix. Quadratic computation of DAG node depth.
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The post-ra scheduler was explicitly updating the depth of a node's
successors after scheduling it, regardless of whether the successor
was ready. This is quadratic for DAGs with transitively redundant
edges. I simply removed the useless update of depth, which is lazilly
computed later.
Fixes <rdar://problem/9044332> compiler takes way too long to build TextInput.
llvm-svn: 130992
2011-05-06 17:09:08 +00:00
17b532728b
Move CompileUnit::getOrCreateNameSpace() and CompileUnit::addPubType() from DwarfDebug.cpp to DwarfCompileUnit.cpp
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llvm-svn: 130991
2011-05-06 16:57:54 +00:00
705d25a1f4
Nothing else uses this label.
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llvm-svn: 130989
2011-05-06 15:44:29 +00:00
6e4fa20efb
Yet more dead code.
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llvm-svn: 130988
2011-05-06 15:31:55 +00:00
d06c2c1b81
Update comments.
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llvm-svn: 130987
2011-05-06 15:28:56 +00:00
4bfa978ca5
More dead code elimination.
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llvm-svn: 130985
2011-05-06 15:22:26 +00:00
a716096677
Dead code elimination.
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llvm-svn: 130984
2011-05-06 14:56:22 +00:00
11d70b6b32
PTX: add PTX 2.3 language target
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Patch by Wei-Ren Chen
llvm-svn: 130980
2011-05-06 11:40:36 +00:00
a071c82900
Fix PR9820: a read-only call differs from a load in that a load doesn't
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return the pointer being dereferenced, it returns the pointee, but a call
might return the pointer itself.
llvm-svn: 130979
2011-05-06 10:30:37 +00:00
5401962643
Re-revert r130877; it's apparently causing a regression on 197.parser,
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possibly related to cbnz formation.
llvm-svn: 130977
2011-05-06 05:23:07 +00:00
a7028848a1
The computation of string length is not that complicated. Fix it, again. :)
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llvm-svn: 130967
2011-05-05 23:52:18 +00:00
bb237c72a6
Remove DwarfTableException.
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llvm-svn: 130964
2011-05-05 23:19:54 +00:00
ec0a3a0bbf
Remove the DwarfTable enum.
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llvm-svn: 130959
2011-05-05 22:14:31 +00:00
Rafael Espindola