Commit Graph

275666 Commits

Author SHA1 Message Date
Adrian Prantl 182f9fea37 InstCombine: salvage the debug info of DCE'ed add instructions.
rdar://problem/31209283

llvm-svn: 317522
2017-11-06 22:49:39 +00:00
Craig Topper 428a4e6374 [X86] Make FeatureAVX512 imply FeatureF16C.
The EVEX to VEX pass is already assuming this is true under AVX512VL. We had special patterns to use zmm instructions if VLX and F16C weren't available.

Instead just make AVX512 imply F16C to make the EVEX to VEX behavior explicitly legal and remove the extra patterns.

All known CPUs with AVX512 have F16C so this should safe for now.

llvm-svn: 317521
2017-11-06 22:49:04 +00:00
Craig Topper cb6c38612e [X86] Make FeatureAVX512 imply FeatureFMA.
Previously our VEX patterns were checking Subtarget.hasFMA() which checked FMA || AVX512. So we were behaving as if AVX512 implied it anyway. Which means we'd allow VEX encoded 128/256 FMA when AVX512F was enabled but AVX512VL is off. Regardless of the FMA flag.

EVEX to VEX also transforms scalar EVEX FMA instructions to their VEX versions even without the FMA flag. Similarly for 128/256 under AVX512VL.

So this makes AVX512 imply FeatureFMA to make our current behavior explicit.

All known CPUs that support AVX512 have VEX FMA instructions.

llvm-svn: 317520
2017-11-06 22:49:01 +00:00
Sanjay Patel 86d24f1668 [ValueTracking] readonly (const) is a requirement for converting sqrt to llvm.sqrt; nnan is not
As discussed in D39204, this is effectively a revert of rL265521 which required nnan 
to vectorize sqrt libcalls based on the old LangRef definition of llvm.sqrt. Now that
the definition has been updated so the libcall and intrinsic have the same semantics
apart from potentially setting errno, we can remove the nnan requirement.

We have the right check to know that errno is not set:

if (!ICS.onlyReadsMemory())

...ahead of the switch.

This will solve https://bugs.llvm.org/show_bug.cgi?id=27435 assuming that's being 
built for a target with -fno-math-errno.

Differential Revision: https://reviews.llvm.org/D39642

llvm-svn: 317519
2017-11-06 22:40:09 +00:00
Hans Wennborg 8c4b10e84a Revert r317510 "[InstCombine] Pull shifts through a select plus binop with constant"
This broke the CodeGen/Hexagon/loop-idiom/pmpy-mod.ll test on a bunch of buildbots.

> This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.
>
> This can allow us to get the select closer to other selects to enable removing one.
>
> Differential Revision: https://reviews.llvm.org/D39222
>
> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317510 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-svn: 317518
2017-11-06 22:28:02 +00:00
Hans Wennborg effc12dd43 Revert r316064 "Fix the incorrect detection of ICONV_LIBRARY_PATH"
This broke the use of libxml2 on machines where iconv() is provided by libc.
I'll follow up on the mailing list to discuss how to fix this properly.

> This is introduced in rL308711.
> Check for c library is incorrect here just because libc will be found always
> and it does not mean that iconv is presented.
>
> Thank to Andrew Krasny for narrowing down the root cause.
>
> Reviewers: ecbeckmann
> Reviewed By: ecbeckmann
> Subscribers: mgorny, llvm-commits
> Differential Revision: https://reviews.llvm.org/D38875

llvm-svn: 317517
2017-11-06 22:17:23 +00:00
Devin Coughlin 046833e5fb [analyzer] Model correct dispatch_once() 'done' value in BodyFarm
The analyzer's BodyFarm models dispatch_once() by comparing the passed-in
predicate against a known 'done' value. If the predicate does not have that
value, the model updates the predicate to have that value and executes the
passed in block.

Unfortunately, the current model uses the wrong 'done' value: 1 instead of ~0.
This interferes with libdispatch's static inline function _dispatch_once(),
which enables a fast path if the block has already been executed. That function
uses __builtin_assume() to tell the compiler that the done flag is set to ~0 on
exit. When r302880 added modeling of __builtin_assume(), this caused the
analyzer to assume 1 == ~0. This in turn caused the analyzer to never explore any code after a call to dispatch_once().

This patch regains the missing coverage by updating BodyFarm to use the correct
'done' value.

rdar://problem/34413048

Differential Revision: https://reviews.llvm.org/D39691

llvm-svn: 317516
2017-11-06 22:12:19 +00:00
Jonas Hahnfeld ba84ca9efb [OMPT] Fix null pointer in parallel/no_thread_num_clause.c
Looks like the implementation of printf on Darwin uses "0x0"
instead of "(nil)" like glibc does.

llvm-svn: 317515
2017-11-06 22:06:14 +00:00
Xinliang David Li a531f189fc Fix comment /NFC
llvm-svn: 317514
2017-11-06 21:57:51 +00:00
Bjorn Pettersson a42ed3e361 [MIRPrinter] Use %subreg.xxx syntax for subregister index operands
Summary:
Print %subreg.<subregidxname> instead of just the subregister
index when printing immediate operands corresponding to subreg
indices in INSERT_SUBREG, EXTRACT_SUBREG, SUBREG_TO_REG and
REG_SEQUENCE.

Reviewers: qcolombet, MatzeB

Reviewed By: MatzeB

Subscribers: nhaehnle, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D39696

llvm-svn: 317513
2017-11-06 21:46:06 +00:00
Alex Shlyapnikov 2093b94e70 [LSan] Detect dynamic loader by its base address.
Summary:
Relanding D38600, which was reverted due to various PPC bot failures.

If it breaks something again, please provide some pointers to broken
bots, not just revert it, otherwise it's very hard to reason what's
wrong with this commit.

Whenever possible (Linux + glibc 2.16+), detect dynamic loader module by
its base address, not by the module name matching. The current name
matching approach fails on some configurations.

Reviewers: eugenis

Subscribers: kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D39275

llvm-svn: 317512
2017-11-06 21:27:06 +00:00
Dave Lee f96bedfce3 Vary Windows toolchain selection by -fuse-ld
Summary:
This change allows binutils to be used for linking with MSVC. Currently, when
using an MSVC target and `-fuse-ld=bfd`, the driver produces an invalid linker
invocation.

Reviewers: rnk, compnerd

Reviewed By: compnerd

Subscribers: smeenai, cfe-commits

Differential Revision: https://reviews.llvm.org/D39509

llvm-svn: 317511
2017-11-06 21:18:05 +00:00
Craig Topper 8917647333 [InstCombine] Pull shifts through a select plus binop with constant
This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.

This can allow us to get the select closer to other selects to enable removing one.

Differential Revision: https://reviews.llvm.org/D39222

llvm-svn: 317510
2017-11-06 21:07:22 +00:00
Justin Bogner f7b1007345 update_mir_test_checks: Be careful about replacing entire vregs
Previously, this could end up replacing a vreg like %14 with
[[VREG1]]4, where VREG1 was the match for %1. That's obviously not
correct, though it hasn't actually come up in any tests I've converted
so far.

llvm-svn: 317509
2017-11-06 21:06:09 +00:00
Graham Yiu 52a52a6cab Fix buildbot breakages from r317503. Add parentheses to assignment when using result as a condition.
llvm-svn: 317508
2017-11-06 21:04:19 +00:00
Craig Topper 57f96ac6dc [X86] Replace the mask cmpeq/cmple/cmplt/cmpgt/cmpge/cmpneq intrinsics with macros that just pass the right comparison predicate value to the regular cmp intrinsic. Remove mask cmpeq/cmpgt builtins that are now unused.
This shortens the intrinsic headers a little and allows us to get rid of the cmpeq and cmpgt handling from CGBuiltin.cpp.

llvm-svn: 317506
2017-11-06 21:00:49 +00:00
Martin Storsjo 6bde1667ba [MinGW] Don't autoexport anything from libmsvcrt or libucrtbase
These libraries contain a number of object files with compat wrappers,
in addition to the normal import library entries.

Differential Revision: https://reviews.llvm.org/D39684

llvm-svn: 317505
2017-11-06 20:33:13 +00:00
Martin Storsjo b438ea3f1c [X86] Add 3dnow and 3dnowa to the list of valid target features
These were missed in SVN r316783, which broke compiling mingw-w64 CRT.

Differential Revision: https://reviews.llvm.org/D39631

llvm-svn: 317504
2017-11-06 20:33:13 +00:00
Graham Yiu 030621bbcb Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles, and use P9 shift and vector insert byte instructions instead of vperm. Extends tests from vector insert half-word.
Differential Revision: https://reviews.llvm.org/D34497

llvm-svn: 317503
2017-11-06 20:18:30 +00:00
Dehao Chen 5d2a1a5045 Include already promoted counts when computing SUM for VP.
Summary: When computing the SUM for indirect call promotion, if the callsite is already promoted in the profile, it will be promoted before ICP. In the current implementation, ICP only sees remaining counts in SUM. This may cause extra indirect call targets being promoted. This patch updates the SUM to include the counts already promoted earlier. This way we do not end up promoting too many indirect call targets.

Reviewers: tejohnson

Reviewed By: tejohnson

Subscribers: llvm-commits, sanjoy

Differential Revision: https://reviews.llvm.org/D38763

llvm-svn: 317502
2017-11-06 19:52:49 +00:00
Stephane Sezer 972d513a5c Add a dependency from check-lldb on lld
Summary:
This is required when using the in-tree clang for building tests,
because -fuse-ld=lld is used by default.

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D39689

llvm-svn: 317501
2017-11-06 19:25:33 +00:00
Mitch Phillips 6fb3525113 [cfi-verify] Added a simple check that stops division-by-zero error when no indirect CF instructions are found in the provided file.
llvm-svn: 317500
2017-11-06 19:14:09 +00:00
Guozhi Wei e3b8d9a312 [PPC] Use xxbrd to speed up bswap64
Power doesn't have bswap instructions, so llvm generates following code sequence for bswap64.

  rotldi   5, 3, 16
  rotldi   4, 3, 8
  rotldi   9, 3, 24
  rotldi   10, 3, 32
  rotldi   11, 3, 48
  rotldi   12, 3, 56
  rldimi 4, 5, 8, 48
  rldimi 4, 9, 16, 40
  rldimi 4, 10, 24, 32
  rldimi 4, 11, 40, 16
  rldimi 4, 12, 48, 8
  rldimi 4, 3, 56, 0

But Power9 has vector bswap instructions, they can also be used to speed up scalar bswap intrinsic. With this patch, bswap64 can be translated to:

  mtvsrdd 34, 3, 3
  xxbrd 34, 34
  mfvsrld 3, 34

Differential Revision: https://reviews.llvm.org/D39510

llvm-svn: 317499
2017-11-06 19:09:38 +00:00
Mitch Phillips 5ebf7a87f3 Make MCAsmBackend and MCCodeEmiiter passed by unique_ptr rval
Summary: Fixes build breakage of llvm-mc-assemble-fuzzer introduced by rL315531.

Reviewers: lhames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39268

llvm-svn: 317498
2017-11-06 18:56:36 +00:00
Michael Kruse 4d3f3c7206 [ForwardOpTree] Limit isl operations of known content reload.
Put the analysis part of reloadKnownContent under an isl
max-operations quota scope, as has already been done for
forwardKnownLoad.

This should fix the aosp timeout of "GrTestUtils.cpp".

llvm-svn: 317495
2017-11-06 17:48:14 +00:00
Alex Shlyapnikov adbf476a88 [Sanitizers] Check pthread_setcancel{state|type} interceptor arguments for != nullptr.
Summary:
According to man, pthread_setcancelstate's oldstate and
pthread_setcanceltype's oldtype parameters can be nullptr.
Check these parameters for != nullptr before attempting to
access their shadow memory.

Reviewers: dvyukov

Subscribers: kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D39626

llvm-svn: 317494
2017-11-06 17:43:28 +00:00
Jan Korous 06aa2aff7b [Parser] Fix TryParseLambdaIntroducer() error handling
rdar://35066196

Differential Revision: https://reviews.llvm.org/D39419

llvm-svn: 317493
2017-11-06 17:42:17 +00:00
Matt Arsenault 4f6318fe1b AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32
llvm-svn: 317492
2017-11-06 17:04:37 +00:00
Sanjay Patel 1b5114fa52 [Analysis] update to use new fast-math API - isFast()
llvm-svn: 317491
2017-11-06 16:52:31 +00:00
Adrian Prantl 3c6491dd75 Canonicalize spelling of long-form-options in dsymutil.rst
llvm-svn: 317490
2017-11-06 16:52:05 +00:00
Sanjay Patel 401aaee300 [CodeGen] match new fast-math-flag method: isFast()
This corresponds to LLVM commiti r317488:

If that commit is reverted, this commit will also need to be reverted.

llvm-svn: 317489
2017-11-06 16:27:36 +00:00
Sanjay Patel 629c411538 [IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags and add 'trans' fast-math-flag
As discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2016-November/107104.html
and again more recently:
http://lists.llvm.org/pipermail/llvm-dev/2017-October/118118.html

...this is a step in cleaning up our fast-math-flags implementation in IR to better match
the capabilities of both clang's user-visible flags and the backend's flags for SDNode.

As proposed in the above threads, we're replacing the 'UnsafeAlgebra' bit (which had the 
'umbrella' meaning that all flags are set) with a new bit that only applies to algebraic 
reassociation - 'AllowReassoc'.

We're also adding a bit to allow approximations for library functions called 'ApproxFunc' 
(this was initially proposed as 'libm' or similar).

...and we're out of bits. 7 bits ought to be enough for anyone, right? :) FWIW, I did 
look at getting this out of SubclassOptionalData via SubclassData (spacious 16-bits), 
but that's apparently already used for other purposes. Also, I don't think we can just 
add a field to FPMathOperator because Operator is not intended to be instantiated. 
We'll defer movement of FMF to another day.

We keep the 'fast' keyword. I thought about removing that, but seeing IR like this:
%f.fast = fadd reassoc nnan ninf nsz arcp contract afn float %op1, %op2
...made me think we want to keep the shortcut synonym.

Finally, this change is binary incompatible with existing IR as seen in the 
compatibility tests. This statement:
"Newer releases can ignore features from older releases, but they cannot miscompile 
them. For example, if nsw is ever replaced with something else, dropping it would be 
a valid way to upgrade the IR." 
( http://llvm.org/docs/DeveloperPolicy.html#ir-backwards-compatibility )
...provides the flexibility we want to make this change without requiring a new IR 
version. Ie, we're not loosening the FP strictness of existing IR. At worst, we will 
fail to optimize some previously 'fast' code because it's no longer recognized as 
'fast'. This should get fixed as we audit/squash all of the uses of 'isFast()'.

Note: an inter-dependent clang commit to use the new API name should closely follow 
commit.

Differential Revision: https://reviews.llvm.org/D39304

llvm-svn: 317488
2017-11-06 16:27:15 +00:00
Sam McCall 0ed8d48c4b [clangd] Squash namespace warning
llvm-svn: 317487
2017-11-06 15:50:35 +00:00
Sam McCall dd0566bb2c Adds a json::Expr type to represent intermediate JSON expressions.
Summary:
This form can be created with a nice clang-format-friendly literal syntax,
and gets escaping right. It knows how to call unparse() on our Protocol types.
All the places where we pass around JSON internally now use this type.

Object properties are sorted (stored as std::map) and so serialization is
canonicalized, with optional prettyprinting (triggered by a -pretty flag).
This makes the lit tests much nicer to read and somewhat nicer to debug.
(Unfortunately the completion tests use CHECK-DAG, which only has
line-granularity, so pretty-printing is disabled there. In future we
could make completion ordering deterministic, or switch to unittests).

Compared to the current approach, it has some efficiencies like avoiding copies
of string literals used as object keys, but is probably slower overall.
I think the code/test quality benefits are worth it.

This patch doesn't attempt to do anything about JSON *parsing*.
It takes direction from the proposal in this doc[1], but is limited in scope
and visibility, for now.
I am of half a mind just to use Expr as the target of a parser, and maybe do a
little string deduplication, but not bother with clever memory allocation.
That would be simple, and fast enough for clangd...
[1] https://docs.google.com/document/d/1OEF9IauWwNuSigZzvvbjc1cVS1uGHRyGTXaoy3DjqM4/edit

+cc d0k so he can tell me not to use std::map.

Reviewers: ioeric, malaperle

Subscribers: bkramer, ilya-biryukov, mgorny, klimek

Differential Revision: https://reviews.llvm.org/D39435

llvm-svn: 317486
2017-11-06 15:40:30 +00:00
Simon Pilgrim ad9b9720e8 [X86][SSE] Merge combineExtractVectorElt_SSE into combineExtractVectorElt. NFCI.
We still early-out for X86ISD::PEXTRW/X86ISD::PEXTRB so no actual change in behaviour, but it'll make it easier to add support in a future patch.

llvm-svn: 317485
2017-11-06 15:28:25 +00:00
Jonas Hahnfeld dc5d849e2b [OMPT] Fix callback.h for tests for changes in TR6
This was also lost in the last commit.

llvm-svn: 317484
2017-11-06 15:13:06 +00:00
Alexey Bataev 676350c16c [SLP] Test for PR35047, NFC.
llvm-svn: 317482
2017-11-06 14:52:57 +00:00
Simon Pilgrim 14450720e6 [X86][SSE] Combine EXTRACT_VECTOR_ELT with combineExtractWithShuffle before XFormVExtractWithShuffleIntoLoad
combineExtractWithShuffle can handle more complex shuffles/bitcasts than we can with the equivalent code in XFormVExtractWithShuffleIntoLoad.

Mainly a compile time improvement now (combineExtractWithShuffle combines will have always failed late on inside XFormVExtractWithShuffleIntoLoad), and will let us merge combineExtractVectorElt_SSE in a future commit.

llvm-svn: 317481
2017-11-06 14:34:19 +00:00
Jonas Hahnfeld 13dc13ef09 [OMPT] Improve cast that was lost on commit, NFC.
llvm-svn: 317480
2017-11-06 14:33:09 +00:00
Yaxun Liu cc56a8b108 [AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environment
Differential Revision: https://reviews.llvm.org/D39657

llvm-svn: 317479
2017-11-06 14:32:33 +00:00
Florian Hahn 6720a089fd [Polly] Fix using order, as this caused a test failure (NFC)
Summary:
Without this patch, clang-format in check-polly fails for me, with current master:

```
FAILED: cd build/tools/polly && build/bin/clang-format -sort-includes -style=llvm llvm/tools/polly/include/polly/ScopPass.h | diff -u llvm/tools/polly/include/polly/ScopPass.h -
--- llvm/tools/polly/include/polly/ScopPass.h	2017-11-06 14:05:49.885345000 +0000
+++ -	2017-11-06 14:07:24.956241758 +0000
@@ -40,12 +40,12 @@
 } // namespace polly

 namespace llvm {
+using polly::SPMUpdater;
 using polly::Scop;
 using polly::ScopAnalysisManager;
 using polly::ScopAnalysisManagerFunctionProxy;
 using polly::ScopInfo;
 using polly::ScopStandardAnalysisResults;
-using polly::SPMUpdater;

 template <>
 class InnerAnalysisManagerProxy<ScopAnalysisManager, Function>::Result {
```

Reviewers: grosser, Meinersbur, bollu

Reviewed By: Meinersbur

Subscribers: llvm-commits, pollydev

Differential Revision: https://reviews.llvm.org/D39683

llvm-svn: 317478
2017-11-06 14:26:04 +00:00
Jonas Paulsson e54cc1a436 [SystemZ] implement hasDivRemOp()
SystemZ can do division and remainder in a single instruction for scalar
integer types, which are now reflected by returning true in this hook for
those cases.

Review: Ulrich Weigand
llvm-svn: 317477
2017-11-06 13:10:31 +00:00
Yaxun Liu 1ac16619d2 [AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bit
The backend assumes pointer in default addr space is 32 bit, which is not
true for the new addr space mapping and causes assertion for unresolved
functions.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D39643

llvm-svn: 317476
2017-11-06 13:01:33 +00:00
Simon Dardis 169df4e24b [mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version
Previously, the 'movep' instruction was defined for microMIPS32r3 and
shared that definition with microMIPS32R6. 'movep' was re-encoded for
microMIPS32r6, so this patch provides the correct encoding.

Secondly, correct the encoding of the 'rs' and 'rt' operands which have
an instruction specific encoding for the registers those operands accept.

Finally, correct the decoding of the 'dst_regs' operand which was extracting
the relevant field from the instruction, but was actually extracting the
field from the alreadly extracted field.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D39495

llvm-svn: 317475
2017-11-06 12:59:53 +00:00
Pavel Labath a68e048233 Extend android xfail in TestTopLevelExprs
The test fails on API level 19 as well. I'm going to assume that it
fails on every API level below 23.

llvm-svn: 317474
2017-11-06 12:34:27 +00:00
Daniel Jasper bbf5f4ecbc [clang-format] Handle unary operator overload with arguments and specifiers
Before:
  int operator++(int)noexcept;

After:
  int operator++(int) noexcept;

Patch by Igor Sugak. Thank you!

llvm-svn: 317473
2017-11-06 12:11:51 +00:00
Jonas Devlieghere aaecdc44ae [docs] Update code block for compatibility with Sphinx 1.5.1
It is currently not possible to build the documentation with cmake and
the same version of Sphinx (1.5.1) used to generate the public facing
documentation on llvm.org. When code blocks cannot be parsed by
Pygments, it generates a warning which is treated as an error.

In addition to being annoying and confusing for developers, this
needlessly increases the bar for newcomers that want to get involved.

This patch removes the language specifier from the affected block. The
result is the same as when parsing fails: the block are not highlighted.

llvm-svn: 317472
2017-11-06 11:47:24 +00:00
Mohammed Agabaria 6691758364 [LV][X86] update the cost of interleaving mem. access of floats
Recommit:
This patch contains update of the costs of interleaved loads of v8f32 of stride 3 and 8.
fixed the location of the lit test it works with make check-all.

Differential Revision: https://reviews.llvm.org/D39403

llvm-svn: 317471
2017-11-06 10:56:20 +00:00
Simon Dardis e57795384c [mips] Fix PR35140
Mark all symbols involved with TLS relocations as being TLS symbols.

This resolves PR35140.

Thanks to Alex Crichton for reporting the issue!

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D39591

llvm-svn: 317470
2017-11-06 10:50:04 +00:00
Peter Smith a2db4349d5 [ELF] Fix typo in comment for getISDThunkSec [NFC]
The ISR in the comment should read ISD for InputSectionDescription. The use
of ISR (InputSectionRange) was from the original implementation that did not
use the sections from InputSectionDescription directly.

llvm-svn: 317469
2017-11-06 10:36:18 +00:00