Commit Graph

275666 Commits

Author SHA1 Message Date
Sam McCall 784e88351b [clangd] MSVC - third time's the charm
llvm-svn: 317581
2017-11-07 14:59:21 +00:00
Sam McCall 94362c61c6 [clangd] don't crash on invalid JSON-RPC ID
llvm-svn: 317580
2017-11-07 14:45:31 +00:00
Petar Jovanovic e2a585dddc Reland "Correct dwarf unwind information in function epilogue for X86"
Reland r317100 with minor fix regarding ComputeCommonTailLength function in
BranchFolding.cpp. Skipping top CFI instructions block needs to executed on
several more return points in ComputeCommonTailLength().

Original r317100 message:

"Correct dwarf unwind information in function epilogue for X86"

This patch aims to provide correct dwarf unwind information in function
epilogue for X86.

It consists of two parts. The first part inserts CFI instructions that set
appropriate cfa offset and cfa register in emitEpilogue() in
X86FrameLowering. This part is X86 specific.

The second part is platform independent and ensures that:

- CFI instructions do not affect code generation
- Unwind information remains correct when a function is modified by
  different passes. This is done in a late pass by analyzing information
  about cfa offset and cfa register in BBs and inserting additional CFI
  directives where necessary.

Changed CFI instructions so that they:

- are duplicable
- are not counted as instructions when tail duplicating or tail merging
- can be compared as equal

Added CFIInstrInserter pass:

- analyzes each basic block to determine cfa offset and register valid at
  its entry and exit
- verifies that outgoing cfa offset and register of predecessor blocks match
  incoming values of their successors
- inserts additional CFI directives at basic block beginning to correct the
  rule for calculating CFA

Having CFI instructions in function epilogue can cause incorrect CFA
calculation rule for some basic blocks. This can happen if, due to basic
block reordering, or the existence of multiple epilogue blocks, some of the
blocks have wrong cfa offset and register values set by the epilogue block
above them.

CFIInstrInserter is currently run only on X86, but can be used by any target
that implements support for adding CFI instructions in epilogue.

Patch by Violeta Vukobrat.

llvm-svn: 317579
2017-11-07 14:40:27 +00:00
Kristof Beyls d5b7a00fd5 Silence MSVC error C2398
Reported by http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/6000/steps/build-unified-tree/logs/stdio
The error messages were all similar to:
llvm\unittests\CodeGen\GlobalISel\LegalizerInfoTest.cpp(54): error C2398: Element '1': conversion from '' to 'unsigned int' requires a narrowing conversion

llvm-svn: 317578
2017-11-07 14:37:01 +00:00
Eric Liu c47fd014ae [clang-refactor] Use ClangTool more explicitly by making refaroing actions AST frontend actions.
Summary: This is a refactoring change. NFC

Reviewers: arphaman, hokein

Reviewed By: arphaman, hokein

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D39675

llvm-svn: 317577
2017-11-07 14:35:03 +00:00
Alexey Bataev e25a6fd390 [SLP] Fix PR35047: Fix default cost model for cast op in X86.
Summary:
The cost calculation for default case on X86 target does not always
follow correct wayt because of missing 4-th argument in
`BaseT::getCastInstrCost()` call. Added this missing parameter.

Reviewers: hfinkel, mkuper, RKSimon, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39687

llvm-svn: 317576
2017-11-07 14:23:44 +00:00
Sam McCall 99633ec527 [clangd] another try at fixing MSVC
llvm-svn: 317575
2017-11-07 14:14:58 +00:00
Tamas Berghammer cf6bf4c4ba Fix an issue in r317563 causing a clang assert
llvm-svn: 317574
2017-11-07 13:43:55 +00:00
Kristof Beyls 78aa4b28a3 Mark intentional fall-through with LLVM_FALLTHROUGH.
... to silence gcc 7's default -Wimplicit-fallthrough.

llvm-svn: 317573
2017-11-07 13:31:52 +00:00
Alexander Richardson 46e1fd6102 Add a -D flag to FileCheck to define variables
Summary:
This makes it very easy to test files that only differ in a constant
value somewhere in the test case.

Reviewers: jlebar, hfinkel, chandlerc, probinson

Reviewed By: probinson

Subscribers: probinson, llvm-commits

Differential Revision: https://reviews.llvm.org/D39629

llvm-svn: 317572
2017-11-07 13:24:44 +00:00
Simon Pilgrim 9a6b720f4f [X86] Regenerate select tests
llvm-svn: 317571
2017-11-07 13:21:02 +00:00
Gabor Horvath ec87e17c84 [clang-tidy] Misc redundant expressions checker updated for macros
Redundant Expression Checker is updated to be able to detect expressions that
contain macros. Also, other small details are modified to improve the current
implementation.

The improvements in detail are as follows:
* Binary and ternary operator expressions containing two constants, with at
least one of them from a macro, are detected and tested for redundancy.

Macro expressions are treated somewhat differently from other expressions,
because the particular values of macros can vary across builds.
They can be considered correct and intentional, even if macro values equal,
produce ranges that exclude each other or fully overlap, etc. 

* The code structure is slightly modified: typos are corrected,
comments are added and some functions are renamed to improve comprehensibility,
both in the checker and the test file. A few test cases are moved to another
function.

* The checker is now able to detect redundant CXXFunctionalCastExprs as well.
A corresponding test case is added.

Patch by: Lilla Barancsuk!

Differential Revision: https://reviews.llvm.org/D38688

llvm-svn: 317570
2017-11-07 13:17:58 +00:00
Florian Hahn c4422247b3 [AArch64][SVE] Asm: Replace 'IsVector' by 'RegKind' in AArch64AsmParser (NFC)
Patch [2/5] in a series to add assembler/disassembler support for AArch64 SVE unpredicated ADD/SUB instructions.

This change is a non functional change that adds RegKind as an alternative to 'isVector' to prepare it for newer types (SVE data vectors and predicate vectors) that will be added in next patches (where the SVE data vector is added as part of this patch set)

Patch by Sander De Smalen.

Reviewed by: rengolin

Differential Revision: https://reviews.llvm.org/D39088

llvm-svn: 317569
2017-11-07 13:07:50 +00:00
Kristof Beyls 178818ba20 Silence C4715 warning from MSVC (NFC).
The warning started triggering after r317560.
This commit silences it in the same way as previously done in a similar
situation, see
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20140915/236088.html

llvm-svn: 317568
2017-11-07 11:54:00 +00:00
Artem Dergachev 0b5b1f14fd [analyzer] pr34779: CStringChecker: Accept non-standard headers.
Do not crash when trying to define and call a non-standard
strcpy(unsigned char *, unsigned char *) during analysis.

At the same time, do not try to actually evaluate the call.

Differential Revision: https://reviews.llvm.org/D39422

llvm-svn: 317565
2017-11-07 10:51:15 +00:00
Florian Hahn 603c6455d2 [AArch64][SVE] Asm: Extend EnforceVectorSubVectorTypeIs to distinguish Scalable Vectors
Patch [1/5] in a series to add assembler/disassembler support for AArch64 SVE
unpredicated ADD/SUB instructions.

Patch by Sander De Smalen.

Reviewed by: rengolin

Differential Revision: https://reviews.llvm.org/D39087

llvm-svn: 317564
2017-11-07 10:43:56 +00:00
Tamas Berghammer 5976583a30 Support scoped enums in the DWARF AST parser
Subscribers: JDevlieghere

Differential Revision: https://reviews.llvm.org/D39545

llvm-svn: 317563
2017-11-07 10:39:22 +00:00
Pavel Labath 888cc5d50b test: Clean up finalize_build_dictionary
We only support API>=16 now, so we don't need to check the API level of
the android device.

llvm-svn: 317562
2017-11-07 10:36:42 +00:00
Pavel Labath 881fe8ecb2 "Fix" concurrent events test for arm
Summary:
The test incremented an atomic varible to trigger the watchpoint event.
On arm64 this compiled to a ldaxr/stlxr loop, with the watchpoint being
triggered in the middle of the loop. Hitting the watchpoint resets the
exclusive monitor, and forces the process to loop one more time, hitting
the watchpoint again, etc.

While it would be nice if the debugger was able to resume from this
situation, this is not trivial, and is not what this test is about.
Therefore, I propose to change this to a simple store to a normal
variable (which should still trip the watchpoint everywhere, but without
atomic loops) and file a bug to investigate the possibilities of
handling the watchpoints in atomic loops in a more reasonable way.

Reviewers: clayborg

Subscribers: aemerson, kristof.beyls, lldb-commits

Differential Revision: https://reviews.llvm.org/D39680

llvm-svn: 317561
2017-11-07 10:36:36 +00:00
Kristof Beyls af9814a1fc [GlobalISel] Enable legalizing non-power-of-2 sized types.
This changes the interface of how targets describe how to legalize, see
the below description.

1. Interface for targets to describe how to legalize.

In GlobalISel, the API in the LegalizerInfo class is the main interface
for targets to specify which types are legal for which operations, and
what to do to turn illegal type/operation combinations into legal ones.

For each operation the type sizes that can be legalized without having
to change the size of the type are specified with a call to setAction.
This isn't different to how GlobalISel worked before. For example, for a
target that supports 32 and 64 bit adds natively:

  for (auto Ty : {s32, s64})
    setAction({G_ADD, 0, s32}, Legal);

or for a target that needs a library call for a 32 bit division:

  setAction({G_SDIV, s32}, Libcall);

The main conceptual change to the LegalizerInfo API, is in specifying
how to legalize the type sizes for which a change of size is needed. For
example, in the above example, how to specify how all types from i1 to
i8388607 (apart from s32 and s64 which are legal) need to be legalized
and expressed in terms of operations on the available legal sizes
(again, i32 and i64 in this case). Before, the implementation only
allowed specifying power-of-2-sized types (e.g. setAction({G_ADD, 0,
s128}, NarrowScalar).  A worse limitation was that if you'd wanted to
specify how to legalize all the sized types as allowed by the LLVM-IR
LangRef, i1 to i8388607, you'd have to call setAction 8388607-3 times
and probably would need a lot of memory to store all of these
specifications.

Instead, the legalization actions that need to change the size of the
type are specified now using a "SizeChangeStrategy".  For example:

   setLegalizeScalarToDifferentSizeStrategy(
       G_ADD, 0, widenToLargerAndNarrowToLargest);

This example indicates that for type sizes for which there is a larger
size that can be legalized towards, do it by Widening the size.
For example, G_ADD on s17 will be legalized by first doing WidenScalar
to make it s32, after which it's legal.
The "NarrowToLargest" indicates what to do if there is no larger size
that can be legalized towards. E.g. G_ADD on s92 will be legalized by
doing NarrowScalar to s64.

Another example, taken from the ARM backend is:
   for (unsigned Op : {G_SDIV, G_UDIV}) {
     setLegalizeScalarToDifferentSizeStrategy(Op, 0,
         widenToLargerTypesUnsupportedOtherwise);
     if (ST.hasDivideInARMMode())
       setAction({Op, s32}, Legal);
     else
       setAction({Op, s32}, Libcall);
   }

For this example, G_SDIV on s8, on a target without a divide
instruction, would be legalized by first doing action (WidenScalar,
s32), followed by (Libcall, s32).

The same principle is also followed for when the number of vector lanes
on vector data types need to be changed, e.g.:

   setAction({G_ADD, LLT::vector(8, 8)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(16, 8)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(4, 16)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(8, 16)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(2, 32)}, LegalizerInfo::Legal);
   setAction({G_ADD, LLT::vector(4, 32)}, LegalizerInfo::Legal);
   setLegalizeVectorElementToDifferentSizeStrategy(
       G_ADD, 0, widenToLargerTypesUnsupportedOtherwise);

As currently implemented here, vector types are legalized by first
making the vector element size legal, followed by then making the number
of lanes legal. The strategy to follow in the first step is set by a
call to setLegalizeVectorElementToDifferentSizeStrategy, see example
above.  The strategy followed in the second step
"moreToWiderTypesAndLessToWidest" (see code for its definition),
indicating that vectors are widened to more elements so they map to
natively supported vector widths, or when there isn't a legal wider
vector, split the vector to map it to the widest vector supported.

Therefore, for the above specification, some example legalizations are:
  * getAction({G_ADD, LLT::vector(3, 3)})
    returns {WidenScalar, LLT::vector(3, 8)}
  * getAction({G_ADD, LLT::vector(3, 8)})
    then returns {MoreElements, LLT::vector(8, 8)}
  * getAction({G_ADD, LLT::vector(20, 8)})
    returns {FewerElements, LLT::vector(16, 8)}


2. Key implementation aspects.

How to legalize a specific (operation, type index, size) tuple is
represented by mapping intervals of integers representing a range of
size types to an action to take, e.g.:

       setScalarAction({G_ADD, LLT:scalar(1)},
                       {{1, WidenScalar},  // bit sizes [ 1, 31[
                        {32, Legal},       // bit sizes [32, 33[
                        {33, WidenScalar}, // bit sizes [33, 64[
                        {64, Legal},       // bit sizes [64, 65[
                        {65, NarrowScalar} // bit sizes [65, +inf[
                       });

Please note that most of the code to do the actual lowering of
non-power-of-2 sized types is currently missing, this is just trying to
make it possible for targets to specify what is legal, and how non-legal
types should be legalized.  Probably quite a bit of further work is
needed in the actual legalizing and the other passes in GlobalISel to
support non-power-of-2 sized types.

I hope the documentation in LegalizerInfo.h and the examples provided in the
various {Target}LegalizerInfo.cpp and LegalizerInfoTest.cpp explains well
enough how this is meant to be used.

This drops the need for LLT::{half,double}...Size().


Differential Revision: https://reviews.llvm.org/D30529

llvm-svn: 317560
2017-11-07 10:34:34 +00:00
Haojian Wu 2375c926f4 [clangd] Add ErrorCode enum class.
Summary: Avoid using magic number in the code everywhere.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: ilya-biryukov, cfe-commits

Differential Revision: https://reviews.llvm.org/D39718

llvm-svn: 317559
2017-11-07 10:21:02 +00:00
Sjoerd Meijer 167f2e34d5 [docs] Add section 'Half-Precision Floating Point'
This documents the differences/interactions between _Float16 and __fp16
and is a companion change for the _Float16 type implementation (r312794).

Differential Revision:  https://reviews.llvm.org/D35295

llvm-svn: 317558
2017-11-07 10:09:45 +00:00
Serguei Katkov 365200295a [CGP] Disable Select instruction handling in optimizeMemoryInst. NFC
This patch disables the handling of selects in optimization
extensing scope of optimizeMemoryInst.

The optimization itself is disable by default.
The idea here is just to switch optimiztion level step by step.

Specifically, first optimization will be enabled only for Phi nodes,
then select instructions will be added.

In case someone will complain about perfromance it will be easier to
detect what part of optimizations is responsible for that.

Differential Revision: https://reviews.llvm.org/D36073

llvm-svn: 317555
2017-11-07 09:43:08 +00:00
Peter Smith 7411da557f [docs][ARM] Add HowTo for cross compiling and testing compiler-rt builtins
This document contains information on how to cross-compile the compiler-rt
builtins library for several flavours of Arm target and how to test the
libraries using qemu.

Differential Revision: https://reviews.llvm.org/D39600

llvm-svn: 317554
2017-11-07 09:40:05 +00:00
Sam McCall c2055486eb [clangd] fix MSVC build errors
llvm-svn: 317553
2017-11-07 08:57:54 +00:00
Haojian Wu 5529a244e1 Add new check in google module for Objective-C code to ensure global variables follow the naming convention of Google Objective-C Style Guide
Summary:
This is a new checker for objc files in clang-tidy.

The new check finds global variable declarations in Objective-C files that are not follow the pattern of variable names in Google's Objective-C Style Guide.

All the global variables should follow the pattern of "g[A-Z].*" (variables) or "k[A-Z].*" (constants). The check will suggest a variable name that follows the pattern
if it can be inferred from the original name.

Patch by Yan Zhang!

Reviewers: benhamilton, hokein, alexfh

Reviewed By: hokein

Subscribers: Eugene.Zelenko, mgorny

Differential Revision: https://reviews.llvm.org/D39391

llvm-svn: 317552
2017-11-07 08:53:37 +00:00
Bjorn Steinbrink c02b237e46 [X86] Don't clobber reserved registers with stack adjustments
Summary:
Calls using invoke in funclet based functions are assumed to clobber
all registers, which causes the stack adjustment using pops to consider
all registers not defined by the call to be undefined, which can
unfortunately include the base pointer, if one is needed.

To prevent this (and possibly other hazards), skip reserved registers
when looking for candidate registers.

This fixes issue #45034 in the Rust compiler.

Reviewers: mkuper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39636

llvm-svn: 317551
2017-11-07 08:50:21 +00:00
Craig Topper e7fb300226 [X86] Add patterns to fold a 64-bit load into the EVEX vcvtph2ps instructions.
llvm-svn: 317548
2017-11-07 07:13:07 +00:00
Craig Topper 0231b1d445 [X86] Add patterns for folding a v16i8 with the VEX vcvtph2ps intrinsics.
Disable the peephole pass to prove that the pattern is working.

llvm-svn: 317547
2017-11-07 07:13:06 +00:00
Craig Topper 65fc53320b [X86] Add a test for a 128-bit vector load feeding a cvtph2ps intrinsic.
The instruction only loads 64-bits, but we should be able to fold a wider load and let it be narrowed.

llvm-svn: 317546
2017-11-07 07:13:05 +00:00
Craig Topper 8942b33f84 [X86] Remove alignment from a load in the f16c intrinsic test. The alignment shouldn't be required for load folding.
llvm-svn: 317545
2017-11-07 07:13:04 +00:00
Craig Topper cf8e6d0a76 [X86] Add support for using EVEX instructions for the legacy vcvtph2ps intrinsics.
Looks like there's some missed load folding opportunities for i64 loads.

llvm-svn: 317544
2017-11-07 07:13:03 +00:00
Craig Topper 75510dd6f7 [X86] Add AVX512VL command line to f16c intrinsic test to show missed EVEX opportunities for the legacy intrinsics.
llvm-svn: 317543
2017-11-07 07:13:01 +00:00
Craig Topper afc3c8206e [X86] Use IMPLICIT_DEF in VEX/EVEX vcvtss2sd/vcvtsd2ss patterns instead of a COPY_TO_REGCLASS.
ExeDepsFix pass should take care of making the registers match.

llvm-svn: 317542
2017-11-07 04:44:22 +00:00
Craig Topper 4ad81b51ed [X86] Remove 'Requires' from instructions with no patterns. NFC
llvm-svn: 317541
2017-11-07 04:44:21 +00:00
NAKAMURA Takumi e02398022d ClangdTests/JSONExprTests.cpp: Appease g++-4.8 to move raw string literal out of macro arg.
llvm-svn: 317538
2017-11-07 02:18:24 +00:00
George Karpenkov 166548c0dc [analyzer] [NFC] Remove unused typedef from SVals.h
Differential Revision: https://reviews.llvm.org/D39620

llvm-svn: 317537
2017-11-07 02:02:10 +00:00
Rafael Espindola fcd7494832 Use Path instead of Config->OutputFile. NFC.
This function is always called with Config->OutputFile. That is not
obvious from reading the function. It should always use Path or take
no argument and always use Config->OutputFile.

llvm-svn: 317536
2017-11-07 02:00:51 +00:00
Davide Italiano 1f465aa64a [Support/UNIX] posix_fallocate() can fail with EINVAL.
According to the docs on opegroup.org, the function can return
EINVAL if:

The len argument is less than zero, or the offset argument is less
than zero, or the underlying file system does not support this
operation.

I'd say it's a peculiar choice (when EONOTSUPP is right there), but
let's keep POSIX happy for now. This was independently discovered
by Mark Millard (on FreeBSD/ZFS).

Quickly ack'ed by Rui on IRC.

llvm-svn: 317535
2017-11-07 00:47:04 +00:00
Adrian Prantl 25a09dd408 Make DIExpression::createFragmentExpression() return an Optional.
We can't safely split arithmetic into multiple fragments because we
can't express carry-over between fragments.

llvm-svn: 317534
2017-11-07 00:45:34 +00:00
Alex Lorenz 4e30b96834 Clarify the error message for unsupported aliases on Darwin
rdar://35109556

llvm-svn: 317532
2017-11-07 00:31:19 +00:00
Keith Wyss 424279958d [XRay] Minimal tool to convert xray traces to Chrome's Trace Event Format.
Minimal tool to convert xray traces to Chrome's Trace Event Format.

Summary:
Make use of Chrome Trace Event format's Duration events and stack frame dict to
produce Json files that chrome://tracing can visualize from xray function call
traces. Trace Event format is more robust and has several features like
argument logging, function categorization, multi process traces, etc. that we
can add as needed. Duration events cover an important base case.

Part of this change is rearranging the code so that the TrieNode data structure
can be used from multiple tools and can carry parameterized baggage on the
nodes. I put the actual behavior changes in llvm-xray convert exclusively.

Exploring the trace of instrumented llc was pretty nifty if overwhelming.
I can envision this being very useful for analyzing contention scenarios or
tuning parameters like batch sizes in a producer consumer queue. For more
targeted traces likemthis, let's talk about how we want to approach trace
pruning.

Reviewers: dberris, pelikan

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39362

llvm-svn: 317531
2017-11-07 00:28:28 +00:00
Rui Ueyama 989b1fcb01 Remove dead code.
llvm-svn: 317530
2017-11-07 00:26:04 +00:00
Stephane Sezer d20106b5ec Disable tests in lang/c/shared_lib on Windows
Summary: These fail because `-fPIC` is not supported on Windows.

Reviewers: zturner, jingham, clayborg

Reviewed By: clayborg

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D39692

llvm-svn: 317529
2017-11-07 00:14:40 +00:00
Rui Ueyama d5e2e8393b Report an error if an inferred alignment for a shared symbol is too large.
Differential Revision: https://reviews.llvm.org/D39697

llvm-svn: 317528
2017-11-07 00:12:05 +00:00
Davide Italiano 1a46affb45 [IPO/LowerTypesTest] Skip blockaddress(es) when replacing uses.
Blockaddresses refer to the function itself, therefore replacing them
would cause an assertion in doRAUW.

Fixes https://bugs.llvm.org/show_bug.cgi?id=35201

This was found when trying CFI on a proprietary kernel by Dmitry Mikulin.

Differential Revision:  https://reviews.llvm.org/D39695

llvm-svn: 317527
2017-11-07 00:09:25 +00:00
Matt Arsenault 6119f80034 AMDGPU: Remove redundant combine
This combine was already done in two places. The
generic combiner already has done this since
r217610, for adds (with a single use).

This one was added in r303641, and added support for handling
or as well. r313251 later added support to the generic
combine for or. It also turns out the isOrEquivalentToAdd
check is not necessary for this combine.

Additionally, we already reproduce this combine in yet
another place in the backend, although in that version
multiple uses of the add are still folded if it will
allow a fold into the addressing mode. That version needs
to be improved to understand ors though, as well as the
correct legal offsets for private.

llvm-svn: 317526
2017-11-07 00:06:32 +00:00
Rui Ueyama 7957b08e87 Move MIPS-specific code from Symbols.cpp to MIPS.cpp.
We have a lot of "if (MIPS)" conditions in lld because the MIPS' ABI
is different at various places than other arch's ABIs at where it
don't have to be different, but we at least want to reduce MIPS-ness
from the regular classes.

llvm-svn: 317525
2017-11-07 00:04:22 +00:00
Vedant Kumar 2b881f567f [DebugInfo] Unify logic to merge DILocations. NFC.
This makes DILocation::getMergedLocation() do what its comment says it
does when merging locations for an Instruction: set the common inlineAt
scope. This simplifies Instruction::applyMergedLocation() a bit.

Testing: check-llvm, check-clang

Differential Revision: https://reviews.llvm.org/D39628

llvm-svn: 317524
2017-11-06 23:15:21 +00:00
Simon Dardis 8bdbff37fe [Support][Chrono] Use explicit cast of text output of time values.
rL316419 exposed a platform specific issue where the type of the values
passed to llvm::format could be different to the format string.

Debian unstable for mips uses long long int for std::chrono:duration,
while x86_64 uses long int.

For mips, this resulted in the value being corrupted when rendered to a
string. Address this by explicitly casting the result of the duration_cast
to the type specified in the format string.

Reviewers: sammccall

Differential Revision: https://reviews.llvm.org/D39597

llvm-svn: 317523
2017-11-06 23:01:46 +00:00