Commit Graph

11 Commits

Author SHA1 Message Date
Vincent Lejeune aee3a10440 R600: Reenable llvm.R600.load.input/interp.input for compatibility
llvm-svn: 194484
2013-11-12 16:26:47 +00:00
Vincent Lejeune f143af3fe9 R600: Use function inputs to represent data stored in gpr
llvm-svn: 194425
2013-11-11 22:10:24 +00:00
Vincent Lejeune 6df39438af R600: Add a ldptr intrinsic to support MSAA.
llvm-svn: 191838
2013-10-02 16:00:33 +00:00
Vincent Lejeune d3eed66e8c R600: Improve texture handling
llvm-svn: 182125
2013-05-17 16:50:20 +00:00
Vincent Lejeune 685018009b R600: Support for TBO
NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175445
2013-02-18 14:11:19 +00:00
Vincent Lejeune d80bc1561a R600: Fold zero/one in export instructions
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175181
2013-02-14 16:55:06 +00:00
Tom Stellard 41afe6a6fe R600: improve inputs/interpolation handling
Use one intrinsic for all sorts of interpolation.
Use two separate unexpanded instructions to represent INTERP_XY and _ZW -
this will allow to eliminate one part if it's not used.
Track liveness of special interpolation regs instead of reserving them -
this will allow to reuse those regs, lowering reg pressure.

Patch By: Vadim Girlin

v2[Vincent Lejeune]: Rebased against current llvm master

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174394
2013-02-05 17:09:14 +00:00
Tom Stellard af1bce7d1d R600: Make store_dummy intrinsic more general by passing export type
Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174097
2013-01-31 22:11:46 +00:00
Tom Stellard 6f1b8657f9 R600: Add a llvm.R600.store.swizzle intrinsics
This intrinsic is translated to ALLOC_EXPORT_WORD1_SWIZ, hence its
name. It is used to store vs/fs outputs

Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 173297
2013-01-23 21:39:49 +00:00
Tom Stellard d8ac91d436 R600: Simplify stream outputs intrinsic
Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 173296
2013-01-23 21:39:47 +00:00
Tom Stellard 75aadc2813 Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
2012-12-11 21:25:42 +00:00