Commit Graph

3287 Commits

Author SHA1 Message Date
Bill Wendling 786a683441 Shift types need to match.
llvm-svn: 62571
2009-01-20 06:10:42 +00:00
Dan Gohman 161b7b66ac Fix a dagcombine to not generate loads of non-round integer types,
as its comment says, even in the case where it will be generating
extending loads. This fixes PR3216.

llvm-svn: 62557
2009-01-20 01:06:45 +00:00
Devang Patel 44afc82ebe Verify debug info.
llvm-svn: 62545
2009-01-19 23:21:49 +00:00
Dan Gohman 534c8a2d72 Remove SDNode's virtual destructor. This makes it impossible for
SDNode subclasses to keep state that requires non-trivial
destructors, however it was already effectively impossible,
since the destructor isn't actually ever called. There currently
aren't any SDNode subclasses affected by this, and in general
it's desireable to keep SDNode objects light-weight.

This eliminates the last virtual member function in the SDNode
class, so it eliminates the need for a vtable pointer, making
SDNode smaller.

llvm-svn: 62539
2009-01-19 22:39:36 +00:00
Dan Gohman cd0b1bf0a0 Fix SelectionDAG::ReplaceAllUsesWith to behave correctly when
uses are added to the From node while it is processing From's
use list, because of automatic local CSE. The fix is to avoid
visiting any new uses.

Fix a few places in the DAGCombiner that assumed that after
a RAUW call, the From node has no users and may be deleted.

This fixes PR3018.

llvm-svn: 62533
2009-01-19 21:44:21 +00:00
Sanjiv Gupta 1d2fc787a9 Few targets like PIC16 wants libcall generation for illegal type i16.
llvm-svn: 62467
2009-01-18 18:25:27 +00:00
Mon P Wang e9e7abb6b8 Simplify extract element based on comments from Duncan Sands.
llvm-svn: 62459
2009-01-18 06:43:40 +00:00
Mon P Wang ca6d6dea0b Simplify extract element of a scalar to vector.
llvm-svn: 62383
2009-01-17 00:07:25 +00:00
Dan Gohman 5f8a2598b2 Instead of adding dependence edges between terminator instructions
and every other instruction in their blocks to keep the terminator
instructions at the end, teach the post-RA scheduler how to operate
on ranges of instructions, and exclude terminators from the range
of instructions that get scheduled.

Also, exclude mid-block labels, such as EH_LABEL instructions, and
schedule code before them separately from code after them. This
fixes problems with the post-RA scheduler moving code past
EH_LABELs.

llvm-svn: 62366
2009-01-16 22:10:20 +00:00
Dan Gohman 38978ba972 Use the getNode() accessor instead of accessing the Node
member directly, which is private as of r55504.

llvm-svn: 62364
2009-01-16 21:47:21 +00:00
Chris Lattner 41828cdb0a new nodes should be added to the worklist, not old nodes.
llvm-svn: 62359
2009-01-16 21:15:56 +00:00
Evan Cheng 968e2e7b3d CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
llvm-svn: 62356
2009-01-16 20:57:18 +00:00
Mikhail Glushenkov 6e8d814d36 Registry.h should not depend on CommandLine.h.
Split Support/Registry.h into two files so that we have less to
recompile every time CommandLine.h is changed.

llvm-svn: 62312
2009-01-16 07:02:28 +00:00
Mikhail Glushenkov b2f9a73029 Delete trailing whitespace.
llvm-svn: 62307
2009-01-16 06:53:46 +00:00
Dan Gohman ceac7c34f1 Initial hazard recognizer support in post-pass scheduling. This includes
a new toy hazard recognizier heuristic which attempts to direct the
scheduler to avoid clumping large groups of loads or stores too densely.

llvm-svn: 62291
2009-01-16 01:33:36 +00:00
Devang Patel 76d190cf4a Validate dbg_* intrinsics before lowering them.
llvm-svn: 62286
2009-01-15 23:41:32 +00:00
Mon P Wang e248edff1b Added missing support to widen an operand from a bit convert.
llvm-svn: 62285
2009-01-15 22:43:38 +00:00
Dan Gohman 7e105f0b12 Generalize the HazardRecognizer interface so that it can be used
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.

llvm-svn: 62284
2009-01-15 22:18:12 +00:00
Rafael Espindola 6de96a1b5d Add the private linkage.
llvm-svn: 62279
2009-01-15 20:18:42 +00:00
Dan Gohman 619ef48a52 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.

llvm-svn: 62275
2009-01-15 19:20:50 +00:00
Dan Gohman 307954ac69 Make getWidenVectorType const; this file was missed in the
previous commit.

llvm-svn: 62266
2009-01-15 17:39:39 +00:00
Dan Gohman 91febd1330 More consts on TargetLowering references.
llvm-svn: 62262
2009-01-15 16:58:17 +00:00
Dan Gohman 4bdf021e05 Use const with TargetLowering references in a few more places.
llvm-svn: 62260
2009-01-15 16:43:02 +00:00
Gabor Greif 08a4c281cb minor refactoring: use a more specific API
llvm-svn: 62256
2009-01-15 11:10:44 +00:00
Devang Patel 3c82aa0209 Removoe MachineModuleInfo methods (and related DebugInfoDesc class hierarchy) that were used to handle debug info.
llvm-svn: 62199
2009-01-13 23:54:55 +00:00
Devang Patel fe9581f0cd Undo previous checkin.
llvm-svn: 62190
2009-01-13 22:54:57 +00:00
Devang Patel ca997988c3 Use dwarf writer to decide whether the module has debug info or not.
llvm-svn: 62184
2009-01-13 21:25:00 +00:00
Dan Gohman 1407484178 The list-td and list-tdrr schedulers don't yet support physreg
scheduling dependencies. Add assertion checks to help catch
this.

It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.

llvm-svn: 62177
2009-01-13 20:24:13 +00:00
Duncan Sands ffc6133318 When replacing uses and the same node is reached
via two paths, process it once not twice, d'oh!
Analysis, testcase and original patch thanks to
Mon Ping Wang.

llvm-svn: 62169
2009-01-13 15:17:14 +00:00
Duncan Sands 90d2a7bd72 Fix some typos. Also, the WidenedVectors map
was not being cleaned by ExpungeNode.

llvm-svn: 62167
2009-01-13 14:42:39 +00:00
Duncan Sands 013be76241 Correct a comment - this is not a sign extension.
llvm-svn: 62166
2009-01-13 14:04:14 +00:00
Devang Patel 5c6e1e3b7d Use DebugInfo interface to lower dbg_* intrinsics.
llvm-svn: 62127
2009-01-13 00:35:13 +00:00
Duncan Sands dc020f9c3c Rename getABITypeSize to getTypePaddedSize, as
suggested by Chris.

llvm-svn: 62099
2009-01-12 20:38:59 +00:00
Evan Cheng b2c42c648d Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.

llvm-svn: 62074
2009-01-12 03:19:55 +00:00
Evan Cheng e3108148e2 CheckForPhysRegDependency should not return copy cost. It's not used. No functionality change.
llvm-svn: 62036
2009-01-11 08:53:35 +00:00
Evan Cheng ed74d8ac2a Duplicated node may produce a non-physical register def.
llvm-svn: 62015
2009-01-09 22:44:02 +00:00
Evan Cheng 0c4fe2600a Minor debug output tweak.
llvm-svn: 62005
2009-01-09 20:42:34 +00:00
Devang Patel 235acaa131 Request DwarfWriter. This will be used to handle dbg_* intrinsics.
llvm-svn: 61999
2009-01-09 19:11:50 +00:00
Misha Brukman 5cbf223916 Removed trailing whitespace from Makefiles.
llvm-svn: 61991
2009-01-09 16:44:42 +00:00
Dan Gohman 261ee6be57 Remove redundant 'else's. No functionality change.
llvm-svn: 61891
2009-01-07 22:30:55 +00:00
Dan Gohman c7847cdb8d Fix a bug in ComputeLinearIndex computation handling multi-level
aggregate types. Don't increment the current index after reaching
the end of a struct, as it will already be pointing at
one-past-the end. This fixes PR3288.

llvm-svn: 61828
2009-01-06 22:53:52 +00:00
Dan Gohman bf8e5204d1 Update these argument lists for the isNormalMemory
argument. This doesn't affect current functionality.

llvm-svn: 61779
2009-01-06 01:28:56 +00:00
Dan Gohman 79c3516912 Use a latency value of 0 for the artificial edges inserted by
AddPseudoTwoAddrDeps. This lets the scheduling infrastructure
avoid recalculating node heights. In very large testcases this
was a major bottleneck. Thanks to Roman Levenstein for finding
this!

As a side effect, fold-pcmpeqd-0.ll is now scheduled better
and it no longer requires spilling on x86-32.

llvm-svn: 61778
2009-01-06 01:19:04 +00:00
Dan Gohman dbc6c31f62 TargetLowering.h #includes SelectionDAGNodes.h, so it doesn't need its
own OpActionsCapacity magic number; it can just use ISD::BUILTIN_OP_END,
as long as it takes care to round up when needed.

llvm-svn: 61733
2009-01-05 19:40:39 +00:00
Dan Gohman 906152a20f Tidy up #includes, deleting a bunch of unnecessary #includes.
llvm-svn: 61715
2009-01-05 17:59:02 +00:00
Devang Patel 56a8bb670f squash warnings.
llvm-svn: 61707
2009-01-05 17:31:22 +00:00
Dan Gohman b9fa1d24f8 Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
llvm-svn: 61613
2009-01-03 19:22:06 +00:00
Dan Gohman 4d41fdf4ca CommuteNodesToReducePressure() is now removed.
llvm-svn: 61612
2009-01-03 19:19:30 +00:00
Dan Gohman 1be2e9650e Remove the code from the scheduler that commuted two-address
instructions to avoid copies, because TwoAddressInstructionPass
also does this optimization.  The scheduler's version didn't
account for live-out values, which resulted in spurious commutes
and missed opportunities.

Now, TwoAddressInstructionPass handles all the opportunities,
instead of just those that the scheduler missed. The result is
usually the same, though there are occasional trivial differences
resulting from the avoidance of spurious commutes.

llvm-svn: 61611
2009-01-03 18:01:46 +00:00
Duncan Sands 953c9c2fbc Factorize (and generalize) the code promoting SELECT
and BRCOND conditions.  Reorder a few methods while
there.

llvm-svn: 61547
2009-01-01 20:36:20 +00:00
Duncan Sands 19ee60848a Remove trailing spaces.
llvm-svn: 61545
2009-01-01 19:56:02 +00:00
Duncan Sands 8feb694e8f Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType.  In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).

llvm-svn: 61542
2009-01-01 15:52:00 +00:00
Scott Michel 0c9259f149 Teach LeaglizeDAG that i64 mul can be a libcall.
llvm-svn: 61463
2008-12-29 03:21:37 +00:00
Dale Johannesen ee573fcefc Change comments so everybody can understand them, hopefully.
llvm-svn: 61405
2008-12-23 23:47:22 +00:00
Dale Johannesen acc84e5aa0 Add another permutation where we should get rid of a-a.
llvm-svn: 61401
2008-12-23 23:01:27 +00:00
Anton Korobeynikov f4a66e8dda Restore debug printing
llvm-svn: 61398
2008-12-23 22:26:18 +00:00
Anton Korobeynikov d305d00796 Sometimes APInt syntax is really ugly... :(
llvm-svn: 61397
2008-12-23 22:26:01 +00:00
Anton Korobeynikov 05149bad18 Indent stuff properly
llvm-svn: 61396
2008-12-23 22:25:45 +00:00
Anton Korobeynikov 6f219132a7 Initial checkin of APInt'ififcation of switch lowering
llvm-svn: 61395
2008-12-23 22:25:27 +00:00
Dan Gohman 12f2490489 Clean up the atomic opcodes in SelectionDAG.
This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.

This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.

llvm-svn: 61389
2008-12-23 21:37:04 +00:00
Dan Gohman 04543e719e Rename BuildSchedUnits to BuildSchedGraph, and refactor the
code in ScheduleDAGSDNodes' BuildSchedGraph into separate functions.

llvm-svn: 61376
2008-12-23 18:36:58 +00:00
Dan Gohman 92cf280dfb Avoid an unnecessary call to allnodes_size(), which is linear.
llvm-svn: 61372
2008-12-23 17:24:50 +00:00
Dale Johannesen d2a4685860 One more permutation of subtracting off a base value.
llvm-svn: 61361
2008-12-23 01:59:54 +00:00
Mon P Wang a501640ffa Added support for vector widening.
llvm-svn: 61209
2008-12-18 20:03:17 +00:00
Mon P Wang 015a7f57b2 Fix expansion of vsetcc to set the high bit for true instead of 1.
llvm-svn: 61129
2008-12-17 08:49:47 +00:00
Dan Gohman ce70fe2e25 Double the amount of memory reserved for SUnits. This is a
temporary workaround for an obscure bug. When node cloning is
used, it is possible that more SUnits will be created, and
if the SUnits std::vector has to reallocate, it will
invalidate all the graph edges.

llvm-svn: 61122
2008-12-17 04:30:46 +00:00
Eli Friedman 6cf404f2d1 Fix for PR3225: disable a broken optimization in
DAGTypeLegalizer::ExpandShiftWithKnownAmountBit.

In terms of restoring the optimization, the best fix here isn't 
obvious... any ideas?

llvm-svn: 61119
2008-12-17 03:35:17 +00:00
Dale Johannesen f51dcef803 A new dag combine; several permutations of this
are there under ADD, this one was missing.

llvm-svn: 61107
2008-12-16 22:13:49 +00:00
Dan Gohman 4476ef810b Preserve SourceValue information when lowering produces multiple loads from
different offsets within the same stack slot.

llvm-svn: 61093
2008-12-16 18:25:36 +00:00
Evan Cheng c35fc49477 We have decided not to support inline asm where an output operand with a matching input operand with incompatible type (i.e. either one is a floating point and the other is an integer or the sizes of the types differ). SelectionDAGBuild will catch these and exit with an error.
llvm-svn: 61092
2008-12-16 18:21:39 +00:00
Dan Gohman 405f2197a4 Remove some special-case logic in ScheduleDAGSDNodes's
latency computation code that is no longer needed with the
new method for handling latencies.

llvm-svn: 61074
2008-12-16 03:31:11 +00:00
Dan Gohman dddc1ac7ea Fix some register-alias-related bugs in the post-RA scheduler liveness
computation code. Also, avoid adding output-depenency edges when both
defs are dead, which frequently happens with EFLAGS defs.

Compute Depth and Height lazily, and always in terms of edge latency
values. For the schedulers that don't care about latency, edge latencies
are set to 1.

Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array.
These are all subsumed by the Depth and Height fields.

llvm-svn: 61073
2008-12-16 03:25:46 +00:00
Dan Gohman 17214e633d Make addPred and removePred return void, since the return value is not
currently used by anything.

llvm-svn: 61066
2008-12-16 01:00:55 +00:00
Mon P Wang 580f2c7b61 Added support for splitting and scalarizing vector shifts.
llvm-svn: 61050
2008-12-15 21:44:00 +00:00
Dan Gohman a7e139a3e6 Fix printing of PseudoSourceValues in SDNode graphs.
llvm-svn: 61036
2008-12-15 17:28:10 +00:00
Mon P Wang ac4e120912 Added support to LegalizeType for expanding the operands of scalar to vector
and insert vector element.  Modified extract vector element to extend the
result to match the expected promoted type.

llvm-svn: 61029
2008-12-15 06:57:02 +00:00
Duncan Sands f312dc7729 Reapply r60997, this time without forgetting that
target constants are allowed to have an illegal
type.

llvm-svn: 61006
2008-12-14 09:43:15 +00:00
Bill Wendling e5af6f1990 Temporarily revert r60997. It was causing this failure:
Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ...
FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll
Failed with exit(1) at line 1
while running:  llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll |  llc | /usr/bin/grep 68719476738
Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493.
0   llc               0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98
1   llc               0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593
2   libSystem.B.dylib 0x96cac09b _sigtramp + 43
3   libSystem.B.dylib 0xffffffff _sigtramp + 1765097359
4   libSystem.B.dylib 0x96d24ec2 raise + 26
5   libSystem.B.dylib 0x96d3447f abort + 73
6   libSystem.B.dylib 0x96d26063 __assert_rtn + 101
7   llc               0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub
...

llvm-svn: 61001
2008-12-13 23:53:00 +00:00
Duncan Sands 24092271cc LegalizeDAG is not supposed to introduce illegal
types into the DAG if they were not already there.
Check this with an assertion.

llvm-svn: 60997
2008-12-13 22:33:38 +00:00
Mon P Wang 472cd640fa Remove assertion to allow promotion of a truncating store operand
llvm-svn: 60975
2008-12-13 08:16:43 +00:00
Mon P Wang f95bd2078d Added basic support for expanding VSETCC
llvm-svn: 60974
2008-12-13 08:15:14 +00:00
Duncan Sands b6f09933c0 On big-endian machines it is wrong to do a full
width register load followed by a truncating
store for the copy, since the load will not place
the value in the lower bits.  Probably partial
loads/stores can never happen here, but fix it
anyway.

llvm-svn: 60972
2008-12-13 07:18:38 +00:00
Duncan Sands 8f352fe100 When expanding unaligned loads and stores do not make
use of illegal integer types: instead, use a stack slot
and copying via integer registers.  The existing code
is still used if the bitconvert is to a legal integer
type.

This fires on the PPC testcases 2007-09-08-unaligned.ll
and vec_misaligned.ll.  It looks like equivalent code
is generated with these changes, just permuted, but
it's hard to tell.

With these changes, nothing in LegalizeDAG produces
illegal integer types anymore.  This is a prerequisite
for removing the LegalizeDAG type legalization code.

While there I noticed that the existing code doesn't
handle trunc store of f64 to f32: it turns this into
an i64 store, which represents a 4 byte stack smash.
I added a FIXME about this.  Hopefully someone more
motivated than I am will take care of it.

llvm-svn: 60964
2008-12-12 21:47:02 +00:00
Evan Cheng 3270a1dec3 Fix add/sub expansion: don't create ADD / SUB with two results (seems like everyone is doing this these days :-). Patch by Daniel M Gessel!
llvm-svn: 60958
2008-12-12 18:49:09 +00:00
Duncan Sands e4bcb8e2dd When using a 4 byte jump table on a 64 bit machine,
do an extending load of the 4 bytes rather than a
potentially illegal (type) i32 load followed by a
sign extend.

llvm-svn: 60945
2008-12-12 08:13:38 +00:00
Mon P Wang 9c2d26d208 Added support for SELECT v8i8 v4i16 for X86 (MMX)
Added support for TRUNC v8i16 to v8i8 for X86 (MMX)

llvm-svn: 60916
2008-12-12 01:25:51 +00:00
Bill Wendling 1a317678bc Redo the arithmetic with overflow architecture. I was changing the semantics of
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.

Similar for SUB and MUL instructions.

llvm-svn: 60915
2008-12-12 00:56:36 +00:00
Mon P Wang bcdbfa854a Avoid generating a convert_rndsat node when the src and dest type are the same.
llvm-svn: 60869
2008-12-11 03:30:13 +00:00
Bill Wendling 40d2476adc Clarify FIXME.
llvm-svn: 60867
2008-12-11 01:26:44 +00:00
Mon P Wang c68b3c4fc1 Whitespace clean up (tabs with spaces)
llvm-svn: 60866
2008-12-11 00:44:22 +00:00
Mon P Wang b5eb7205ea Make fix for r60829 less conservative to allow the proper optimization for
vec_extract-sse4.ll.

llvm-svn: 60865
2008-12-11 00:26:16 +00:00
Bill Wendling 0864a75ebf If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on
them. The DAG combiner expects that nodes that are transformed have one value
result.

llvm-svn: 60857
2008-12-10 22:36:00 +00:00
Duncan Sands 09ed3bba2b For amusement, implement SADDO, SSUBO, UADDO, USUBO
for promoted integer types, eg: i16 on ppc-32, or
i24 on any platform.  Complete support for arbitrary
precision integers would require handling expanded
integer types, eg: i128, but I couldn't be bothered.

llvm-svn: 60834
2008-12-10 12:30:42 +00:00
Mon P Wang 4637c3c698 Fixed a bug when trying to optimize a extract vector element of a
bit convert that changes the number of elements of a shuffle.

llvm-svn: 60829
2008-12-10 03:59:02 +00:00
Bill Wendling f482f379ef Whitespace changes.
llvm-svn: 60826
2008-12-10 02:01:32 +00:00
Bill Wendling 4eb2dcdc45 Whitespace fixes.
llvm-svn: 60818
2008-12-10 00:28:22 +00:00
Dan Gohman 2d170896ee Rewrite the SDep class, and simplify some of the related code.
The Cost field is removed. It was only being used in a very limited way,
to indicate when the scheduler should attempt to protect a live register,
and it isn't really needed to do that. If we ever want the scheduler to
start inserting copies in non-prohibitive situations, we'll have to
rethink some things anyway.

A Latency field is added. Instead of giving each node a single
fixed latency, each edge can have its own latency. This will eventually
be used to model various micro-architecture properties more accurately.

The PointerIntPair class and an internal union are now used, which
reduce the overall size.

llvm-svn: 60806
2008-12-09 22:54:47 +00:00
Bill Wendling db8ec2d75a Add sub/mul overflow intrinsics. This currently doesn't have a
target-independent way of determining overflow on multiplication. It's very
tricky. Patch by Zoltan Varga!

llvm-svn: 60800
2008-12-09 22:08:41 +00:00
Duncan Sands 445071c44f Fix PR3117: not all nodes being legalized. The
essential problem was that the DAG can contain
random unused nodes which were never analyzed.
When remapping a value of a node being processed,
such a node may become used and need to be analyzed;
however due to operands being transformed during
analysis the node may morph into a different one.
Users of the morphing node need to be updated, and
this wasn't happening.  While there I added a bunch
of documentation and sanity checks, so I (or some
other poor soul) won't have to scratch their head
over this stuff so long trying to remember how it
was all supposed to work next time some obscure
problem pops up!  The extra sanity checking exposed
a few places where invariants weren't being preserved,
so those are fixed too.  Since some of the sanity
checking is expensive, I added a flag to turn it
on.  It is also turned on when building with
ENABLE_EXPENSIVE_CHECKS=1.

llvm-svn: 60797
2008-12-09 21:33:20 +00:00
Mon P Wang 8a5366332f In LegalizeOp, don't change the result type of CONVERT_RNDSAT when promoting
one of its operand.

llvm-svn: 60749
2008-12-09 07:27:39 +00:00
Mon P Wang 4dd832d241 Fix getNode to allow a vector for the shift amount for shifts of vectors.
Fix the shift amount when unrolling a vector shift into scalar shifts.
Fix problem in getShuffleScalarElt where it assumes that the input of
a bit convert must be a vector.

llvm-svn: 60740
2008-12-09 05:46:39 +00:00
Dan Gohman 4c31524bec Factor out the code for sign-extending/truncating gep indices
and use it in x86 address mode folding. Also, make
getRegForValue return 0 for illegal types even if it has a
ValueMap for them, because Argument values are put in the
ValueMap. This fixes PR3181.

llvm-svn: 60696
2008-12-08 07:57:47 +00:00
Duncan Sands 471a654711 When allocating a stack temporary, use the correct
number of bytes for types such as i1 which are not
a multiple of 8 bits in length.

llvm-svn: 60543
2008-12-04 18:08:40 +00:00
Dan Gohman 30cad9c192 Make debug output more informative.
llvm-svn: 60524
2008-12-04 02:14:57 +00:00
Duncan Sands f52e518d05 Only check that the result of the mapping was not
a new node if the node was actually remapped.

llvm-svn: 60482
2008-12-03 12:36:16 +00:00
Evan Cheng e62150cae4 Remove a (what appears to be) overly strict assertion. Here is what happened:
1. ppcf128 select is expanded to f64 select's.
2. f64 select operand 0 is an i1 truncate, it's promoted to i32 zero_extend.
3. f64 select is updated. It's changed back to a "NewNode" and being re-analyzed.
4. f64 select operands are being processed. Operand 0 is a "NewNode". It's being expunged out of ReplacedValues map.
5. ExpungeNode tries to remap f64 select and notice it's a "NewNode" and assert.
Duncan, please take a look. Thanks.

llvm-svn: 60443
2008-12-02 21:57:09 +00:00
Scott Michel 9b0b28e021 Non-functional change: make custom lowering for truncate stylistically
consistent with the way it's generally done in other places.

llvm-svn: 60439
2008-12-02 19:55:08 +00:00
Dale Johannesen 54bdec238a One more transformation.
llvm-svn: 60432
2008-12-02 18:40:40 +00:00
Tilmann Scheller 318ccb0e62 make it possible to custom lower TRUNCATE (needed for the CellSPU target)
llvm-svn: 60409
2008-12-02 12:12:25 +00:00
Mon P Wang 6e1c6ad127 Removed some unnecessary code in widening.
llvm-svn: 60406
2008-12-02 07:35:08 +00:00
Dale Johannesen 8c76670b5a Add a few more transformations.
llvm-svn: 60391
2008-12-02 01:30:54 +00:00
Bill Wendling 2d59863d06 Expand getVTList, getNodeValueTypes, and SelectNodeTo to handle more value types.
llvm-svn: 60381
2008-12-01 23:28:22 +00:00
Duncan Sands 3d960941b1 There are no longer any places that require a
MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.

llvm-svn: 60349
2008-12-01 11:41:29 +00:00
Duncan Sands 6ed40141f7 Change the interface to the type legalization method
ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.

llvm-svn: 60348
2008-12-01 11:39:25 +00:00
Eli Friedman c8228d263b Followup to r60283: optimize arbitrary width signed divisions as well
as unsigned divisions.  Same caveats as before.

llvm-svn: 60284
2008-11-30 06:35:39 +00:00
Eli Friedman 1b7fc154a5 Fix for PR2164: allow transforming arbitrary-width unsigned divides into
multiplies.

Some more cleverness would be nice, though. It would be nice if we 
could do this transformation on illegal types.  Also, we would 
prefer a narrower constant when possible so that we can use a narrower
multiply, which can be cheaper.

llvm-svn: 60283
2008-11-30 06:02:26 +00:00
Eli Friedman bd0f57821a APIntify a test which is potentially unsafe otherwise, and fix the
nearby FIXME.

I'm not sure what the right way to fix the Cell test was; if the 
approach I used isn't okay, please let me know.

llvm-svn: 60277
2008-11-30 04:59:26 +00:00
Sanjiv Gupta 7ae1a84465 Removing redundant semicolons. No functionality change.
llvm-svn: 60149
2008-11-27 05:58:04 +00:00
Dale Johannesen 73bc0ba4c9 Add a missing case in visitADD.
llvm-svn: 60137
2008-11-27 00:43:21 +00:00
Sanjiv Gupta 80810f8c6b Allow custom lowering of ADDE/ADDC/SUBE/SUBC operations.
llvm-svn: 60102
2008-11-26 11:19:00 +00:00
Bill Wendling b4ff5322c1 A simplification for checking whether the signs of the operands and sum differ. Thanks, Duncan.
llvm-svn: 60043
2008-11-25 19:40:17 +00:00
Bill Wendling bf592fccd4 Now with the correct type for the 0.
llvm-svn: 60016
2008-11-25 08:19:22 +00:00
Bill Wendling d06c625b95 Get rid of unused variable.
llvm-svn: 60015
2008-11-25 08:13:20 +00:00
Bill Wendling 4498b47677 Hacker's Delight says, "Signed integer overflow of addition occurs if and only
if the operands have the same sign and the sum has sign opposite to that of the
operands."

llvm-svn: 60014
2008-11-25 08:12:19 +00:00
Dan Gohman ad2134d45d Initial support for anti-dependence breaking. Currently this code does not
introduce any new spilling; it just uses unused registers.

Refactor the SUnit topological sort code out of the RRList scheduler and
make use of it to help with the post-pass scheduler.

llvm-svn: 59999
2008-11-25 00:52:40 +00:00
Bill Wendling 66835479d7 - Make lowering of "add with overflow" customizable by back-ends.
- Mark "add with overflow" as having a custom lowering for X86. Give it a null
  lowering representation for now.

llvm-svn: 59971
2008-11-24 19:21:46 +00:00
Dan Gohman 5cc12a8e31 Check in the rest of this change. The isAntiDep flag needs to be passed
to removePred because an SUnit can both data-depend and anti-depend
on the same SUnit.

llvm-svn: 59969
2008-11-24 17:33:52 +00:00
Duncan Sands dc2dac181a If the type legalizer actually legalized anything
(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types.  I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.

llvm-svn: 59960
2008-11-24 14:53:14 +00:00
Evan Cheng a8fd1f2c8e Eliminate some unused variable compile time warnings.
llvm-svn: 59952
2008-11-24 07:09:49 +00:00
Bill Wendling 2278f8f5e1 Add support for llvm.uadd.with.overflow.
llvm-svn: 59926
2008-11-24 01:38:29 +00:00
Duncan Sands 8d6e2e13d5 Rename SetCCResultContents to BooleanContents. In
practice these booleans are mostly produced by SetCC,
however the concept is more general.

llvm-svn: 59911
2008-11-23 15:47:28 +00:00
Mon P Wang 2967480f54 Added check to avoid generating extract subvector beyond the end of the vector when normalizing vector shuffles.
llvm-svn: 59900
2008-11-23 04:35:05 +00:00
Bill Wendling 5424e6d4ec Cleanup of the [SU]ADDO type legalization code. Patch by Duncan!
"It simplifies the type legalization part a bit, and produces better code by
teaching SelectionDAG about the extra bits in an i8 SADDO/UADDO node.  In
essence, I spontaneously decided that on x86 this i8 boolean result would be
either 0 or 1, and on other platforms 0/1 or 0/-1, depending on whether the
platform likes it's boolean zero extended or sign extended."

llvm-svn: 59864
2008-11-22 07:24:01 +00:00
Bill Wendling be8e7f851c - Move conversion of [SU]ADDO from DAG combiner into legalizer.
- Add "promote integer type" stuff to the legalizer for these nodes.

llvm-svn: 59847
2008-11-22 00:22:52 +00:00
Dan Gohman 8dfa51c5ef Update comments.
llvm-svn: 59834
2008-11-21 19:10:41 +00:00
Chris Lattner dd7083452f reapply Sanjiv's patch to genericize memcpy/memset/memmove to take an
arbitrary integer width for the count.

llvm-svn: 59823
2008-11-21 16:42:48 +00:00
Bill Wendling 4bce2bff88 Revert r59802. It was breaking the build of llvm-gcc:
g++ -m32 -c -g -DIN_GCC -W -Wall -Wwrite-strings -Wmissing-format-attribute -fno-common -mdynamic-no-pic -DHAVE_CONFIG_H -Wno-unused -DTARGET_NAME=\"i386-apple-darwin9.5.0\" -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include  -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DENABLE_LLVM -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/../llvm.src/include  -D_DEBUG  -D_GNU_SOURCE -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS   -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include  -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include ../../llvm-gcc.src/gcc/llvm-types.cpp -o llvm-types.o
../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemCpy(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)':
../../llvm-gcc.src/gcc/llvm-convert.cpp:1496: error: 'memcpy_i32' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp:1496: error: 'memcpy_i64' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemMove(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)':
../../llvm-gcc.src/gcc/llvm-convert.cpp:1512: error: 'memmove_i32' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp:1512: error: 'memmove_i64' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemSet(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)':
../../llvm-gcc.src/gcc/llvm-convert.cpp:1528: error: 'memset_i32' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp:1528: error: 'memset_i64' is not a member of 'llvm::Intrinsic'
make[3]: *** [llvm-convert.o] Error 1
make[3]: *** Waiting for unfinished jobs....
rm fsf-funding.pod gcov.pod gfdl.pod cpp.pod gpl.pod gcc.pod
make[2]: *** [all-stage1-gcc] Error 2
make[1]: *** [stage1-bubble] Error 2
make: *** [all] Error 2

llvm-svn: 59809
2008-11-21 09:09:41 +00:00
Sanjiv Gupta 09a203765a Make mem[cpy,move,set] intrinsics overloaded.
llvm-svn: 59802
2008-11-21 07:49:09 +00:00
Bill Wendling 0b5be6c5e0 Default to converting UADDO to the generic form that SADDO is converted to.
llvm-svn: 59801
2008-11-21 07:44:30 +00:00
Mon P Wang c311360909 Clean up normalization of shuffles
llvm-svn: 59792
2008-11-21 04:25:21 +00:00
Bill Wendling 5eee74446d Combine the two add with overflow intrinsics lowerings. They differ only in DAG node type.
llvm-svn: 59788
2008-11-21 02:38:44 +00:00
Bill Wendling 87c175e629 Generate code for llvm.uadd.with.overflow intrinsic. No conversion support yet.
llvm-svn: 59786
2008-11-21 02:33:36 +00:00
Dan Gohman f00cef4491 Add a flag to SDep for tracking which edges are anti-dependence edges.
llvm-svn: 59785
2008-11-21 02:27:52 +00:00
Bill Wendling 8badb674eb Remove chains. Unnecessary.
llvm-svn: 59783
2008-11-21 02:22:59 +00:00
Dan Gohman 67b35bd4d1 Rename SDep's isSpecial to isArtificial, to make this field a little
less mysterious.

llvm-svn: 59782
2008-11-21 02:18:56 +00:00
Bill Wendling 77538cc510 Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"
because the boolean it returns to indicate an overflow may not be treated like
as a flag. It could be stored to memory, for instance.

llvm-svn: 59780
2008-11-21 02:12:42 +00:00
Bill Wendling 74296c60ff Implement the sadd_with_overflow intrinsic. This is converted into
"ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the
addition and then checks if the result is less than one of the operands. (If it
is, then there was an overflow.)

llvm-svn: 59779
2008-11-21 02:03:52 +00:00
Dan Gohman d1f33e2397 Use ComputeLatency in the MachineInstr scheduler.
llvm-svn: 59777
2008-11-21 01:44:51 +00:00
Dan Gohman 63be531e09 Remove the CycleBound computation code from the ScheduleDAGRRList
schedulers. This doesn't have much immediate impact because
targets that use these schedulers by default don't yet provide
pipeline information.

This code also didn't have the benefit of register pressure
information. Also, removing it will avoid problems with list-burr
suddenly starting to do latency-oriented scheduling on x86 when we
start providing pipeline data, which would increase spilling.

llvm-svn: 59775
2008-11-21 01:30:54 +00:00
Dan Gohman 7b7ca502fa Implement ComputeLatency for MachineInstr ScheduleDAGs. Factor
some of the latency computation logic out of the SDNode
ScheduleDAG code into a TargetInstrItineraries helper method
to help with this.

llvm-svn: 59761
2008-11-21 00:12:10 +00:00
Bill Wendling 39acb29ff8 Add UADDO and SADDO nodes. These will be used for determining an overflow
condition in an addition operation.

llvm-svn: 59760
2008-11-21 00:11:16 +00:00
Dan Gohman c602dd407c Change these schedulers to not emit no-ops. It turns out that
the RR scheduler actually does look at latency values, but it
doesn't use a hazard recognizer so it has no way to know when
a no-op is needed, as opposed to just stalling and incrementing
the cycle count.

llvm-svn: 59759
2008-11-21 00:10:42 +00:00
Duncan Sands 3fa0a5afab Add some documentation.
llvm-svn: 59727
2008-11-20 10:34:43 +00:00
Bill Wendling 165b45d385 80-column violation.
llvm-svn: 59718
2008-11-20 07:24:30 +00:00
Dan Gohman 8e066a1349 Remove a remnant of list-burr's fast mode.
llvm-svn: 59702
2008-11-20 03:32:45 +00:00
Dan Gohman 186f65d275 Factor out the SethiUllman numbering logic from the list-burr and
list-tdrr schedulers into a common base class.

llvm-svn: 59701
2008-11-20 03:30:37 +00:00
Dan Gohman fd08af4ee7 Remove the "fast" form of the list-burr scheduler, and use the
dedicated "fast" scheduler in -fast mode instead, which is
faster. This speeds up llc -fast by a few percent on some
testcases -- the speedup only happens for code not handled by
fast-isel.

llvm-svn: 59700
2008-11-20 03:11:19 +00:00
Dan Gohman 3f656dfa03 Facter AddPseudoTwoAddrDeps and associated infrasructure out of
the list-burr scheduler so that it can be used by the list-tdrr
scheduler too.

llvm-svn: 59698
2008-11-20 02:45:51 +00:00
Dan Gohman 4ce15e12b9 Factor out the code for verifying the work of the scheduler,
extend it a bit, and make use of it in all schedulers, to
ensure consistent checking.

llvm-svn: 59689
2008-11-20 01:26:25 +00:00
Dan Gohman 4c3034f711 Simplify this code a little. In the fast scheduler, CreateNewSUnit
and CreateClone don't add any extra value.

llvm-svn: 59679
2008-11-19 23:39:02 +00:00
Dan Gohman 60cb69e665 Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.

This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.

The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.

llvm-svn: 59676
2008-11-19 23:18:57 +00:00
Dan Gohman f4d95fdce9 Move the code for printing a graph node label for an SUnit into
a virtual method of SelectionDAG.

llvm-svn: 59667
2008-11-19 22:09:45 +00:00
Dan Gohman 78fb6214f3 Convert SUnit's dump method into a print method and implement
dump in terms of it.

llvm-svn: 59665
2008-11-19 21:32:03 +00:00
Dan Gohman 82016c243b Rearrange code to reduce the nesting level. No functionality change.
llvm-svn: 59580
2008-11-19 02:00:32 +00:00
Dan Gohman eb87975384 Fix debug printing of flagged SDNodes in SUnits so that they
print in the correct order.

llvm-svn: 59567
2008-11-19 00:04:44 +00:00
Dan Gohman 6e58726416 Tidy up ScheduleNodeBottomUp methods, and make them more
consistent with ScheduleNodeTopDown methods.

llvm-svn: 59550
2008-11-18 21:22:20 +00:00
Dan Gohman 71b632f905 Update a comment to reflect the current code.
llvm-svn: 59549
2008-11-18 21:14:44 +00:00
Duncan Sands 3ca78c675e Remove integer promotion support for FP_EXTEND
and FP_ROUND.  Not sure what these were doing
here - probably they were sometimes (wrongly)
created with integer operands somewhere that
has since been fixed.

llvm-svn: 59548
2008-11-18 21:13:59 +00:00
Duncan Sands 97933c3990 Simplify code using helper routines. There is not
supposed to be any functionality change.

llvm-svn: 59545
2008-11-18 20:56:22 +00:00
Dan Gohman 1132313e71 Whitespace cleanups.
llvm-svn: 59532
2008-11-18 17:05:42 +00:00
Duncan Sands 789dbb906d LegalizeTypes support for splitting and scalarizing
SCALAR_TO_VECTOR.  I didn't add the testcase, because
once llc gets past scalar-to-vector it hits a SPU target
lowering bug and explodes.

llvm-svn: 59530
2008-11-18 16:40:48 +00:00
Bill Wendling 13020d22da Rename stackprotector_create intrinsic to stackprotector.
llvm-svn: 59519
2008-11-18 11:01:33 +00:00
Duncan Sands 1315f80ea8 Reapply r59464, this time using the correct type
when softening FNEG.

llvm-svn: 59513
2008-11-18 09:15:03 +00:00
Bill Wendling 7235002bd1 Remove the stackprotector_check intrinsic. Use a volatile load instead.
llvm-svn: 59504
2008-11-18 07:30:57 +00:00
Dan Gohman fe1748da07 Fix a typo in a comment.
llvm-svn: 59489
2008-11-18 02:50:01 +00:00
Dan Gohman 22d07b14bc Change SUnit's dump method to take a ScheduleDAG* instead of
a SelectionDAG*.

llvm-svn: 59488
2008-11-18 02:06:40 +00:00
Bill Wendling e0d5e67c98 Revert r59464. It was causing this failure:
Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll
Failed with signal(SIGABRT) at line 1
while running:  llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll |  llc -march=xcore > fneg.ll.tmp1.s
Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913.
0   llc                                 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844
1   libSystem.B.dylib                   0x9217809b _sigtramp + 43
2   ???                                 0xffffffff 0x0 + 4294967295
3   libSystem.B.dylib                   0x921f0ec2 raise + 26
4   libSystem.B.dylib                   0x9220047f abort + 73
5   libSystem.B.dylib                   0x921f2063 __assert_rtn + 101
6   llc                                 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1
make: *** [check] Error 2

llvm-svn: 59487
2008-11-18 01:49:24 +00:00
Dan Gohman 5ebdb98a6e Avoid using a loop in ReleasePred and ReleaseSucc methods to compute the
new CycleBound value. Instead, just update CycleBound on each call.
Also, make ReleasePred and ReleaseSucc methods more consistent accross
the various schedulers.

This also happens to make ScheduleDAGRRList's CycleBound computation
somewhat more interesting, though it still doesn't have any noticeable
effect, because no current targets that use the register-pressure
reduction scheduler provide pipeline models.

llvm-svn: 59475
2008-11-18 00:38:59 +00:00
Dan Gohman 92a36d7a78 Eliminate some trivial differences between the ScheduleNodeTopDown
functions in these two schedulers.

llvm-svn: 59465
2008-11-17 21:31:02 +00:00
Duncan Sands f046b50ecd Add soft float support for a bunch more operations. Original
patch by Richard Osborne, tweaked and extended by your humble
servant.

llvm-svn: 59464
2008-11-17 20:52:38 +00:00
Dan Gohman 4f474b092e Don't bother doing latency calculations in the "fast" scheduler.
llvm-svn: 59461
2008-11-17 19:52:36 +00:00
Dan Gohman a687fd8339 Use SUnit's CycleBound field instead of duplicating it in
a side-car datastructure

llvm-svn: 59458
2008-11-17 19:45:19 +00:00
Richard Osborne 6751b4a604 Don't produce ADDC/ADDE when expanding SHL unless they are legal
for the target. This fixes PR3080.

llvm-svn: 59450
2008-11-17 17:34:31 +00:00
Dan Gohman 17c226b8ca Don't use the isPending flag to mean what the isAvailable flag means.
llvm-svn: 59445
2008-11-17 16:37:30 +00:00
Mon P Wang 4964368e0d Fixed legalization of CONVERT_RNDSAT for integers.
llvm-svn: 59432
2008-11-17 00:41:12 +00:00
Mon P Wang 7a82474387 Improved shuffle normalization to avoid using extract/build when we
can extract using different indexes for two vectors. Added a few tests
for vector shuffles.

llvm-svn: 59399
2008-11-16 05:06:27 +00:00
Duncan Sands da8d2873ed When splitting a SHUFFLE_VECTOR, try to have the result
use SHUFFLE_VECTOR instead.  If not practical, fall back
to the old scheme of building the split result by hand
using a BUILD_VECTOR.

llvm-svn: 59361
2008-11-15 09:25:38 +00:00
Mon P Wang f414cbc1fd Add missing widen operations, fixed widening for extracting a subvector,
and when loading/storing a widen vector, make sure that they are loaded
and stored in consecutive order.

llvm-svn: 59357
2008-11-15 06:05:52 +00:00
Dan Gohman 68294c06fe Correct a comment.
llvm-svn: 59341
2008-11-15 00:24:23 +00:00
Dan Gohman d2760c0473 Move ScheduleDAGList's LatencyPriorityQueue class out to a separate file.
llvm-svn: 59340
2008-11-15 00:23:40 +00:00
Dan Gohman 1472955eab Add support for building a ScheduleDAG from MachineInstrs. This is currently
fairly conservative; it doesn't do alias-analysis queries and it doesn't
attempt to break anti-dependencies.

llvm-svn: 59324
2008-11-14 21:47:58 +00:00
Dan Gohman db8b95a4fa For post-regalloc scheduling, remove the instructions from the block
before re-inserting them.

llvm-svn: 59281
2008-11-14 00:33:17 +00:00
Dan Gohman 1a21ab6925 Check in the correct version of the patch in r59279.
llvm-svn: 59280
2008-11-14 00:32:34 +00:00
Dan Gohman 8f973f157d Debug printing for SUnits that carry MachineInstrs.
llvm-svn: 59279
2008-11-14 00:28:56 +00:00
Dan Gohman ee8273e52f Initial support for carrying MachineInstrs in SUnits.
llvm-svn: 59278
2008-11-14 00:06:09 +00:00
Dan Gohman a2cbbaa41f Change DOTGraphTraits<ScheduleDAG*>::getGraphName how to find the name of
the current function on its own, rather than relying on the SelectionDAG.

llvm-svn: 59277
2008-11-13 23:45:55 +00:00
Dan Gohman 072734ebd6 Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit
to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.

The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.

llvm-svn: 59273
2008-11-13 23:24:17 +00:00
Dan Gohman 1ddfcba5be Make the Node member of SUnit private, and add accessors.
llvm-svn: 59264
2008-11-13 21:36:12 +00:00
Dan Gohman 5a390b974c Change ScheduleDAG's DAG member from a reference to a pointer, to prepare
for the possibility of scheduling without a SelectionDAG being present.

llvm-svn: 59263
2008-11-13 21:21:28 +00:00
Dan Gohman 88ba5f0b96 Move the code that inserts X87 FP_REG_KILL instructions from a
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.

llvm-svn: 59190
2008-11-12 22:55:05 +00:00