Commit Graph

268 Commits

Author SHA1 Message Date
Chris Lattner 0cd6c2a047 eliminate all the dead addSimpleCodeEmitter implementations.
eliminate random "code emitter" stuff in Alpha, except for
the JIT path.  Next up, remove the template cruft.

llvm-svn: 95131
2010-02-02 21:31:47 +00:00
Jim Grosbach 04770f2aa1 For aligned load/store instructions, it's only required to know whether a
function can support dynamic stack realignment. That's a much easier question
to answer at instruction selection stage than whether the function actually
will have dynamic alignment prologue. This allows the removal of the
stack alignment heuristic pass, and improves code quality for cases where
the heuristic would result in dynamic alignment code being generated when
it was not strictly necessary.

llvm-svn: 93885
2010-01-19 18:31:11 +00:00
Jim Grosbach 2c3a6c6589 Factor the stack alignment calculations out into a target independent pass.
No functionality change.

llvm-svn: 90336
2009-12-02 19:30:24 +00:00
Jim Grosbach 01c1cae34d Detect need for autoalignment of the stack earlier to catch spills more
conservatively. eliminateFrameIndex() machinery adjust to handle addr mode
6 (vld1/vst1) used for spills. Fix tests to expect aligned Q-reg spilling

llvm-svn: 88874
2009-11-15 21:45:34 +00:00
Chris Lattner 8714348afd indicate what the native integer types for the target are.
Please verify.

llvm-svn: 86397
2009-11-07 19:07:32 +00:00
Evan Cheng 207b246650 - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative
load of a GV from constantpool and then add pc. It allows the code sequence to
  be rematerializable so it would be hoisted by machine licm.
- Add a late pass to break these pseudo instructions into a number of real
  instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm
  to this pass. This is done before post regalloc scheduling to allow the
  scheduler to proper schedule these instructions. It also allow them to be
  if-converted and shrunk by later passes.

llvm-svn: 86304
2009-11-06 23:52:48 +00:00
Daniel Dunbar ad36e8aceb Pass StringRef by value.
llvm-svn: 86251
2009-11-06 10:58:06 +00:00
Anton Korobeynikov 76a4774a0d Move subtarget check upper for NEON reg-reg fixup pass.
llvm-svn: 85914
2009-11-03 18:46:11 +00:00
Anton Korobeynikov d195f9e5c3 Turn neon reg-reg moves fixup code into separate pass. This should reduce the compile time.
llvm-svn: 85850
2009-11-03 01:04:26 +00:00
Bob Wilson 97b9312663 Revert r85346 change to control tail merging by CodeGenOpt::Level.
I'm going to redo this using the OptimizeForSize function attribute.

llvm-svn: 85426
2009-10-28 20:46:46 +00:00
Bob Wilson 9693f9d465 Record CodeGen optimization level in the BranchFolding pass so that we can
use it to control tail merging when there is a tradeoff between performance
and code size.  When there is only 1 instruction in the common tail, we have
been merging.  That can be good for code size but is a definite loss for
performance.  Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3".  Radar 7338114.

Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level.  Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor.  If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.

llvm-svn: 85346
2009-10-27 23:49:38 +00:00
Bob Wilson 9d763cc3f8 Revert 84843. Evan, this was breaking some of the if-conversion tests.
llvm-svn: 84868
2009-10-22 16:52:21 +00:00
Evan Cheng 3615b9bef3 Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly.
llvm-svn: 84843
2009-10-22 06:48:32 +00:00
Evan Cheng 344fcd9d61 Trim include.
llvm-svn: 84831
2009-10-22 05:08:49 +00:00
Evan Cheng 2dcee28a61 Move load / store multiple before post-alloc scheduling.
llvm-svn: 83236
2009-10-02 04:57:15 +00:00
Evan Cheng ce5a8ca3ef Add a option which would move ld/st multiple pass before post-alloc scheduling.
llvm-svn: 83145
2009-09-30 08:53:01 +00:00
Bob Wilson 2dd957fff6 Pass the optimization level when constructing the ARM instruction selector.
Otherwise, it is always set to "default", which prevents debug info from
even being generated during isel.  Radar 7250345.

llvm-svn: 82988
2009-09-28 14:30:20 +00:00
Evan Cheng a6b9cab822 Enable pre-regalloc load / store multiple pass for Thumb2.
llvm-svn: 82893
2009-09-27 09:46:04 +00:00
Evan Cheng 6a3bdd872c Really remove this option.
llvm-svn: 82838
2009-09-26 02:49:49 +00:00
Evan Cheng d0fe5abc23 Remove a couple of unused command line options.
llvm-svn: 82837
2009-09-26 02:45:45 +00:00
Jim Grosbach 04f9d2e264 trivial whitespace cleanup
llvm-svn: 81773
2009-09-14 17:27:35 +00:00
Chris Lattner 054574666a rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin.
llvm-svn: 79773
2009-08-22 21:03:30 +00:00
Chris Lattner 7b26fce23e Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
llvm-svn: 79763
2009-08-22 20:48:53 +00:00
Evan Cheng 6ddd7bcdd1 Turn on if-conversion for thumb2.
llvm-svn: 79084
2009-08-15 07:59:10 +00:00
Daniel Dunbar 86c065dd68 Revert 78892 and 78895, these break generating working executables on
x86_64-apple-darwin10.

--- Reverse-merging r78895 into '.':
U    test/CodeGen/PowerPC/2008-12-12-EH.ll
U    lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U    include/llvm/Target/DarwinTargetAsmInfo.h
U    lib/Target/X86/X86TargetAsmInfo.cpp
U    lib/Target/X86/X86TargetAsmInfo.h
U    lib/Target/ARM/ARMTargetAsmInfo.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/ARMTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.h
U    lib/Target/PowerPC/PPCTargetMachine.cpp
G    lib/Target/DarwinTargetAsmInfo.cpp

llvm-svn: 78919
2009-08-13 17:03:38 +00:00
Chris Lattner eb68198145 fix a minor fixme. When building with SL and later tools, the ".eh" symbols
don't need to be exported from the .o files.

llvm-svn: 78892
2009-08-13 05:30:22 +00:00
Chris Lattner 9a6cf91261 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802
2009-08-12 07:22:17 +00:00
Chris Lattner 2c30970b22 pass the TargetTriple down from each target ctor to the
LLVMTargetMachine ctor.  It is currently unused.

llvm-svn: 78711
2009-08-11 20:42:37 +00:00
Jim Grosbach f24f9d9cb6 Whitespace cleanup. Remove trailing whitespace.
llvm-svn: 78666
2009-08-11 15:33:49 +00:00
Evan Cheng 6e62e93a8d Adding a blank line back.
llvm-svn: 78654
2009-08-11 07:32:58 +00:00
Evan Cheng 475f8a4fa2 Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck.
llvm-svn: 78622
2009-08-10 23:56:04 +00:00
Evan Cheng 1be453b462 Add a skeleton Thumb2 instruction size reduction pass.
llvm-svn: 78456
2009-08-08 03:21:23 +00:00
Bob Wilson e148ceaf65 Add a new pre-allocation pass to assign adjacent registers for Neon instructions
that have that constraint.  This is currently just assigning a fixed set of
registers, and it only handles VLDn for n=2,3,4 with DPR registers.
I'm going to expand it to handle more operations next; we can make it smarter
once everything is working correctly.

llvm-svn: 78256
2009-08-05 23:12:45 +00:00
Bob Wilson 85f60cc5a8 Oops. I didn't mean to commit this piece yet.
llvm-svn: 78146
2009-08-05 02:47:13 +00:00
Bob Wilson 20f79e321e Change DAG nodes for Neon VLD2/3/4 operations to return multiple results.
Get rid of yesterday's code to fix the register usage during isel.
Select the new DAG nodes to machine instructions.  The new pre-alloc pass
to choose adjacent registers for these results is not done, so the
results of this will generally not assemble yet.

llvm-svn: 78136
2009-08-05 00:49:09 +00:00
Evan Cheng 783b65b546 Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
llvm-svn: 78104
2009-08-04 21:12:13 +00:00
Daniel Dunbar c3719c36e6 Move most targets TargetMachine constructor to only taking a target triple.
- The C, C++, MSIL, and Mips backends still need the module.

llvm-svn: 77927
2009-08-02 23:37:13 +00:00
Daniel Dunbar 31b44e8f6c Normalize Subtarget constructors to take a target triple string instead of
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918
2009-08-02 22:11:08 +00:00
Chris Lattner 8a0db7516e ARM TAI no longer needs a TM, but createTargetAsmInfo() still does.
llvm-svn: 77878
2009-08-02 05:23:52 +00:00
Chris Lattner 375a01c34a remove dead code.
llvm-svn: 77233
2009-07-27 19:00:33 +00:00
Daniel Dunbar 5680b4f285 Add new helpers for registering targets.
- Less boilerplate == good.

llvm-svn: 77052
2009-07-25 06:49:55 +00:00
Daniel Dunbar 67038c1333 Put Target definitions inside Target specific header, and llvm namespace.
llvm-svn: 76344
2009-07-18 23:03:22 +00:00
Daniel Dunbar c151c51ea0 Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink
variables.
 - Module initialization functions supplanted the need for these.

llvm-svn: 75886
2009-07-16 01:55:13 +00:00
Daniel Dunbar d97db682a3 Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.

llvm-svn: 75859
2009-07-15 23:34:19 +00:00
Daniel Dunbar c901392ba4 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.

llvm-svn: 75848
2009-07-15 22:33:19 +00:00
Daniel Dunbar 5302288c90 Remove old style hacks to register AsmPrinter into TargetMachine.
- No intended functionality change.

llvm-svn: 75843
2009-07-15 22:01:32 +00:00
Daniel Dunbar e833810a5e Reapply TargetRegistry refactoring commits.
--- Reverse-merging r75799 into '.':
 U   test/Analysis/PointerTracking
U    include/llvm/Target/TargetMachineRegistry.h
U    include/llvm/Target/TargetMachine.h
U    include/llvm/Target/TargetRegistry.h
U    include/llvm/Target/TargetSelect.h
U    tools/lto/LTOCodeGenerator.cpp
U    tools/lto/LTOModule.cpp
U    tools/llc/llc.cpp
U    lib/Target/PowerPC/PPCTargetMachine.h
U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U    lib/Target/PowerPC/PPCTargetMachine.cpp
U    lib/Target/PowerPC/PPC.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/ARMTargetMachine.h
U    lib/Target/ARM/ARM.h
U    lib/Target/XCore/XCoreTargetMachine.cpp
U    lib/Target/XCore/XCoreTargetMachine.h
U    lib/Target/PIC16/PIC16TargetMachine.cpp
U    lib/Target/PIC16/PIC16TargetMachine.h
U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U    lib/Target/Alpha/AlphaTargetMachine.cpp
U    lib/Target/Alpha/AlphaTargetMachine.h
U    lib/Target/X86/X86TargetMachine.h
U    lib/Target/X86/X86.h
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.h
U    lib/Target/CppBackend/CPPTargetMachine.h
U    lib/Target/CppBackend/CPPBackend.cpp
U    lib/Target/CBackend/CTargetMachine.h
U    lib/Target/CBackend/CBackend.cpp
U    lib/Target/TargetMachine.cpp
U    lib/Target/IA64/IA64TargetMachine.cpp
U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U    lib/Target/IA64/IA64TargetMachine.h
U    lib/Target/IA64/IA64.h
U    lib/Target/MSIL/MSILWriter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.h
U    lib/Target/CellSPU/SPU.h
U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.cpp
U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U    lib/Target/Mips/MipsTargetMachine.cpp
U    lib/Target/Mips/MipsTargetMachine.h
U    lib/Target/Mips/Mips.h
U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U    lib/Target/Sparc/SparcTargetMachine.cpp
U    lib/Target/Sparc/SparcTargetMachine.h
U    lib/ExecutionEngine/JIT/TargetSelect.cpp
U    lib/Support/TargetRegistry.cpp

llvm-svn: 75820
2009-07-15 20:24:03 +00:00
Stuart Hastings 338191cd67 Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
Will revert 75770 in the llvm-gcc trunk.

llvm-svn: 75799
2009-07-15 17:27:11 +00:00
Daniel Dunbar eb8c83b4c3 Replace large swaths of copy-n-paste code with obvious helper function...
- Which was already present in the module!

 - I skipped this xform for Alpha, since it runs an extra pass during assembly
   emission, but not when emitting assembly via the DumpAsm flag.

 - No functionality change.

--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
  18 -      PM.add(AsmPrinterCtor(ferrs(), *this, true));
  18 -    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
  18 -    if (AsmPrinterCtor)
  18 -  if (DumpAsm) {
  18 -  }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
  18 +    addAssemblyEmitter(PM, OptLevel, true, ferrs());
  18 +  if (DumpAsm)
--

llvm-svn: 75782
2009-07-15 12:49:15 +00:00
Daniel Dunbar 863e587d27 Kill off old (TargetMachine level, not Target level) match quality functions.
llvm-svn: 75780
2009-07-15 12:26:05 +00:00
Daniel Dunbar 6db8134e80 Provide TargetMachine implementations with reference to Target they were created
from.
 - This commit is almost entirely propogating the reference through the
   TargetMachine subclasses' constructor calls.

llvm-svn: 75778
2009-07-15 12:11:05 +00:00
Daniel Dunbar b22f50e4c4 Register Target's TargetMachine and AsmPrinter in the new registry.
- This abuses TargetMachineRegistry's constructor for now, this will get
   cleaned up in time.

llvm-svn: 75762
2009-07-15 09:22:31 +00:00
David Greene a31f96cf2b Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.

llvm-svn: 75670
2009-07-14 20:18:05 +00:00
Evan Cheng 0f9cce7951 Add a thumb2 pass to insert IT blocks.
llvm-svn: 75218
2009-07-10 01:54:42 +00:00
Bruno Cardoso Lopes 5661ea68e7 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
2009-07-06 05:09:34 +00:00
David Goodwin ade05a37f1 Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.
llvm-svn: 74731
2009-07-02 22:18:33 +00:00
Daniel Dunbar 75c12e1569 Remove unused AsmPrinter OptLevel argument, and propogate.
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.

llvm-svn: 74579
2009-07-01 01:48:54 +00:00
Anton Korobeynikov 99152f3a2c Split thumb-related stuff into separate classes.
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

llvm-svn: 74329
2009-06-26 21:28:53 +00:00
Bob Wilson 5a495fea07 Provide InitializeAllTargets and InitializeNativeTarget functions in the
C bindings.  Change all the backend "Initialize" functions to have C linkage.
Change the "llvm/Config/Targets.def" header to use C-style comments to avoid
compile warnings.

llvm-svn: 74026
2009-06-23 23:59:40 +00:00
Evan Cheng b4b20bbb7d Enable arm pre-allocation load / store multiple optimization pass.
llvm-svn: 73791
2009-06-19 23:17:27 +00:00
Evan Cheng 4e712de541 Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits.
llvm-svn: 73747
2009-06-19 01:51:50 +00:00
Douglas Gregor 1b731d5dbe Introduce new headers whose inclusion forces linking and
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.

llvm-svn: 73543
2009-06-16 20:12:29 +00:00
Evan Cheng 185c9ef0a2 Add a ARM specific pre-allocation pass that re-schedule loads / stores from
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.

llvm-svn: 73291
2009-06-13 09:12:55 +00:00
Bruno Cardoso Lopes a194c3a69e First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray

llvm-svn: 72631
2009-05-30 20:51:52 +00:00
Bill Wendling 026e5d7667 Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
2009-04-29 23:29:43 +00:00
Bill Wendling 084669a1c9 Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343
2009-04-29 00:15:41 +00:00
Bill Wendling 56f2987a87 r70270 isn't ready yet. Back this out. Sorry for the noise.
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
Bill Wendling d0ae15946c Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

llvm-svn: 70270
2009-04-28 00:21:31 +00:00
Evan Cheng 5e5a63cf8f CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
Evan Cheng 0ee0da841d ARM target now also recognize triplets like thumbv6-apple-darwin and set thumb mode and arch subversion. Eventually thumb triplets will go way and replaced with function notes.
llvm-svn: 66435
2009-03-09 20:25:39 +00:00
Bill Wendling c5437ea429 Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.

llvm-svn: 65379
2009-02-24 08:30:20 +00:00
Oscar Fuentes ba4eb2a9db Adds extern "C" ints to the .cpp files that use RegisterTarget, as
well as 2 files that use "Registrator"s. These are to be used by the
MSVC builds, as the Win32 linker does not include libs that are
otherwise unreferenced, even if global constructors in the lib have
side-effects.

Patch by Scott Graham!

llvm-svn: 59378
2008-11-15 21:36:30 +00:00
Evan Cheng 98161f5f34 Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated.
llvm-svn: 58896
2008-11-08 07:38:22 +00:00
Evan Cheng 66cff408ff ARM JIT should observe -relocation-model command line option.
llvm-svn: 58433
2008-10-30 16:10:54 +00:00
Dan Gohman 9c4b7d5c4f Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.

llvm-svn: 57521
2008-10-14 20:25:08 +00:00
Anton Korobeynikov 87001fd6fd Reapply 56585:56589 with proper fix for some gcc versions
llvm-svn: 56621
2008-09-25 21:00:33 +00:00
Evan Cheng 84301390ae Temporarily backing out 56585:56589 to unbreak the build.
llvm-svn: 56607
2008-09-25 07:38:08 +00:00
Anton Korobeynikov a9163feefe Get rid of virtual inheritance for ARM TAI
llvm-svn: 56587
2008-09-24 22:22:27 +00:00
Owen Anderson 9371964f47 Use raw_ostream throughout the AsmPrinter.
llvm-svn: 55092
2008-08-21 00:14:44 +00:00
Anton Korobeynikov 17d28de8ac Move ARM to pluggable asmprinter
llvm-svn: 54889
2008-08-17 13:55:10 +00:00
Anton Korobeynikov 04083529df Switch ARM to new section handling stuff
llvm-svn: 54458
2008-08-07 09:54:23 +00:00
Dan Gohman d78c400b5b Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017
2008-05-13 00:00:25 +00:00
Chris Lattner 888594bdf4 Match things like 'armv5tejl-unknown-linux-gnu' for PR2290
llvm-svn: 50698
2008-05-06 02:29:28 +00:00
Dan Gohman 24570836b2 Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng 8010320365 Enable if-conversion for ARM by default.
llvm-svn: 42156
2007-09-20 00:48:22 +00:00
Evan Cheng f7c6effc44 Initial JIT support for ARM by Raul Fernandes Herbster.
llvm-svn: 40887
2007-08-07 01:37:15 +00:00
Evan Cheng 9d5df0a5f6 Added -print-emitted-asm to print out JIT generated asm to cerr.
llvm-svn: 40123
2007-07-20 21:56:13 +00:00
Chris Lattner 517290ae52 The various "getModuleMatchQuality" implementations should return
zero if they see a target triple they don't understand.

llvm-svn: 38463
2007-07-09 17:25:29 +00:00
Evan Cheng 9546a5c7de Initial ARM JIT support by Raul Fernandes Herbster.
llvm-svn: 37926
2007-07-05 21:15:40 +00:00
Evan Cheng 4423687831 Move if-conversion after all passes that may use register scavenger.
llvm-svn: 37120
2007-05-16 20:52:46 +00:00
Evan Cheng ad3aac71ce Hooks for predication support.
llvm-svn: 37093
2007-05-16 02:01:49 +00:00
Evan Cheng 818242bbaf Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
llvm-svn: 35077
2007-03-13 01:20:42 +00:00
Evan Cheng 9f8301413c Added -march=thumb; removed -enable-thumb.
llvm-svn: 34521
2007-02-23 03:14:31 +00:00
Chris Lattner 945e437c65 Generalize TargetData strings, to support more interesting forms of data.
Patch by Scott Michel.

llvm-svn: 34266
2007-02-14 05:52:17 +00:00
Lauro Ramos Venancio 50c6a8c3a1 Add space between // and the comment.
llvm-svn: 34246
2007-02-13 20:06:15 +00:00
Lauro Ramos Venancio 048e16ff8f Add ABI information to ARM subtarget.
llvm-svn: 34245
2007-02-13 19:52:28 +00:00
Lauro Ramos Venancio 603f201cba According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned.
llvm-svn: 34241
2007-02-13 14:07:13 +00:00
Evan Cheng e724492566 Also set alignment of stack-based structs to 4 in thumb mode.
llvm-svn: 33741
2007-02-01 02:18:36 +00:00
Evan Cheng 1c5837dc4a Thumb add sp, #imm requires the immediate value be multiple of 4. For now,
change preferred alignment of short, byte, bool to 4.

llvm-svn: 33722
2007-01-31 22:08:40 +00:00
Evan Cheng 107015e2fa ARM AAPCS abi (Linux, etc.) requires 8-byte double / long alignment; Mac
requires 4-bytes alignment.

llvm-svn: 33448
2007-01-22 23:13:01 +00:00
Evan Cheng 4abf2e7bcc Double and Long preferred alignment is 4 for Darwin, 8 for Linux.
llvm-svn: 33440
2007-01-22 21:24:13 +00:00
Evan Cheng aa24f08926 Clean up ARM PEI code.
llvm-svn: 33389
2007-01-20 02:09:25 +00:00
Evan Cheng bf216c364f isDarwin -> isTargetDarwin
llvm-svn: 33366
2007-01-19 19:28:01 +00:00
Evan Cheng 10043e215b ARM backend contribution from Apple.
llvm-svn: 33353
2007-01-19 07:51:42 +00:00
Rafael Espindola 4ece5c04f4 revert previous patch
llvm-svn: 31411
2006-11-03 03:08:28 +00:00
Rafael Espindola 38b162c1d2 add createCFGSimplificationPass to ARMTargetMachine::addInstSelector
llvm-svn: 31400
2006-11-03 01:39:25 +00:00
Rafael Espindola 78d6c2bf59 most ARM targets are little endian
llvm-svn: 30826
2006-10-09 14:12:15 +00:00
Rafael Espindola f7d4a9900c Implement a MachineFunctionPass to fix the mul instruction
llvm-svn: 30485
2006-09-19 15:49:25 +00:00
Jim Laskey ae92ce8798 1. Remove condition on delete.
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.

llvm-svn: 30169
2006-09-07 23:39:26 +00:00
Chris Lattner 12e97307a1 Completely rearchitect the interface between targets and the pass manager.
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.

llvm-svn: 30081
2006-09-04 04:14:57 +00:00
Chris Lattner 0fc4541c67 Simplify target construction.
llvm-svn: 30070
2006-09-03 18:44:02 +00:00
Rafael Espindola d0dee77718 initial support for select
llvm-svn: 29802
2006-08-21 22:00:32 +00:00
Rafael Espindola bf8e751488 Declare the callee saved regs
Remove the hard coded store and load of the link register
Implement ARMFrameInfo

llvm-svn: 29727
2006-08-16 14:43:33 +00:00
Rafael Espindola 1c41fc9b06 correctly set LocalAreaOffset of TargetFrameInfo
llvm-svn: 29589
2006-08-09 17:37:45 +00:00
Chris Lattner f3b5b92e58 Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
2006-06-16 18:22:52 +00:00
Owen Anderson 88812b5c0a Make all of the TargetMachine subclasses use the new string TargetData methods.
This is part of the on-going work on PR 761.

llvm-svn: 28414
2006-05-20 00:24:56 +00:00
Rafael Espindola ffdc24b847 added a skeleton of the ARM backend
llvm-svn: 28301
2006-05-14 22:18:28 +00:00