5 Commits

Author	SHA1	Message	Date
Christian Pirker	238c7c165b	ARM: Implement big endian bit-conversion for NEON type ... llvm-svn: 208538	2014-05-12 11:19:20 +00:00
Christian Pirker	b5728191c2	ARM big endian function argument passing ... llvm-svn: 208316	2014-05-08 14:06:24 +00:00
Tilmann Scheller	63872ce19f	ARM: Default to the Swift CPU when targeting armv7s/thumbv7s. ... Test cases adjusted accordingly. This fixes rdar://14871821. llvm-svn: 189766	2013-09-02 17:09:01 +00:00
Stephen Lin	f799e3f944	Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. ... This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. llvm-svn: 186258	2013-07-13 20:38:47 +00:00
Benjamin Kramer	bbae991db6	DAGCombiner: Fold a shuffle on CONCAT_VECTORS into a new CONCAT_VECTORS if possible. ... This pattern occurs in SROA output due to the way vector arguments are lowered on ARM. The testcase from PR15525 now compiles into this, which is better than the code we got with the old scalarrepl: _Store: ldr.w r9, [sp] vmov d17, r3, r9 vmov d16, r1, r2 vst1.8 {d16, d17}, [r0] bx lr Differential Revision: http://llvm-reviews.chandlerc.com/D647 llvm-svn: 179106	2013-04-09 17:41:43 +00:00