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2005 Commits

Author SHA1 Message Date
Evan Cheng 0f29df98a1 A few new entries. 
llvm-svn: 28683
 2006-06-04 09:08:00 +00:00
Evan Cheng 0de66677e7 Be consistent with gcc. 
llvm-svn: 28682
 2006-06-04 07:24:07 +00:00
Evan Cheng e8a42360c5 Cygwin support. Patch by Anton Korobeynikov! 
llvm-svn: 28672
 2006-06-02 22:38:37 +00:00
Evan Cheng a2efb9f3ec Use xor to clear a register. 
llvm-svn: 28667
 2006-06-02 21:20:34 +00:00
Evan Cheng 7ae8632cb4 Incorrect AT&T opcode. 
llvm-svn: 28666
 2006-06-02 21:09:10 +00:00
Chris Lattner b47b8a9fad Silence -pedantic warning. 
llvm-svn: 28630
 2006-06-01 17:13:10 +00:00
Evan Cheng 2b2c1be49c Typos 
llvm-svn: 28617
 2006-06-01 05:53:27 +00:00
Evan Cheng 2489ccdd90 Remove a warning 
llvm-svn: 28607
 2006-06-01 00:30:39 +00:00
Evan Cheng cfaffdd335 Rename ASM modifier trunc8, trunc16 to subreg8, subreg16. 
llvm-svn: 28606
 2006-05-31 22:34:26 +00:00
Evan Cheng cf70c7f42d Sign extender 
llvm-svn: 28603
 2006-05-31 22:05:11 +00:00
Evan Cheng 25e44e008d Rename instructions for consistency sake. 
llvm-svn: 28594
 2006-05-31 19:00:07 +00:00
Evan Cheng 8abf45e22d Select vector_shuffle v1, undef <2, 3, ?, ?> to MOVHLPS. 
llvm-svn: 28582
 2006-05-31 00:51:37 +00:00
Evan Cheng 550cb663e8 Remove dead code. 
llvm-svn: 28581
 2006-05-31 00:50:42 +00:00
Evan Cheng ddced95d8f A new entry 
llvm-svn: 28579
 2006-05-30 23:56:31 +00:00
Evan Cheng 57399704b3 MAXP{D|S} and MINP{D|S} are commutable. 
llvm-svn: 28578
 2006-05-30 23:47:30 +00:00
Evan Cheng c0f90bef47 Commute shufps / shufpd. 
llvm-svn: 28577
 2006-05-30 23:34:30 +00:00
Evan Cheng f21045a5cd Somehow I lost a condition when I was shuffling some code around. Anyway, 
only transform a shufps to pshufd when the first two operands are the same.

llvm-svn: 28575
 2006-05-30 22:13:36 +00:00
Evan Cheng c8c172eaae Fix a build breaker. 
llvm-svn: 28574
 2006-05-30 21:45:53 +00:00
Evan Cheng a4fc5b8699 Oops. PSHUFD is only available with SSE2. 
llvm-svn: 28573
 2006-05-30 21:30:59 +00:00
Evan Cheng 66f849bd7b Allow shufps x, x, mask to be converted to pshufd x, mask to save a move. 
llvm-svn: 28565
 2006-05-30 20:26:50 +00:00
Evan Cheng b33e54ead7 Remove bogus comment. 
llvm-svn: 28564
 2006-05-30 20:24:48 +00:00
Evan Cheng 02420144ab Add a note about integer multiplication by constants. 
llvm-svn: 28551
 2006-05-30 07:37:37 +00:00
Evan Cheng 734e1e241b A addressing mode folding enhancement: 
Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
  return (x << 3) + 7;
}

This can be codegen'd as:
leal 7(,%eax,8), %eax

llvm-svn: 28550
 2006-05-30 06:59:36 +00:00
Evan Cheng 749138582e Some new entries about truncate / anyext 
llvm-svn: 28548
 2006-05-30 06:23:50 +00:00
Evan Cheng a3add0fea8 Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
 2006-05-26 23:10:12 +00:00
Evan Cheng b92f418408 Vector argument must be passed in memory location aligned on 16-byte boundary. 
llvm-svn: 28505
 2006-05-26 20:37:47 +00:00
Evan Cheng bfb5ea6875 Mac OS X ABI document lied. The first four XMM registers are used to pass 
vector arguments, not three.

llvm-svn: 28504
 2006-05-26 19:22:06 +00:00
Evan Cheng a01e799927 Minor update to make the code more clear 
llvm-svn: 28499
 2006-05-26 18:39:59 +00:00
Evan Cheng cbfb3d07e0 Update more comments. 
llvm-svn: 28498
 2006-05-26 18:37:16 +00:00
Evan Cheng 763f9b00f0 Fix some comments. 
llvm-svn: 28497
 2006-05-26 18:25:43 +00:00
Evan Cheng 83dc51d7ff No need to handle illegal types. 
llvm-svn: 28496
 2006-05-26 18:22:49 +00:00
Evan Cheng 70145f2d5e Remove a couple of bogus casts. 
llvm-svn: 28493
 2006-05-26 08:04:31 +00:00
Evan Cheng 29296b844f Minor bug caught by Ashwin Chandra 
llvm-svn: 28491
 2006-05-26 06:22:34 +00:00
Evan Cheng 8aca43e8da Consistency 
llvm-svn: 28488
 2006-05-25 23:31:23 +00:00
Evan Cheng 0421aca87a Some clean up. 
llvm-svn: 28483
 2006-05-25 22:38:31 +00:00
Evan Cheng 29f805ec65 Remove some dead code. 
llvm-svn: 28481
 2006-05-25 22:25:52 +00:00
Evan Cheng 2554e3d9ba X86 / Cygwin asm / alignment fixes. 
Patch contributed by Anton Korobeynikov!

llvm-svn: 28480
 2006-05-25 21:59:08 +00:00
Evan Cheng 5ee96893ae Build breakage. 
llvm-svn: 28475
 2006-05-25 18:56:34 +00:00
Evan Cheng 2a33094284 Switch X86 over to a call-selection model where the lowering code creates 
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.

llvm-svn: 28463
 2006-05-25 00:59:30 +00:00
Evan Cheng 4af59dac0b Assert if InflightSet is not cleared after instruction selecting a BB. 
llvm-svn: 28459
 2006-05-25 00:24:28 +00:00
Evan Cheng 1a8e74d113 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.

llvm-svn: 28454
 2006-05-24 20:46:25 +00:00
Chris Lattner aa2372562e Patches to make the LLVM sources more -pedantic clean. Patch provided 
by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447
 2006-05-24 17:04:05 +00:00
Chris Lattner a58f559848 Fix file header comment 
llvm-svn: 28441
 2006-05-23 23:20:42 +00:00
Evan Cheng 7068a93cae Better way to check for vararg. 
llvm-svn: 28440
 2006-05-23 21:08:24 +00:00
Evan Cheng 17e734f0a6 Remove PreprocessCCCArguments and PreprocessFastCCArguments now that 
FORMAL_ARGUMENTS nodes include a token operand.

llvm-svn: 28439
 2006-05-23 21:06:34 +00:00
Chris Lattner 8be5be817c Implement an annoying part of the Darwin/X86 abi: the callee of a struct 
return argument pops the hidden struct pointer if present, not the caller.

For example, in this testcase:

struct X { int D, E, F, G; };
struct X bar() {
  struct X a;
  a.D = 0;
  a.E = 1;
  a.F = 2;
  a.G = 3;
  return a;
}
void foo(struct X *P) {
  *P = bar();
}

We used to emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
        addl $28, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
        ret

This is correct on Linux/X86 but not Darwin/X86.  With this patch, we now
emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
***     addl $24, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
***     ret $4

For the record, GCC emits (which is functionally equivalent to our new code):

_bar:
        movl    4(%esp), %eax
        movl    $3, 12(%eax)
        movl    $2, 8(%eax)
        movl    $1, 4(%eax)
        movl    $0, (%eax)
        ret     $4
_foo:
        pushl   %esi
        subl    $40, %esp
        movl    48(%esp), %esi
        leal    16(%esp), %eax
        movl    %eax, (%esp)
        call    _bar
        subl    $4, %esp
        movl    16(%esp), %eax
        movl    %eax, (%esi)
        movl    20(%esp), %eax
        movl    %eax, 4(%esi)
        movl    24(%esp), %eax
        movl    %eax, 8(%esi)
        movl    28(%esp), %eax
        movl    %eax, 12(%esi)
        addl    $40, %esp
        popl    %esi
        ret

This fixes SingleSource/Benchmarks/CoyoteBench/fftbench with LLC and the
JIT, and fixes the X86-backend portion of PR729.  The CBE still needs to
be updated.

llvm-svn: 28438
 2006-05-23 18:50:38 +00:00
Evan Cheng 26ba25f910 A isel deficiency. 
llvm-svn: 28427
 2006-05-22 05:54:49 +00:00
Evan Cheng 85b6232b53 Back out indirect branch load folding hack. It broke some tests. 
llvm-svn: 28425
 2006-05-21 06:28:50 +00:00
Owen Anderson 80b1b4d41e Make TargetData strings less redundant. 
llvm-svn: 28423
 2006-05-20 23:28:54 +00:00
Evan Cheng 401049ce33 - Use of load's chain result should be redirected to load's chain operand. 
If it reads the chain result of the call, then the use, callseq_start,
  and call would form a cycle!
- Don't forget handle node replacement!
- There could also be a TokenFactor between the load and the callseq_start.

llvm-svn: 28420
 2006-05-20 09:21:39 +00:00
Evan Cheng 0643f902be A new entry 
llvm-svn: 28419
 2006-05-20 07:44:53 +00:00
Evan Cheng a26c451fa2 Missing break statements. 
llvm-svn: 28418
 2006-05-20 07:44:28 +00:00
Evan Cheng b9ac06bb33 Remove unused patterns. 
llvm-svn: 28417
 2006-05-20 01:40:16 +00:00
Evan Cheng f838cfcfbe Handle indirect call which folds a load manually. This never matches by 
the TableGen generated code since the load's chain result is read by
the callseq_start node.

llvm-svn: 28416
 2006-05-20 01:36:52 +00:00
Owen Anderson 88812b5c0a Make all of the TargetMachine subclasses use the new string TargetData methods. 
This is part of the on-going work on PR 761.

llvm-svn: 28414
 2006-05-20 00:24:56 +00:00
Chris Lattner 01dd6df5f3 CSRet allows varargs 
llvm-svn: 28409
 2006-05-19 21:34:04 +00:00
Chris Lattner b22eb6304f Add a note 
llvm-svn: 28401
 2006-05-19 20:55:31 +00:00
Chris Lattner 17f1f1a56c Split the SSE readme items out into their own README. 
llvm-svn: 28400
 2006-05-19 20:51:43 +00:00
Chris Lattner 427ea6f0a7 Split FP-stack notes out of the main readme. Next up: splitting out SSE. 
llvm-svn: 28399
 2006-05-19 20:45:52 +00:00
Chris Lattner d6a25a08d1 Particularly ugly code. 
llvm-svn: 28397
 2006-05-19 19:41:33 +00:00
Evan Cheng feca91a516 These can be transformed into lea as well. Not that we use this feature 
currently...

llvm-svn: 28393
 2006-05-19 18:43:41 +00:00
Evan Cheng 7b8feb27c8 - Use exact-width integer types, e.g. int32_t, to avoid confusion. 
- Fix a couple of minor bugs in i16immSExt8 and i16immZExt8.
- Added loadiPTR fragment used for indirect jumps and calls.

llvm-svn: 28392
 2006-05-19 18:40:54 +00:00
Evan Cheng 1c8ef9832f Explicitly specify MOV32mi can only be used store 32-bit GV, etc. 
llvm-svn: 28390
 2006-05-19 07:30:36 +00:00
Chris Lattner f66e89721d add a note 
llvm-svn: 28383
 2006-05-18 17:38:16 +00:00
Evan Cheng 03524c63ff ImmMask should be 3 for a two-bit field; Compact X86II 
llvm-svn: 28381
 2006-05-18 06:27:15 +00:00
Evan Cheng 305c49579c getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
llvm-svn: 28378
 2006-05-18 00:12:58 +00:00
Evan Cheng e59042d004 Use generic iPTR instead i32 to represent pointer type. 
llvm-svn: 28371
 2006-05-17 21:21:41 +00:00
Evan Cheng 7fa58c38c0 Another entry 
llvm-svn: 28370
 2006-05-17 21:20:51 +00:00
Evan Cheng dcec882286 Remove PointerType from class Target 
llvm-svn: 28368
 2006-05-17 21:20:27 +00:00
Evan Cheng 8c6b234ce8 Should pass by reference. 
llvm-svn: 28357
 2006-05-17 19:07:40 +00:00
Evan Cheng 00bce3f2f4 Another entry 
llvm-svn: 28356
 2006-05-17 19:05:31 +00:00
Chris Lattner c7df70db57 Implement the custom lowering hook right, returning values for all of the 
arguments at once.

llvm-svn: 28327
 2006-05-16 17:14:26 +00:00
Chris Lattner 7b8b8bbbf9 Fix a bug I introduced yesterday, which broke functions with *no* arguments. 
llvm-svn: 28326
 2006-05-16 17:08:35 +00:00
Evan Cheng 9fee442e63 X86 integer register classes naming changes. Make them consistent with FP, vector classes. 
llvm-svn: 28324
 2006-05-16 07:21:53 +00:00
Chris Lattner 3d82699605 Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend, 
it doesn't currently use/maintain the chain properly.  Also, make the
X86ISelLowering.cpp file 80-col clean.

llvm-svn: 28320
 2006-05-16 06:45:34 +00:00
Chris Lattner b19ce6c810 More coverity fixes 
llvm-svn: 28266
 2006-05-12 21:14:20 +00:00
Chris Lattner 22f95b74ba Dead variable 
llvm-svn: 28265
 2006-05-12 21:12:22 +00:00
Evan Cheng db30388d48 Remove dead code 
llvm-svn: 28261
 2006-05-12 19:03:56 +00:00
Owen Anderson 8c2c1e90c4 Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
 2006-05-12 06:33:49 +00:00
Evan Cheng dd7230c9e0 Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot 
llvm-svn: 28223
 2006-05-11 07:33:49 +00:00
Evan Cheng fc532fe1b7 Remove a completed entry. 
llvm-svn: 28199
 2006-05-09 06:54:05 +00:00
Chris Lattner 4ebc6a2311 Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code. 
llvm-svn: 28194
 2006-05-09 05:33:48 +00:00
Chris Lattner 0b7acaf027 MASM doesn't have one of these. 
llvm-svn: 28190
 2006-05-09 05:21:47 +00:00
Chris Lattner e0006c6794 Preserve prior behavior 
llvm-svn: 28187
 2006-05-09 05:15:24 +00:00
Chris Lattner d0201946ad Fix the MASM asmprinter's lies. It does not want to emit code to .text/.data 
it wants it emitted to _text/_data.

llvm-svn: 28185
 2006-05-09 05:12:53 +00:00
Chris Lattner 8488ba2e41 Split SwitchSection into SwitchTo{Text|Data}Section methods. 
llvm-svn: 28184
 2006-05-09 04:59:56 +00:00
Chris Lattner aa193d80a9 Another bad case I noticed 
llvm-svn: 28177
 2006-05-08 21:39:45 +00:00
Chris Lattner 5bcea612f4 add a note 
llvm-svn: 28176
 2006-05-08 21:24:21 +00:00
Evan Cheng 9733bde74c Fixing truncate. Previously we were emitting truncate from r16 to r8 as 
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164
 2006-05-08 08:01:26 +00:00
Evan Cheng 6732dcd5b3 Typo's 
llvm-svn: 28158
 2006-05-07 10:10:20 +00:00
Jeff Cohen ce9b9fe6eb Fix some loose ends in MASM support. 
llvm-svn: 28148
 2006-05-06 21:27:14 +00:00
Chris Lattner 6d4a2dc4ad Teach the X86 backend about non-i32 inline asm register classes. 
llvm-svn: 28139
 2006-05-06 00:29:37 +00:00
Chris Lattner c22d4bede5 Print *some* grouping around inline asm blocks so we know where they are. 
llvm-svn: 28133
 2006-05-05 21:48:50 +00:00
Chris Lattner 44a73e9fa5 Teach the code generator to use cvtss2sd as extload f32 -> f64 
llvm-svn: 28131
 2006-05-05 21:35:18 +00:00
Evan Cheng 52c22512b9 Need extload patterns after Chris' DAG combiner changes 
llvm-svn: 28127
 2006-05-05 08:23:07 +00:00
Evan Cheng ddb6cc1d8e Better implementation of truncate. ISel matches it to a pseudo instruction 
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.

llvm-svn: 28119
 2006-05-05 05:40:20 +00:00
Chris Lattner 469647bf38 Remove and simplify some more machineinstr/machineoperand stuff. 
llvm-svn: 28105
 2006-05-04 18:16:01 +00:00
Chris Lattner 10b71c0d08 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
llvm-svn: 28104
 2006-05-04 18:05:43 +00:00
Chris Lattner 10d6341618 Move some methods out of MachineInstr into MachineOperand 
llvm-svn: 28102
 2006-05-04 17:52:23 +00:00
Chris Lattner fef7a2d0f5 There shalt be only one "immediate" operand type! 
llvm-svn: 28099
 2006-05-04 17:21:20 +00:00
Jeff Cohen 06041abeb6 Make external globals public; other minor cleanup. 
llvm-svn: 28096
 2006-05-04 16:20:22 +00:00
Jeff Cohen f812a4fa75 Make Intel syntax the default when LLVM is built with VC++. 
llvm-svn: 28095
 2006-05-04 16:19:27 +00:00
Chris Lattner ee64b6b40f Remove a bunch more dead V9 specific stuff 
llvm-svn: 28094
 2006-05-04 01:26:39 +00:00
Chris Lattner 940cc978ef Remove a bunch more SparcV9 specific stuff 
llvm-svn: 28093
 2006-05-04 01:15:02 +00:00
Chris Lattner 6e663f1c1e Remove some more V9-specific stuff. 
llvm-svn: 28092
 2006-05-04 00:49:59 +00:00
Chris Lattner 9f6639b64d Remove some more unused stuff from MachineInstr that was leftover from V9. 
llvm-svn: 28091
 2006-05-04 00:44:25 +00:00
Chris Lattner 2aef59f123 Simplify handling of relocations 
llvm-svn: 28090
 2006-05-04 00:42:08 +00:00
Evan Cheng 8b1cde2bbe Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when 
movlps cannot be used (e.g. when load from m64 has multiple uses).

llvm-svn: 28089
 2006-05-03 20:32:03 +00:00
Chris Lattner e3a9c70ba0 Change from using MachineRelocation ctors to using static methods 
in MachineRelocation to create Relocations.

llvm-svn: 28088
 2006-05-03 20:30:20 +00:00
Chris Lattner 9e68942d78 inline a simple method 
llvm-svn: 28083
 2006-05-03 17:21:32 +00:00
Chris Lattner 1d8ee1fc80 Suck block address tracking out of targets into the JIT Emitter. This 
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.

llvm-svn: 28082
 2006-05-03 17:10:41 +00:00
Nate Begeman 43b1ed7e3d Teach the x86 jit how to handle jump tables not directly used by a jump 
instruction.

llvm-svn: 28080
 2006-05-03 04:52:47 +00:00
Owen Anderson 20a631fde7 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.

llvm-svn: 28074
 2006-05-03 01:29:57 +00:00
Chris Lattner d8b192ba3b Change the BasicBlockAddrs map to be a vector, indexed by MBB number. 
llvm-svn: 28069
 2006-05-03 00:32:55 +00:00
Chris Lattner b8065a9a3a Several related changes: 
1. Change several methods in the MachineCodeEmitter class to be pure virtual.
2. Suck emitConstantPool/initJumpTableInfo into startFunction, removing them
   from the MachineCodeEmitter interface, and reducing the amount of target-
   specific code.
3. Change the JITEmitter so that it allocates constantpools and jump tables
   *right* next to the functions that they belong to, instead of in a separate
   pool of memory.  This makes all memory for a function be contiguous, and
   means the JITEmitter only tracks one block of memory now.

llvm-svn: 28065
 2006-05-02 23:22:24 +00:00
Nate Begeman 233391f5f5 Remove some stuff from the README 
llvm-svn: 28063
 2006-05-02 22:43:31 +00:00
Chris Lattner e1c96369e2 Fix a purely hypothetical problem (for now): emitWord emits in the host 
byte format.  This doesn't work when using the code emitter in a cross target
environment.  Since the code emitter is only really used by the JIT, this
isn't a current problem, but if we ever start emitting .o files, it would be.

llvm-svn: 28060
 2006-05-02 19:14:47 +00:00
Chris Lattner c9aa3715e8 Refactor the machine code emitter interface to pull the pointers for the current 
code emission location into the base class, instead of being in the derived classes.

This change means that low-level methods like emitByte/emitWord now are no longer
virtual (yaay for speed), and we now have a framework to support growable code
segments.  This implements feature request #1 of PR469.

llvm-svn: 28059
 2006-05-02 18:27:26 +00:00
Nate Begeman 287dc5be0d Hooray, everyone now uses the same printBasicBlockLabel implementation 
llvm-svn: 28056
 2006-05-02 17:34:51 +00:00
Chris Lattner 5bc9c583e3 There is no reason to use a virtual method to store this word. 
llvm-svn: 28053
 2006-05-02 17:16:20 +00:00
Nate Begeman b9d4f8324d Extend printBasicBlockLabel a bit so that it can be used to print all 
basic block labels, consolidating the code to do so in one place for each
target.

llvm-svn: 28050
 2006-05-02 05:37:32 +00:00
Jeff Cohen 470f431f44 De-virtualize SwitchSection. 
llvm-svn: 28047
 2006-05-02 03:58:45 +00:00
Jeff Cohen f34ddb1e0d De-virtualize EmitZeroes. 
llvm-svn: 28046
 2006-05-02 03:46:13 +00:00
Jeff Cohen bfe9ffb449 Finish support for Microsoft ML/MASM. May still be a few rough edges. 
llvm-svn: 28045
 2006-05-02 03:11:50 +00:00
Jeff Cohen 24a62a9bc1 Make Intel syntax mode friendlier to Microsoft ML assembler (still needs more work). 
llvm-svn: 28044
 2006-05-02 01:16:28 +00:00
Chris Lattner 563f0417d2 Remove %'s from register names when in intel mode. 
llvm-svn: 28027
 2006-05-01 05:53:50 +00:00
Jeff Cohen 71c2e0f262 Mingw32 patches supplied by Anton Korobeynikov. 
llvm-svn: 28023
 2006-04-29 18:41:44 +00:00
Evan Cheng d369603df9 I can't spell: Register, not Regsiter. 
llvm-svn: 28021
 2006-04-28 23:19:39 +00:00
Evan Cheng b244b80172 Implemented x86 inline asm b, h, w, k modifiers. 
llvm-svn: 28020
 2006-04-28 23:11:40 +00:00
Evan Cheng 88decded82 Initial caller side support (for CCC only, not FastCC) of 128-bit vector 
passing by value.

llvm-svn: 28015
 2006-04-28 21:29:37 +00:00
Evan Cheng 68a44dc445 Bare-bone X86 inline asm printer support. 
llvm-svn: 28014
 2006-04-28 21:19:05 +00:00
Evan Cheng 3cd4362ade Implement four-wide shuffle with 2 shufps if no more than two elements come 
from each vector. e.g.
        shuffle(G1, G2, 7, 1, 5, 2)
==>
        movaps _G2, %xmm0
        shufps $151, _G1, %xmm0
        shufps $216, %xmm0, %xmm0

llvm-svn: 28011
 2006-04-28 07:03:38 +00:00
Evan Cheng d43c5c6046 TargetLowering::LowerArguments should return a VBIT_CONVERT of 
FORMAL_ARGUMENTS SDOperand in the return result vector.

llvm-svn: 28009
 2006-04-28 05:25:15 +00:00
Evan Cheng f0157cb0bc Use movaps instead of movapd for spill / restore. 
llvm-svn: 28005
 2006-04-28 02:23:35 +00:00
Chris Lattner b209131b56 Add a note 
llvm-svn: 27998
 2006-04-27 21:40:57 +00:00
Evan Cheng f4f3f0d25f Make x86 isel lowering produce tailcall nodes. They are match to normal calls 
for now.

Patch contributed by Alexander Friedman.

llvm-svn: 27994
 2006-04-27 08:40:39 +00:00
Evan Cheng ec04a37edd A couple of new entries. 
llvm-svn: 27993
 2006-04-27 08:31:33 +00:00
Evan Cheng 89001ad729 Support for passing 128-bit vector arguments via XMM registers. 
llvm-svn: 27992
 2006-04-27 08:31:10 +00:00
Evan Cheng a0374e1bed Oops 
llvm-svn: 27989
 2006-04-27 05:44:50 +00:00
Evan Cheng 24eb3f4765 Bug fix: not updating NumIntRegs. 
llvm-svn: 27988
 2006-04-27 05:35:28 +00:00
Evan Cheng 48940d16b2 - Clean up formal argument lowering code. Prepare for vector pass by value work. 
- Fixed vararg support.

llvm-svn: 27985
 2006-04-27 01:32:22 +00:00
Evan Cheng 1c39903297 Fix fastcc failures. 
llvm-svn: 27980
 2006-04-26 18:21:31 +00:00
Evan Cheng e0bcfbe811 Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. 
llvm-svn: 27975
 2006-04-26 01:20:17 +00:00
Nate Begeman 4530327c04 Keep the stack from on darwin 16-byte aligned. This fixes many JIT 
failres.

llvm-svn: 27973
 2006-04-25 20:54:26 +00:00
Evan Cheng a9467aab0a Separate LowerOperation() into multiple functions, one per opcode. 
llvm-svn: 27972
 2006-04-25 20:13:52 +00:00
Evan Cheng 4cc3e0b05f Fix a typo. 
llvm-svn: 27968
 2006-04-25 17:48:41 +00:00
Evan Cheng fb46b2bf5d Explicitly specify result type for def : Pat<> patterns (if it produces a vector 
result). Otherwise tblgen will pick the default (v16i8 for 128-bit vector).

llvm-svn: 27965
 2006-04-25 00:50:01 +00:00
Evan Cheng 25b09295f8 Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is 
a temporary workaround for the 2-wide vector_shuffle problem (i.e. its mask
would have type v2i32 which is not legal).

llvm-svn: 27964
 2006-04-24 23:34:56 +00:00
Evan Cheng d03631ee76 Add a new entry. 
llvm-svn: 27963
 2006-04-24 23:30:10 +00:00
Evan Cheng 5c2bfb069e Special case handling two wide build_vector(0, x). 
llvm-svn: 27961
 2006-04-24 22:58:52 +00:00
Evan Cheng 63bd4d3730 Some missing movlps, movhps, movlpd, and movhpd patterns. 
llvm-svn: 27960
 2006-04-24 21:58:20 +00:00
Evan Cheng b0461080e4 A little bit more build_vector enhancement for v8i16 cases. 
llvm-svn: 27959
 2006-04-24 18:01:45 +00:00
Evan Cheng 2f9b0bcbd5 Remove a completed entry. 
llvm-svn: 27958
 2006-04-24 17:38:16 +00:00
Evan Cheng ab0ee6340c MakeMIInst() should handle jump table index operands. 
llvm-svn: 27955
 2006-04-24 05:37:35 +00:00
Chris Lattner f110527a29 Add a note 
llvm-svn: 27954
 2006-04-23 19:47:09 +00:00
Evan Cheng b4f31dd1a8 MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2 
llvm-svn: 27953
 2006-04-23 06:35:19 +00:00
Nate Begeman 9f0b13c885 Optimized stores to the constant pool, while cool, are unnecessary. 
llvm-svn: 27948
 2006-04-22 22:31:45 +00:00
Nate Begeman 4ca2ea5b43 JumpTable support! What this represents is working asm and jit support for 
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.

llvm-svn: 27947
 2006-04-22 18:53:45 +00:00
Evan Cheng e728efdfce Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef. 
llvm-svn: 27946
 2006-04-22 08:34:05 +00:00
Evan Cheng 16ef94f4e8 Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector. 
llvm-svn: 27945
 2006-04-22 06:21:46 +00:00
Evan Cheng 14215c36b6 Revamp build_vector lowering to take advantage of movss and movd instructions. 
movd always clear the top 96 bits and movss does so when it's loading the
value from memory.
The net result is codegen for 4-wide shuffles is much improved. It is near
optimal if one or more elements is a zero. e.g.

__m128i test(int a, int b) {
  return _mm_set_epi32(0, 0, b, a);
}

compiles to

_test:
	movd 8(%esp), %xmm1
	movd 4(%esp), %xmm0
	punpckldq %xmm1, %xmm0
	ret

compare to gcc:

_test:
	subl	$12, %esp
	movd	20(%esp), %xmm0
	movd	16(%esp), %xmm1
	punpckldq	%xmm0, %xmm1
	movq	%xmm1, %xmm0
	movhps	LC0, %xmm0
	addl	$12, %esp
	ret

or icc:

_test:
        movd      4(%esp), %xmm0                                #5.10
        movd      8(%esp), %xmm3                                #5.10
        xorl      %eax, %eax                                    #5.10
        movd      %eax, %xmm1                                   #5.10
        punpckldq %xmm1, %xmm0                                  #5.10
        movd      %eax, %xmm2                                   #5.10
        punpckldq %xmm2, %xmm3                                  #5.10
        punpckldq %xmm3, %xmm0                                  #5.10
        ret                                                     #5.10

There are still room for improvement, for example the FP variant of the above example:

__m128 test(float a, float b) {
  return _mm_set_ps(0.0, 0.0, b, a);
}

_test:
	movss 8(%esp), %xmm1
	movss 4(%esp), %xmm0
	unpcklps %xmm1, %xmm0
	xorps %xmm1, %xmm1
	movlhps %xmm1, %xmm0
	ret

The xorps and movlhps are unnecessary. This will require post legalizer optimization to handle.

llvm-svn: 27939
 2006-04-21 23:03:30 +00:00
Chris Lattner 3e62d4b289 fix thinko 
llvm-svn: 27935
 2006-04-21 21:05:22 +00:00
Chris Lattner e1f9ab7d53 add some low-prio notes 
llvm-svn: 27934
 2006-04-21 21:03:21 +00:00
Evan Cheng e8b5180044 Now generating perfect (I think) code for "vector set" with a single non-zero 
scalar value.

e.g.
        _mm_set_epi32(0, a, 0, 0);
==>
	movd 4(%esp), %xmm0
	pshufd $69, %xmm0, %xmm0

        _mm_set_epi8(0, 0, 0, 0, 0, a, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
==>
	movzbw 4(%esp), %ax
	movzwl %ax, %eax
	pxor %xmm0, %xmm0
	pinsrw $5, %eax, %xmm0

llvm-svn: 27923
 2006-04-21 01:05:10 +00:00
Evan Cheng 60f0b8998e - Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1> 
to a vector shuffle.
- VECTOR_SHUFFLE lowering change in preparation for more efficient codegen
of vector shuffle with zero (or any splat) vector.

llvm-svn: 27875
 2006-04-20 08:58:49 +00:00
Evan Cheng 15c264b753 Handle v2i64 BUILD_VECTOR custom lowering correctly. v2i64 is a legal type, 
but i64 is not. If possible, change a i64 op to a f64 (e.g. load, constant)
and then cast it back.

llvm-svn: 27849
 2006-04-20 00:11:39 +00:00
Evan Cheng 4a1b0d3292 isSplatMask() bug: first element can be an undef. 
llvm-svn: 27847
 2006-04-19 23:28:59 +00:00
Evan Cheng a3caaee503 - Added support to do aribitrary 4 wide shuffle with no more than three 
instructions.
- Fixed a commute vector_shuff bug.

llvm-svn: 27845
 2006-04-19 22:48:17 +00:00
Evan Cheng 6d5297dac3 Prefer {p}unpack* and mov*dup over {p}shuf* as well. 
llvm-svn: 27844
 2006-04-19 21:15:24 +00:00
Evan Cheng b416a25174 - Renamed AddedCost to AddedComplexity. 
- Added more movhlps and movlhps patterns.

llvm-svn: 27842
 2006-04-19 20:37:34 +00:00
Evan Cheng 7855e4d032 Commute vector_shuffle to match more movlhps, movlp{s|d} cases. 
llvm-svn: 27840
 2006-04-19 20:35:22 +00:00
Evan Cheng cc7abc6c38 More mov{h|l}p{d|s} patterns. 
llvm-svn: 27836
 2006-04-19 18:20:17 +00:00
Evan Cheng aeb09ccdd3 - More mov{h|l}ps patterns. 
- Increase cost (complexity) of patterns which match mov{h|l}ps ops. These
  are preferred over shufps in most cases.

llvm-svn: 27835
 2006-04-19 18:11:52 +00:00
Chris Lattner bfab82817a Add a note. 
llvm-svn: 27827
 2006-04-19 05:53:27 +00:00
Evan Cheng 3823aa1d0f - PEXTRW cannot take a memory location as its first source operand. 
- PINSRWrmi encoding bug.

llvm-svn: 27818
 2006-04-18 21:59:43 +00:00
Evan Cheng 43f4ef4ffb SHUFP{S|D}, PSHUF* encoding bugs. Left out the mask immediate operand. 
llvm-svn: 27817
 2006-04-18 21:56:36 +00:00
Evan Cheng a179ea631d Name change for clarity sake 
llvm-svn: 27816
 2006-04-18 21:55:35 +00:00
Evan Cheng 09e36ef710 Encoding bug: CMPPSrmi, CMPPDrmi dropped operand 2 (condtion immediate). 
llvm-svn: 27815
 2006-04-18 21:31:08 +00:00
Evan Cheng d799d680f4 Name change for clarity sake 
llvm-svn: 27814
 2006-04-18 21:29:50 +00:00
Evan Cheng 0ee281f37c Left a pattern out 
llvm-svn: 27813
 2006-04-18 21:29:08 +00:00
Evan Cheng e2d25a1a50 Fixed an encoding bug: movd from XMM to R32. 
llvm-svn: 27807
 2006-04-18 18:19:00 +00:00
Chris Lattner bfc2c68386 Teach the codegen about instructions used for SSE spill code, allowing it 
to optimize cases where it has to spill a lot

llvm-svn: 27801
 2006-04-18 16:44:51 +00:00
Evan Cheng 4d36a36900 Correct comments 
llvm-svn: 27790
 2006-04-18 03:45:01 +00:00
Evan Cheng 0ef233509b Another entry 
llvm-svn: 27786
 2006-04-18 01:22:57 +00:00
Evan Cheng e008bd3d27 Another entry. 
llvm-svn: 27784
 2006-04-18 00:21:01 +00:00
Evan Cheng 5421206c4b Use movss to insert_vector_elt(v, s, 0). 
llvm-svn: 27782
 2006-04-17 22:45:49 +00:00
Evan Cheng 6e5e205841 Use two pinsrw to insert an element into v4i32 / v4f32 vector. 
llvm-svn: 27779
 2006-04-17 22:04:06 +00:00
Evan Cheng 22c06f054b Encoding bug 
llvm-svn: 27773
 2006-04-17 21:33:57 +00:00
Evan Cheng 5022b3426e Implement v8i16, v16i8 splat using unpckl + pshufd. 
llvm-svn: 27768
 2006-04-17 20:43:08 +00:00
Chris Lattner c070c621ac implement returns of a vector, testcase here: CodeGen/X86/vec_return.ll 
llvm-svn: 27767
 2006-04-17 20:32:50 +00:00
Evan Cheng bf0d13c54f Incorrect foldMemoryOperand entries 
llvm-svn: 27763
 2006-04-17 18:06:12 +00:00
Evan Cheng 5112b5c544 Errors in patterns preventing load folding 
llvm-svn: 27762
 2006-04-17 18:05:01 +00:00
Evan Cheng b3b41c4f3d FP SETOLT, SETOLT, SETUGE, SETUGT conditions were implemented incorrectly 
llvm-svn: 27755
 2006-04-17 07:24:10 +00:00
Evan Cheng 20712deecb movduprm, movshduprm bugs 
llvm-svn: 27734
 2006-04-16 18:11:28 +00:00
Evan Cheng 3064f9aaa6 Encoding bugs 
llvm-svn: 27733
 2006-04-16 07:02:22 +00:00
Evan Cheng 685ddd8152 Can't fold loads into alias vector SSE ops used for scalar operation. The load 
address has to be 16-byte aligned but the values aren't spilled to 128-bit
locations.

llvm-svn: 27732
 2006-04-16 06:58:19 +00:00
Evan Cheng 8f1d801389 More encoding bugs 
llvm-svn: 27722
 2006-04-15 06:10:09 +00:00
Evan Cheng 91944e8699 pslldrm, psrawrm, etc. encoding bug 
llvm-svn: 27721
 2006-04-15 05:59:08 +00:00
Evan Cheng 1220b31a31 hsubp{s|d} encoding bug 
llvm-svn: 27720
 2006-04-15 05:52:42 +00:00
Evan Cheng 6222cf2a36 Silly bug 
llvm-svn: 27719
 2006-04-15 05:37:34 +00:00