Commit Graph

424328 Commits

Author SHA1 Message Date
wren romano 774674ce9a [mlir][sparse] Factored out a "FATAL" macro for unrecoverable assertion failure
Depends On D126019

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D126022
2022-05-19 15:26:20 -07:00
Bill Wendling 88043c1958 [TableGen] Add generation of argument register lists
There are cases, like with -fzero-call-used-regs,  where we need to know
which registers can be used by a certain calling convention. This change
generates a list of registers used by each calling convention defined in
*CallingConv.td.

Calling conventions that use registers conditioned on Swift have those
registers placed in a separate list. This allows us to be flexible about
whether to use the Swift registers or not.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D125421
2022-05-19 15:18:25 -07:00
Bill Wendling db0ea51c83 Revert "[TableGen] Add generation of argument register lists"
There are build bot failures.

This reverts commit 3fa1b6557d.
2022-05-19 15:16:08 -07:00
wren romano aff9c89fab [mlir][sparse] Simplifying closure
By closing over the `rank` itself rather than `this`, we save a method call on each iteration.  A minor optimization, but one that adds up.

Depends On D126016

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D126019
2022-05-19 15:15:33 -07:00
wren romano fa6aed2abd [mlir][sparse] Using the name "dimSizes" more consistently
Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D126016
2022-05-19 15:12:44 -07:00
Bill Wendling 3fa1b6557d [TableGen] Add generation of argument register lists
There are cases, like with -fzero-call-used-regs,  where we need to know
which registers can be used by a certain calling convention. This change
generates a list of registers used by each calling convention defined in
*CallingConv.td.

Calling conventions that use registers conditioned on Swift have those
registers placed in a separate list. This allows us to be flexible about
whether to use the Swift registers or not.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D125421
2022-05-19 15:03:14 -07:00
python3kgae c6c13d4e5f [DirectX backend] When cleanup module flags only remove unused flags.
Only remove dx.valver from module flags when cleanup module flags in DXILTranslateMetadataPass.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D125842
2022-05-19 14:50:11 -07:00
Alex Brachet b1183305f8 [libc] Add strlcat
Differential Revision: https://reviews.llvm.org/D125978
2022-05-19 21:48:39 +00:00
Med Ismail Bennani 027499a824
[lldb/test] Fix PExpect.launch issue when disabling color support
This patch should fix a bug in PExpect.launch that happened when color
support is not enabled.

In that case, we need to add the `--no-use-colors` flag to lldb's launch
argument list. However, previously, each character to the string was
appended separately to the `args` list. This patch solves that by adding
the whole string to the list.

This should fix the TestIOHandlerResize failure on GreenDragon.

Differential Revision: https://reviews.llvm.org/D126021

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2022-05-19 14:47:04 -07:00
Craig Topper 35564fff67 Revert "[RISCV] Add test cases showing failure to remove mask on rotate amounts."
This reverts commit e2f410feea.

This exposes a pre-existing bug in type legalization that is failing
expensive checks.
2022-05-19 14:39:38 -07:00
Craig Topper dfe513ae1b Revert "[RISCV] Use selectShiftMaskXLen ComplexPattern for isel of rotates."
This reverts commit 86f7d7074a.

The test cases added for this exposed an pre-existing bug that is failing
the expensive checks bot. Reverting so I can revert that patch.
2022-05-19 14:39:38 -07:00
Alexander Shaposhnikov 6990e7477d [ConstantRange] Improve the implementation of binaryOr
This diff adjusts binaryOr to take advantage of the analysis
based on KnownBits.

Differential revision: https://reviews.llvm.org/D125933

Test plan:
1/ ninja check-llvm
2/ ninja check-llvm-unit
2022-05-19 21:39:19 +00:00
Jorge Gorbe Moya 221b7a4583 [bazel] Add lib/Basic/BuiltinTargetFeatures.h to clang:basic `hdrs`.
This header is included by
clang/unittests/CodeGen/CheckTargetFeaturesTest.cpp
so it needs to be exposed here to make it visible.
2022-05-19 14:20:17 -07:00
Kiran Chandramohan 4202d69d9e [Flang][OpenMP] Upstream the lowering of the parallel do combined construct
When parallel is used in a combined construct, then use a separate
function to create the parallel operation. It handles the parallel
specific clauses and leaves the rest for handling at the inner
operations.

Reviewed By: peixin, shraiysh

Differential Revision: https://reviews.llvm.org/D125465

Co-authored-by: Sourabh Singh Tomar <SourabhSingh.Tomar@amd.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Valentin Clement <clementval@gmail.com>
Co-authored-by: Nimish Mishra <neelam.nimish@gmail.com>
2022-05-19 21:13:50 +00:00
Nicolas Capens c153c61fad Handle instrumentation of scalar single-precision (_ss) intrinsics
Instrumentation of scalar double-precision intrinsics such as
x86_sse41_round_sd was already handled by https://reviews.llvm.org/D82398,
but not their single-precision counterparts.

https://issuetracker.google.com/172238865

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D124871
2022-05-19 13:56:51 -07:00
Aart Bik 3b13f8805c [mlir][sparse] fix unsigned comparison bug in assert
Reviewed By: bixia, wrengr

Differential Revision: https://reviews.llvm.org/D126007
2022-05-19 13:32:09 -07:00
Jay Foad 9ece051847 [AMDGPU] Mark s_get_waveid_in_workgroup as not reading memory
It is already marked as having side effects, at least in MIR. It does
not interact with anything else that is modelled as a memory access
either in IR or MachineIR.

Differential Revision: https://reviews.llvm.org/D125985
2022-05-19 21:25:46 +01:00
Jay Foad 86b55edab6 [AMDGPU] Mark s_getreg as having side effects instead of reading memory
s_getreg does not interact with anything else that is modelled as a
memory access either in IR or MachineIR.

Differential Revision: https://reviews.llvm.org/D125968
2022-05-19 21:25:46 +01:00
Stella Stamenova 33b7df8c1f [mlir] Remove unused properties from the standalone example's lit configuration
Since these are unused, I've removed them from the configuration, so that it can be easier to read and follow.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D125132
2022-05-19 12:54:28 -07:00
Jennifer Yu 7aa9c39381 [Clang][[OpenMP5.1] Initial parser/sema for default(private) clause
This implements the default(private) clause as defined in OMP5.1

Differential Revision: https://reviews.llvm.org/D125912
2022-05-19 12:43:13 -07:00
Florian Hahn c90235f0ef
[LV] Drop wrap flags for reductions using VP def-use chain.
Update clearReductionWrapFlags to use the VPlan def-use chain from the
reduction phi recipe to drop reduction wrap flags.

This addresses an existing FIXME and fixes a crash when instructions in
the reduction chain are not used and have been removed before VPlan
codegeneration.

Fixes #55540.
2022-05-19 20:36:46 +01:00
Nico Weber e0b98902a2 [gn build] (manually) port 505ddb6b74 (remove Unit/lit.site.cfg.py) 2022-05-19 15:18:56 -04:00
Keith Smiley 505ddb6b74
[lld][test] Delete empty Unit test directory
This became empty when we removed the legacy macho lld. This results in
a warning when running `check-lld`. We can revert this in the future if
we want unit tests.

Differential Revision: https://reviews.llvm.org/D125436
2022-05-19 12:06:42 -07:00
Nico Weber 304a5a7a14 Revert "[ValueTracking] Added support to deduce PHI Nodes values being a power of 2"
This reverts commit d5c130f17e.
Breaks tests, see https://reviews.llvm.org/D125332#3525819
2022-05-19 15:05:30 -04:00
Jonathan Peyton f613e6d19d [OpenMP][libomp] Fix accidental removal of else for core attributes 2022-05-19 14:00:27 -05:00
David Green 80aab0312a [ARM] Cost modelling for scalar fptoi_sat
Similar to D124357, this adds some cost modelling for fptoi_sat for Arm
targets. Where VFP2 is available (and FP64/FP16 for the relevant types),
the operations are legal as the Arm instructions naturally saturate.
Otherwise they will need an extra smin/smax clamp, similar to AArch64.

Differential Revision: https://reviews.llvm.org/D125665
2022-05-19 19:53:21 +01:00
William Huang 6107cdc929 [InstCombine] NEW Baseline tests for InstCombine optimization to merge GEP instructions with constant indices
Splitted the merge constant-indexed GEP optimization into two smaller transformations: 1. Merging GEP of GEP if both are constant-indexed. 2. Swapping constant indexed GEP in a chain of (non-constant) GEP to the end, so that 1 can be applied repeatedly.
There is existing code to partially  handle transformation 1, but it only deals with limited cases

Unit tests are breaking down into two parts for the 2 transformations.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D125438
2022-05-19 18:46:18 +00:00
Kristof Beyls ac2f0a6f1d [Office Hours] add initial guidance for hosts
This includes adding guidance to announce an office hours session on the
Discord channel and/or IRC, as discussed at the office hours round table at
EuroLLVM 2022, see
https://discourse.llvm.org/t/office-hours-eurollvm-round-table-summary/62480.

Fixes #55423
2022-05-19 20:39:39 +02:00
William Huang d5c130f17e [ValueTracking] Added support to deduce PHI Nodes values being a power of 2
Add Value Tracking support to deduce induction variable being a power of 2, allowing urem optimizations

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D125332
2022-05-19 18:39:13 +00:00
Keith Smiley a1cf20f012
[llvm-dis][test] Fix error case on Windows
The `N` case in the error differs across platforms.
2022-05-19 11:30:30 -07:00
William Huang 0f37ba7b23 [ValueTracking] Baseline tests for Power-of-2 value tracking on PHI nodes
Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D124885
2022-05-19 18:30:14 +00:00
Joseph Huber eda4ef3add [Libomptarget] Add `leaf` attribute to `vprintf` declaration
Summary:
This patch adds the `leaf` attribute to the `vprintf` declaration in the
OpenMP runtime. This attribute allows us to determine that the `vprintf`
function will not call any functions within the translation unit,
allowing us to deduce `norecurse` attributes on the caller.
2022-05-19 14:22:53 -04:00
Heejin Ahn cde083e010 [WebAssembly] Fix register use-def in FixIrreducibleControlFlow
FixIrreducibleControlFlow pass adds dispatch blocks with a `br_table`
that has multiple predecessors and successors, because it serves as
something like a traffic hub for BBs. As a result of this, there can be
register uses that are not dominated by a def in every path from the
entry block. For example, suppose register %a is defined in BB1 and used
in BB2, and there is a single path from BB1 and BB2:
```
BB1 -> ... -> BB2
```
After FixIrreducibleControlFlow runs, there can be a dispatch block
between these two BBs:
```
BB1 -> ... -> Dispatch -> ... -> BB2
```
And this dispatch block has multiple predecessors, now
there is a path to BB2 that does not first visit BB1, and in that path
%a is not dominated by a def anymore.

To fix this problem, we have been adding `IMPLICIT_DEF`s to all
registers in PrepareForLiveInternals pass, and then remove unnecessary
ones in OptimizeLiveIntervals pass after computing `LiveIntervals`. But
FixIrreducibleControlFlow pass itself ends up violating register use-def
relationship, resulting in invalid code. This was OK so far because
MIR verifier apparently didn't check this in validation. But @arsenm
fixed this and it caught this bug in validation
(https://github.com/llvm/llvm-project/issues/55249).

This CL moves the `IMPLICIT_DEF` adding routine from
PrepareForLiveInternals to FixIrreducibleControlFlow. We only run it
when FixIrreducibleControlFlow changes the code. And then
PrepareForLiveInternals doesn't do anything other than setting
`TracksLiveness` property, which is a prerequisite for running
`LiveIntervals` analysis, which is required by the next pass
OptimizeLiveIntervals.

But in our backend we don't seem to do anything that invalidates this up
until OptimizeLiveIntervals, and I'm not sure why we are calling
`invalidateLiveness` in ReplacePhysRegs pass, because what that pass
does is to replace physical registers with virtual ones 1-to-1. I
deleted the `invalidateLiveness` call there and we don't need to set
that flag explicitly, which obviates all the need for
PrepareForLiveInternals.

(By the way, This 'Liveness' here is different from `LiveIntervals`
analysis. Setting this only means BBs' live-in info is correct, all uses
are dominated by defs, `kill` flag is conservatively correct, which
means if there is a `kill` flag set it should be the last use. See
2a0837aab1/llvm/include/llvm/CodeGen/MachineFunction.h (L125-L134)
for details.)

So this CL removes PrepareForLiveInternals pass altogether. Something
similar to this was attempted by D56091 long ago but that came short of
actually removing the pass, and I couldn't land it because
FixIrreducibleControlFlow violated use-def relationship, which this CL
fixes.

This doesn't change output in any meaningful way. All test changes
except `irreducible-cfg.mir` are register numbering.

Also this will likely to reduce compilation time, because we have been
adding `IMPLICIT_DEF` for all registers every time `-O2` is given, but
now we do that only when there is irreducible control flow, which is
rare.

Fixes https://github.com/llvm/llvm-project/issues/55249.

Reviewed By: dschuff, kripken

Differential Revision: https://reviews.llvm.org/D125515
2022-05-19 11:13:37 -07:00
Heejin Ahn 44718c5ef2 [WebAssembly] Use CHECK-NEXT for irreducible-cfg.mir
Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D125514
2022-05-19 11:12:20 -07:00
Keith Smiley 2569f79a4f
[llvm-dis] Improve missing file error message
Previously the error message didn't include the failing path, which made
it hard to tell what went wrong.

Differential Revision: https://reviews.llvm.org/D121665
2022-05-19 11:07:49 -07:00
Keith Smiley 6746e6a372
[docs][tools] Remove old llvm-bcanalyzer options
These no longer exist. A few have been added since but I'm not enough of
an expert to provide a useful blurb on them outside of what you see with
`--help`.

Differential Revision: https://reviews.llvm.org/D122361
2022-05-19 11:07:03 -07:00
Keith Smiley 066243057f
[Object] Fix updating darwin archives
When creating an archive, llvm-ar looks at the host to determine the
archive format to use, on Apple platforms this means it uses the
K_DARWIN format. K_DARWIN is _virtually_ equivalent to K_BSD, expect for
some very slight differences around padding, timestamps in deterministic
mode, and 64 bit formats. When updating an archive using llvm-ar, or
llvm-objcopy, Archive would try to determine the kind, but it was not
possible to get K_DARWIN in the initialization of the archive, because
they're virtually inciting usable from K_BSD, especially since the
slight differences only apply in very specific cases. This leads to
linker failures when the alignment workaround is not applied to an
archive copied with llvm-objcopy. This change teaches Archive to infer
the K_DARWIN type in the cases where it's possible and the first object
in the archive is a macho object. This avoids using the host triple to
determine this to not affect cross compiling.

Ideally we would eliminate the separate K_DARWIN type entirely since
it's not a truly separate archive type, but then we'd have to force the
macho workarounds on the BSD format generally. This might be acceptable
but then it would be unclear how to handle this case without forcing the
K_DARWIN64 format on all BSD users:

```
if (LastOffset >= Sym64Threshold) {
  if (Kind == object::Archive::K_DARWIN)
    Kind = object::Archive::K_DARWIN64;
  else
    Kind = object::Archive::K_GNU64;
}
```

The logic used to determine if the object is macho is derived from the
logic llvm-ar uses.

Previous context:

- 111cd669e9
- 23a76be5ad

Differential Revision: https://reviews.llvm.org/D124895
2022-05-19 10:56:26 -07:00
Lang Hames 2ca81cd914 [ORC] Avoid more SymbolStringPtr copies. 2022-05-19 10:51:20 -07:00
Lang Hames d27e4bcebd [ORC] Add a FIXME. 2022-05-19 10:51:20 -07:00
Lang Hames 4bb18a89c4 [ORC] Add missing std::moves, pass SymbolLookupSet by value.
Avoids some unnecessary SymbolStringPtr copies.
2022-05-19 10:51:20 -07:00
Lang Hames e8e7581fb1 [llvm-jitlink] Print session report even if entry-point lookup errors out. 2022-05-19 10:51:20 -07:00
Thomas Raoux 4c1b65e7bc [mlir][vector] Fix crash in DropInnerMostUnitDims pattern
Fix number of dimensions when incrementally replacing dimensions in
affine map.

Differential Revision: https://reviews.llvm.org/D125984
2022-05-19 17:38:04 +00:00
Thomas Raoux f2676b151d [mlir][tensor] Add canonicalization for tensor.cast from extract_slice
Propagate static size information into extract_slice producer if
possible.

Differential Revision: https://reviews.llvm.org/D125972
2022-05-19 17:34:59 +00:00
Paul Walker d640442518 [NFC] Fix a couple of whitespace issues. 2022-05-19 17:27:09 +00:00
Aaron Ballman d374b65f2d Drop qualifiers from return types in C (DR423)
WG14 DR423 (https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2148.htm#dr_423),
resolved during the C11 time frame, changed the way qualifiers are
handled on function return types and in cast expressions after it was
noted that these types are now directly observable via generic
selection expressions. In C, the function declarator is adjusted to
ignore all qualifiers (including _Atomic qualifiers).

Clang already handles the cast expression case correctly (by performing
the lvalue conversion, which drops the qualifiers as well), but with
these changes it will now also handle function declarations
appropriately.

Fixes #39595

Differential Revision: https://reviews.llvm.org/D125919
2022-05-19 13:06:50 -04:00
Nuno Lopes 5fc9449c96 [DeadArgElim] Use poison instead of undef as placeholder for dead arguments
It doesn't matter which value we use for dead args, so let's switch
to poison, so we can eventually kill undef.

Reviewed By: aeubanks, fhahn

Differential Revision: https://reviews.llvm.org/D125983
2022-05-19 18:00:24 +01:00
LLVM GN Syncbot a49d3055c7 [gn build] Port ca7c307d18 2022-05-19 16:42:14 +00:00
Sotiris Apostolakis ca7c307d18 [SelectOpti][1/5] Setup new select-optimize pass
This is the first commit for the cmov-vs-branch optimization pass.
The goal is to develop a new profile-guided and target-independent cost/benefit analysis
for selecting conditional moves over branches when optimizing for performance.

Initially, this new pass is expected to be enabled only for instrumentation-based PGO.

RFC: https://discourse.llvm.org/t/rfc-cmov-vs-branch-optimization/6040

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D120230
2022-05-19 16:31:10 +00:00
Joseph Huber dbffa4073c [NVVM] Update intrinsic defintions to include the `nocallback` attribute
This patch adds the `nocallback` attribute to the NVVM intrinsics that
did not use the `DefaultAttrsIntrinsic` method that includes it already.
The `nocallback` attribute states that the intrinsic function cannot
enter back into the caller's translation-unit. This allows as to
determine that a function calling a `nocallback` function can have the
`norecurse` attribute.  This should be safe for all the NVVM intrinsics
because they do not call other functions within the translation unit.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D125937
2022-05-19 12:30:35 -04:00
Amy Kwan c35ca3a1c7 [PowerPC] Implement XL compat __fnabs and __fnabss builtins.
This patch implements the following floating point negative absolute value
builtins that required for compatibility with the XL compiler:
```
double __fnabs(double);
float __fnabss(float);
```

These builtins will emit :
- fnabs on PWR6 and below, or if VSX is disabled.
- xsnabsdp on PWR7 and above, if VSX is enabled.

Differential Revision: https://reviews.llvm.org/D125506
2022-05-19 11:28:40 -05:00