Bill Wendling
a65f914bb0
Add encoding for moving a value between two ARM core registers and a doublework
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extension register.
llvm-svn: 116970
2010-10-20 23:37:40 +00:00
Bill Wendling
058190507b
Add encodings for movement between ARM core registers and single-precision
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registers.
llvm-svn: 116961
2010-10-20 22:44:54 +00:00
Jim Grosbach
68a335e185
ARM mode encoding information for UBFX and SBFX instructions.
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llvm-svn: 116588
2010-10-15 17:15:16 +00:00
Jim Grosbach
0b5c743811
Simplify test file a bit.
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llvm-svn: 116540
2010-10-14 23:32:44 +00:00
Jim Grosbach
89efff3763
Add testcase for RRX and ASRS (which effectively tests MOVs, since those
...
are just forms of that instruction).
llvm-svn: 116538
2010-10-14 23:29:18 +00:00
Jim Grosbach
eafcb27ded
MOVi16 and MOVT ARM mode encodings.
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llvm-svn: 116498
2010-10-14 18:54:27 +00:00
Bill Wendling
6f52f8a87d
Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on
...
here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.
llvm-svn: 116471
2010-10-14 02:33:26 +00:00
Bill Wendling
0441c6cba0
Add encoding for 'fmstat'.
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llvm-svn: 116466
2010-10-14 01:19:34 +00:00
Bill Wendling
0825f3e441
- Add encodings for multiply add/subtract instructions in all their glory.
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- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.
llvm-svn: 116464
2010-10-14 01:02:08 +00:00
Bill Wendling
f106ecfa59
Add MC encodings for VCVT* instrunctions.
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llvm-svn: 116431
2010-10-13 20:58:46 +00:00
Jim Grosbach
1e7db68774
Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.
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llvm-svn: 116421
2010-10-13 19:56:10 +00:00
Jim Grosbach
651dc7c9e9
Add ARM mode operand encoding information for ADDE/SUBE instructions.
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llvm-svn: 116412
2010-10-13 18:00:52 +00:00
Bill Wendling
6e27b4f530
Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test
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just yet.
llvm-svn: 116386
2010-10-13 01:17:33 +00:00
Bill Wendling
576fd0b110
Add encodings for VCVT instructions.
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llvm-svn: 116385
2010-10-13 00:56:35 +00:00
Jim Grosbach
8c519c0d4b
Add ARM encoding information for comparisons, forced-cc-out arithmetics, and
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arithmetic-with-carry-in instructions.
llvm-svn: 116384
2010-10-13 00:50:27 +00:00
Bill Wendling
da4ddf0fcf
Add VCMPZ and VABS.
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llvm-svn: 116383
2010-10-13 00:38:07 +00:00
Bill Wendling
f9ca535495
Refactor VCMP instructions.
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llvm-svn: 116379
2010-10-13 00:04:29 +00:00
Bill Wendling
7dd8c0b991
Add encodings for VNMUL[SD].
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llvm-svn: 116375
2010-10-12 23:47:37 +00:00
Bill Wendling
a06aee826c
Add encodings for VDIV and VMUL.
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llvm-svn: 116370
2010-10-12 23:22:27 +00:00
Jim Grosbach
d5f8c3350d
Be nitpicky and line up the comments.
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llvm-svn: 116365
2010-10-12 23:14:03 +00:00
Bill Wendling
646a506724
Add encoding for VSUB and VCMP.
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Fear not! I'm going to try a refactoring right now. :)
llvm-svn: 116359
2010-10-12 22:55:35 +00:00
Bill Wendling
9513a7e87f
Don't need to specify calling convention. Add 'readnone' to functions.
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llvm-svn: 116354
2010-10-12 22:24:10 +00:00
Bill Wendling
ac6cd00706
Encoding for VADDD. Plus a test for the VFP instructions.
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llvm-svn: 116348
2010-10-12 22:08:41 +00:00
Jim Grosbach
6fead930af
Add encoding information for the remainder of the generic arithmetic
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ARM instructions.
llvm-svn: 116313
2010-10-12 17:11:26 +00:00
Jim Grosbach
b7c2962d20
MC machine encoding for simple aritmetic instructions that use a shifted
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register operand.
llvm-svn: 116259
2010-10-11 23:16:21 +00:00
Jim Grosbach
c43c930690
Implement a few more binary encoding bits. Still very early stage proof-of-
...
concept level stuff at this point, but it is generally working for those
instructions that know how to map the operands.
This patch fills in the register operands for add/sub/or/etc instructions
and adds the conditional execution predicate encoding.
llvm-svn: 116112
2010-10-08 21:45:55 +00:00
Jim Grosbach
42a07e8545
Add test file for simple ARM binary encodings with MC
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llvm-svn: 116024
2010-10-08 00:47:59 +00:00
Chris Lattner
fbae9435c9
move ARM MC tests up one level.
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llvm-svn: 115414
2010-10-02 18:52:05 +00:00