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1278 Commits

Author SHA1 Message Date
Jim Grosbach 567ebd0cb5 Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order 
halfword being emitted to the stream first. rdar://8728174

llvm-svn: 120848
 2010-12-03 22:31:40 +00:00
Owen Anderson 6187e66801 Add tests for more forms of Thumb2 loads and stores. 
llvm-svn: 120436
 2010-11-30 18:15:21 +00:00
Bill Wendling 811c936ed5 Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost 
certainly be made more generic. But it does allow us to parse something like:

          ldr     r3, [r2, r4]

correctly in Thumb mode.

llvm-svn: 120408
 2010-11-30 07:44:32 +00:00
Owen Anderson e22c7322b8 Correct Thumb2 encodings for a much wider range of loads and stores. 
llvm-svn: 120364
 2010-11-30 00:14:31 +00:00
Owen Anderson 50d662b6cb Provide Thumb2 encodings for basic loads and stores. 
llvm-svn: 120340
 2010-11-29 22:44:32 +00:00
Bill Wendling 232e52cfb7 Add more Thumb encodings. 
llvm-svn: 120279
 2010-11-29 01:07:48 +00:00
Bill Wendling ccba1a8d95 More Thumb encodings. 
llvm-svn: 120278
 2010-11-29 01:00:43 +00:00
Bill Wendling 9600e97c60 Add Thumb encodings for REV instructions. 
llvm-svn: 120277
 2010-11-29 00:42:50 +00:00
Bill Wendling 775899eb2e Add more Thumb encodings. 
llvm-svn: 120272
 2010-11-29 00:18:15 +00:00
Bill Wendling c01d679928 Add encoding for ARM "trap" instruction. 
llvm-svn: 119938
 2010-11-21 11:05:29 +00:00
Bill Wendling 945b776b6e Add MC encodings for some Thumb instructions. Test for a few of them. The "bx 
lr" instruction cannot be tested just yet. It requires matching a "condition
code", but adding one of those makes things go south quickly...

llvm-svn: 119774
 2010-11-19 01:33:10 +00:00
Bill Wendling 2063b84297 Add support for parsing the writeback ("!") token. 
llvm-svn: 119761
 2010-11-18 23:43:05 +00:00
Owen Anderson 690fa953e1 More tests. 
llvm-svn: 119756
 2010-11-18 23:30:10 +00:00
Owen Anderson 3517585249 Fix encodings for pkhbt, and fix some tests where I accidentally tested ARM mode instead of Thumb2. 
llvm-svn: 119755
 2010-11-18 23:29:56 +00:00
Owen Anderson 3fec5ff14b More Thumb2 encodings. 
llvm-svn: 119737
 2010-11-18 21:15:19 +00:00
Owen Anderson 3625098459 Fill out the set of Thumb2 multiplication operator encodings. 
llvm-svn: 119733
 2010-11-18 20:32:18 +00:00
Owen Anderson d127e7174b Try again at providing Thumb2 encodings for basic multiplication operators. 
llvm-svn: 119601
 2010-11-18 01:08:42 +00:00
Owen Anderson 28883834e1 Revert r119593 while I figure out my testing disagrees with the buildbot. 
llvm-svn: 119597
 2010-11-18 00:42:51 +00:00
Owen Anderson 64aaddcd64 Provide correct Thumb2 encodings for basic multiplication operators. 
llvm-svn: 119593
 2010-11-18 00:19:10 +00:00
Owen Anderson 55425e7f78 Second attempt at correct encodings for Thumb2 bitfield instructions. 
llvm-svn: 119575
 2010-11-17 22:16:31 +00:00
Owen Anderson 6c37ceb182 Revert r119551, which broke buildbots. 
llvm-svn: 119555
 2010-11-17 20:48:51 +00:00
Owen Anderson 7464116bde Provide Thumb2 encodings for bitfield instructions. 
llvm-svn: 119551
 2010-11-17 20:35:29 +00:00
Owen Anderson bced7ae046 More miscellaneous Thumb2 encodings. 
llvm-svn: 119546
 2010-11-17 19:57:38 +00:00
Bill Wendling 9898ac97fd Proper encoding for VLDM and VSTM instructions. The register lists for these 
instructions have to distinguish between lists of single- and double-precision
registers in order for the ASM matcher to do a proper job. In all other
respects, a list of single- or double-precision registers are the same as a list
of GPR registers.

llvm-svn: 119460
 2010-11-17 04:32:08 +00:00
Bill Wendling 92756fff57 Test encodings for LDM and STM. 
llvm-svn: 119315
 2010-11-16 01:38:20 +00:00
Owen Anderson 05a8daee21 Add Thumb2 encodings for mov and friends. 
llvm-svn: 119295
 2010-11-16 00:29:56 +00:00
Owen Anderson 7d97a99f4c Provide Thumb2 encodings for sxtb and friends. 
llvm-svn: 119185
 2010-11-15 21:12:05 +00:00
Owen Anderson 2a3c22efba Add Thumb2 encodings for comparison and shift operators. 
llvm-svn: 119176
 2010-11-15 19:58:36 +00:00
Owen Anderson 0e7d728327 Add correct Thumb2 encodings for mvn and friends. 
llvm-svn: 119170
 2010-11-15 18:45:17 +00:00
Owen Anderson 8fdd172502 First stab at providing correct Thumb2 encodings, start with adc. 
llvm-svn: 118924
 2010-11-12 21:12:40 +00:00
Owen Anderson ce2250fba4 Fill out support for Thumb2 encodings of NEON instructions. 
llvm-svn: 118854
 2010-11-11 23:12:55 +00:00
Owen Anderson 99a8cb4875 Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. 
llvm-svn: 118843
 2010-11-11 21:36:43 +00:00
Owen Anderson a56a2e1fc5 Flesh out tests for Thumb2 encodings of NEON instructions. 
llvm-svn: 118837
 2010-11-11 21:15:47 +00:00
Owen Anderson 7ffe3b35ac Add support for Thumb2 encodings of NEON data processing instructions, using the new PostEncoderMethod infrastructure. 
More tests to come.

llvm-svn: 118819
 2010-11-11 19:07:48 +00:00
Owen Anderson c7baee31ad Add support for ARM's specialized vector-compare-against-zero instructions. 
llvm-svn: 118453
 2010-11-08 23:21:22 +00:00
Owen Anderson 30c4892ea5 Add codegen and encoding support for the immediate form of vbic. 
llvm-svn: 118291
 2010-11-05 19:27:46 +00:00
Bill Wendling c002463ac4 Add encoding for VSTR. 
llvm-svn: 118220
 2010-11-04 00:59:42 +00:00
Owen Anderson bc9b31c493 Covert VORRIMM to be produced via early target-specific DAG combining, rather than legalization. 
This is both the conceptually correct place for it, as well as allowing it to be more aggressive.

llvm-svn: 118204
 2010-11-03 23:15:26 +00:00
Owen Anderson 0747307049 Add support for code generation of the one register with immediate form of vorr. 
We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.

llvm-svn: 118201
 2010-11-03 22:44:51 +00:00
Owen Anderson bb81f80af6 Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead, 
all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.

llvm-svn: 118183
 2010-11-03 18:16:27 +00:00
Bill Wendling e84eb99cbb The MC code couldn't handle ARM LDR instructions with negative offsets: 
vldr.64 d1, [r0, #-32]

The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.

llvm-svn: 118144
 2010-11-03 01:49:29 +00:00
Bill Wendling 603bd8f54c Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work 
with immediates up to 16-bits in size. The same logic is applied to other LDR
encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in
VLDR's case). Removing the "12" allows it to be more generic.

llvm-svn: 118094
 2010-11-02 22:31:46 +00:00
Owen Anderson dec87e10fd Provide correct encodings for the remaining vst variants that we currently generate. 
llvm-svn: 118087
 2010-11-02 22:18:18 +00:00
Owen Anderson b95618cfe0 Add correct encodings for basic variants for vst3 and vst4. 
llvm-svn: 118082
 2010-11-02 21:47:03 +00:00
Owen Anderson fa08e1e277 Add correct encodings for the basic variants for vst2. 
llvm-svn: 118068
 2010-11-02 21:16:58 +00:00
Owen Anderson 87c62e54e6 Add correct encodings for the basic form of vst1. 
llvm-svn: 118067
 2010-11-02 21:06:06 +00:00
Owen Anderson a83859539f Add correct encodings for the rest of the vld instructions that we generate. 
llvm-svn: 118053
 2010-11-02 20:40:59 +00:00
Owen Anderson 526ffd57d2 Add correct NEON encodings for vld2, vld3, and vld4 basic variants. 
llvm-svn: 117997
 2010-11-02 01:24:55 +00:00
Owen Anderson ad40234eff Add correct NEON encodings for the "multiple single elements" form of vld. 
llvm-svn: 117984
 2010-11-02 00:05:05 +00:00
Bill Wendling 793af5fa07 Use ARM-style comments. 
llvm-svn: 117955
 2010-11-01 21:16:39 +00:00
Owen Anderson cd9da22f68 Use ARM-style comment syntax. 
llvm-svn: 117941
 2010-11-01 18:33:37 +00:00
Owen Anderson 083ddf7d6a Covert this test to .s form. 
llvm-svn: 117939
 2010-11-01 18:30:39 +00:00
Owen Anderson a7d985738c Convert this test to .s form. 
llvm-svn: 117938
 2010-11-01 18:26:43 +00:00
Owen Anderson e5271a935a Covert this test to .s form. 
llvm-svn: 117937
 2010-11-01 18:13:11 +00:00
Owen Anderson 051b7893dd Covert this test to .s form. 
llvm-svn: 117935
 2010-11-01 18:03:16 +00:00
Jim Grosbach 0190a649e8 Mark ARM subtarget features that are available for the assembler. 
llvm-svn: 117929
 2010-11-01 16:59:54 +00:00
Owen Anderson fccb9d032f Convert this test to .s form. 
llvm-svn: 117900
 2010-11-01 05:23:58 +00:00
Bill Wendling 193961bb1a Some instructions end with an "ls" prefix, but it doesn't indicate that they are 
conditional. Check for those instructions explicitly.

llvm-svn: 117747
 2010-10-29 23:50:21 +00:00
Owen Anderson 72dfc6a7c7 Convert this test to .s form. 
llvm-svn: 117708
 2010-10-29 20:39:19 +00:00
Owen Anderson 665b9e37ff Convert this test to .s form. 
llvm-svn: 117704
 2010-10-29 20:23:45 +00:00
Owen Anderson fe4b52a066 Convert this test to .s form. 
llvm-svn: 117699
 2010-10-29 20:17:07 +00:00
Owen Anderson 0093f9a634 Convert this test to .s form. 
llvm-svn: 117696
 2010-10-29 20:12:34 +00:00
Owen Anderson ede9d861db Covert this test to .s form. 
llvm-svn: 117694
 2010-10-29 19:56:07 +00:00
Owen Anderson 6f9cd06ff9 Convert this test to .s form. 
llvm-svn: 117693
 2010-10-29 19:51:11 +00:00
Owen Anderson 3ad831ac77 Convert this test to .s form. 
llvm-svn: 117690
 2010-10-29 19:45:32 +00:00
Owen Anderson 302596e5e1 Convert this test to .s form. 
llvm-svn: 117689
 2010-10-29 19:37:05 +00:00
Owen Anderson efdf57afdc Convert this test to .s form. 
llvm-svn: 117686
 2010-10-29 19:17:08 +00:00
Owen Anderson 221b524fe1 Convert this test to .s form. 
llvm-svn: 117685
 2010-10-29 19:09:08 +00:00
Owen Anderson b916206545 Covert this test to .s form. 
llvm-svn: 117684
 2010-10-29 19:05:26 +00:00
Owen Anderson 733d1b1a60 Convert this test to .s form. 
llvm-svn: 117683
 2010-10-29 18:58:30 +00:00
Owen Anderson 7d23a78188 Convert this test to .s form. 
llvm-svn: 117682
 2010-10-29 18:48:59 +00:00
Owen Anderson 7eed15242d Convert this file to less fragile .s form. 
llvm-svn: 117681
 2010-10-29 18:41:40 +00:00
Owen Anderson 13ff53e7b6 Replace this test with the less fragile .s version. Still XFAIL'd, since the ASM parser doesn't parse vabal yet. 
llvm-svn: 117679
 2010-10-29 18:31:26 +00:00
Owen Anderson 66aa87021c Covert this test to a .s file to reduce fragility. 
llvm-svn: 117676
 2010-10-29 18:18:40 +00:00
Owen Anderson b101af04b4 Convert this test to a .s file, so that it's not sensitive to codegen changes. 
llvm-svn: 117633
 2010-10-29 01:01:56 +00:00
Chris Lattner 5d6f6a061b add simple support for addrmode5 operands, allowing 
vldr.64 to work.  I have no idea if this is fully right, but 
it is in the right direction.

llvm-svn: 117626
 2010-10-29 00:27:31 +00:00
Chris Lattner 327a61423b most simple arm instructions match correctly now, 
it looks like we're not handling [] operands though

llvm-svn: 117607
 2010-10-28 21:31:07 +00:00
Chris Lattner 1be0697ab9 fix the asmmatcher generator to handle targets with no RegisterPrefix 
(like ARM) correctly.  With this change, we can now match "bx lr"
because we recognize lr as a register.

llvm-svn: 117606
 2010-10-28 21:28:42 +00:00
Evan Cheng 0165e25564 Disable most of the ARM vfp / NEON MC tests. These are too fragile to be useful. 
I'll work with Jim, Owen, and Bill on an alternative testing strategy until
the assembly parser is available.

llvm-svn: 117530
 2010-10-28 06:46:17 +00:00
Owen Anderson 2ef668840a Add correct NEON encodings for vtbl and vtbx. 
llvm-svn: 117513
 2010-10-28 00:18:46 +00:00
Owen Anderson 14be930317 Add correct NEON encodings for vext, vtrn, vuzp, and vzip. 
llvm-svn: 117512
 2010-10-27 23:56:39 +00:00
Owen Anderson 9f371e7efa Tests for NEON encoding of vrev. 
llvm-svn: 117502
 2010-10-27 22:54:49 +00:00
Owen Anderson fadb951e5b Provide correct encodings for NEON vcvt, which has its own special immediate encoding 
for specifying fractional bits for fixed point conversions.

llvm-svn: 117501
 2010-10-27 22:49:00 +00:00
Owen Anderson ed9652f959 Provide correct encodings for the get_lane and set_lane variants of vmov. 
llvm-svn: 117495
 2010-10-27 21:28:09 +00:00
Owen Anderson 40d24a4abf Provide correct NEON encodings for vdup. 
llvm-svn: 117475
 2010-10-27 19:25:54 +00:00
Owen Anderson fbdeab911a Tests for NEON encoding of vmovl, vmovn, vqmovn, and vqmovun. 
llvm-svn: 117469
 2010-10-27 18:17:12 +00:00
Owen Anderson 5fa98baef7 Tests for NEON encoding of vcls, vclz, and vcnt. 
llvm-svn: 117466
 2010-10-27 18:05:25 +00:00
Owen Anderson 6b5af599c0 Tests for NEON encoding of vneg and vqneg. 
llvm-svn: 117463
 2010-10-27 17:57:26 +00:00
Owen Anderson 1e5eb98ed8 Tests for NEON encoding of vabs and vqabs. 
llvm-svn: 117460
 2010-10-27 17:50:07 +00:00
Owen Anderson 8576a42cf3 Add correct NEON encodings for vsli and vsri. 
llvm-svn: 117459
 2010-10-27 17:40:08 +00:00
Owen Anderson d7e8135e1e Add correct NEON encodings for vsra and vrsra. 
llvm-svn: 117458
 2010-10-27 17:29:29 +00:00
Owen Anderson 825b2d1946 Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun. 
llvm-svn: 117411
 2010-10-26 22:50:46 +00:00
Owen Anderson 2888e2c7f9 Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn. 
llvm-svn: 117402
 2010-10-26 21:58:41 +00:00
Owen Anderson c4126a1a2c Add tests for NEON encoding of vshll. 
llvm-svn: 117399
 2010-10-26 21:21:47 +00:00
Owen Anderson 0fbb20769f Tests for NEON encoding of vshr. 
llvm-svn: 117396
 2010-10-26 21:08:42 +00:00
Owen Anderson 3665fee8de Provide correct NEON encodings for vshl, register and immediate forms. 
llvm-svn: 117394
 2010-10-26 20:56:57 +00:00
Owen Anderson db192ba90f Tests for NEON encoding of vrecpe, vrecps, vrsqrte, and vsqrts. 
llvm-svn: 117385
 2010-10-26 18:43:13 +00:00
Owen Anderson b3bcf529fc Tests for NEON encodings of vpmin and vpmax. 
llvm-svn: 117382
 2010-10-26 18:31:47 +00:00
Owen Anderson 691ce68d3c Add correct NEON encoding for vpadal. 
llvm-svn: 117380
 2010-10-26 18:18:03 +00:00
Owen Anderson 035b3261ee Tests for NEON encoding of vpadd and vpaddl. 
llvm-svn: 117377
 2010-10-26 18:04:51 +00:00
Owen Anderson 284cb361d1 Add NEON encodings for vmov and vmvn of immediates. 
llvm-svn: 117374
 2010-10-26 17:40:54 +00:00
Bob Wilson e1961fe289 When the "true" and "false" blocks of a diamond if-conversion are the same, 
do not double-count the duplicate instructions by counting once from the
beginning and again from the end.  Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end.  Radar 8589805.

This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction.  That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.

llvm-svn: 117333
 2010-10-26 00:02:24 +00:00
Owen Anderson c0f777afbf Tests for NEON encoding of vmax. 
llvm-svn: 117327
 2010-10-25 23:45:34 +00:00
Owen Anderson 144c3f8c6a Tests for NEON encoding of vmin. 
llvm-svn: 117326
 2010-10-25 23:35:36 +00:00
Owen Anderson 1f6aad053d Add correct encodings for NEON vabal. 
llvm-svn: 117315
 2010-10-25 21:29:04 +00:00
Owen Anderson b9c91679aa Add correct NEON encodings for vaba. 
llvm-svn: 117309
 2010-10-25 20:52:57 +00:00
Owen Anderson 12214ddaa3 Tests for NEON encoding of vabdl. 
llvm-svn: 117303
 2010-10-25 20:36:28 +00:00
Owen Anderson 64aa05f865 Add tests for NEON encoding of vabd. 
llvm-svn: 117302
 2010-10-25 20:29:27 +00:00
Owen Anderson dd001b89d7 Attempt to provide correct encodings for NEON vbit and vbif, even though we can't test them at the moment. 
llvm-svn: 117294
 2010-10-25 20:17:22 +00:00
Owen Anderson dea09c7564 Provide correct NEON encodings for vbsl. 
llvm-svn: 117293
 2010-10-25 20:13:13 +00:00
Owen Anderson 2477446ee5 Add correct instruction encodings for vbic, vorn, and vmvn. 
llvm-svn: 117282
 2010-10-25 18:43:52 +00:00
Owen Anderson dff239c5f9 Provide correct NEON encodings for vand, veor, and vorr. 
llvm-svn: 117279
 2010-10-25 18:28:30 +00:00
Owen Anderson d9cdda9ddc Add tests for NEON encoding of vtst. 
llvm-svn: 117277
 2010-10-25 18:10:34 +00:00
Owen Anderson feb3ee0c93 Add NEON encoding tests for vcgt and vacgt. 
llvm-svn: 117276
 2010-10-25 18:03:59 +00:00
Owen Anderson e5d0677173 Add tests for NEON encodings of vcge and vacge. 
llvm-svn: 117274
 2010-10-25 17:49:32 +00:00
Owen Anderson c178b80f65 Add a warning about our inability to test the encoding of vceq with immediate zero. 
llvm-svn: 117273
 2010-10-25 17:33:02 +00:00
Owen Anderson 02917f5b1b Add tests for NEON encoding of vceq. 
llvm-svn: 117270
 2010-10-25 17:20:26 +00:00
Owen Anderson a9ad6c0645 Add tests for NEON encoding of vsubhn and vrsubhn. 
llvm-svn: 117269
 2010-10-25 17:12:46 +00:00
Owen Anderson 358900d569 Add tests for NEON encoding of vqsub. 
llvm-svn: 117214
 2010-10-23 18:02:16 +00:00
Owen Anderson 92644efaf8 Add tests for NEON encoding of vhsub. 
llvm-svn: 117189
 2010-10-22 23:58:22 +00:00
Jim Grosbach 0ce06c08fb Add a CMP test. 
llvm-svn: 117187
 2010-10-22 23:48:01 +00:00
Owen Anderson f4e1a09d38 Add tests for NEON encoding of vsubw. 
llvm-svn: 117186
 2010-10-22 23:46:07 +00:00
Owen Anderson 9ef5c507ce Add tests for NEON encoding of vsubl. 
llvm-svn: 117183
 2010-10-22 23:36:36 +00:00
Owen Anderson c372775cc8 Add tests for NEON encoding of vsub. 
llvm-svn: 117177
 2010-10-22 23:21:04 +00:00
Owen Anderson cb5c1b75fe Add tests for NEON encoding of vqdmlsl. 
llvm-svn: 117173
 2010-10-22 23:08:47 +00:00
Owen Anderson d655a80774 Add tests for NEON encoding of vmlsl. 
llvm-svn: 117171
 2010-10-22 23:02:27 +00:00
Jim Grosbach b40a60fa2f tidy up. 
llvm-svn: 117166
 2010-10-22 22:15:48 +00:00
Jim Grosbach 2c9ae05c67 ARM mode encoding information for CLZ, RBIT, REV*, and PKH*. 
llvm-svn: 117165
 2010-10-22 22:12:16 +00:00
Owen Anderson 3c4f72c9f8 Add tests for the correct encoding of NEON vmls. 
llvm-svn: 117145
 2010-10-22 20:31:24 +00:00
Owen Anderson 9d0122af7d Add correct NEON encodings for vqdmlal. 
llvm-svn: 117134
 2010-10-22 19:35:48 +00:00
Jim Grosbach 2b80543fc2 Add the encoding information for the rest of the ARM mode multiply instructions. 
llvm-svn: 117133
 2010-10-22 19:15:30 +00:00
Owen Anderson 3d0264667f Provide correct encodings for NEON vmlal. 
llvm-svn: 117131
 2010-10-22 19:05:25 +00:00
Owen Anderson f48719f1b5 Provide correct NEON encodings for vmla. 
llvm-svn: 117126
 2010-10-22 18:54:37 +00:00
Jim Grosbach 6956a60563 More ARM multiply instuction binary encodings. 
llvm-svn: 117121
 2010-10-22 18:35:16 +00:00
Owen Anderson f6659997a1 Add testscases for encoding of NEON vdqmull. 
llvm-svn: 117115
 2010-10-22 17:57:37 +00:00
Jim Grosbach 22261600a8 More ARM multiply instruction encoding information. 
llvm-svn: 117108
 2010-10-22 17:16:17 +00:00
Owen Anderson 28418de7ee Add tests for NEON encoding of vmull. 
llvm-svn: 117077
 2010-10-21 22:19:53 +00:00
Jim Grosbach a97becfaac ARM binary encodings for MVN variants. 
llvm-svn: 117076
 2010-10-21 22:19:32 +00:00
Owen Anderson 22c940c9ab Add tests for NEON encoding of vqdmulh and vqrdmulh. 
llvm-svn: 117074
 2010-10-21 22:05:33 +00:00
Jim Grosbach 5edb03ee57 ARM Binary encoding information for BFC/BFI instructions. 
llvm-svn: 117072
 2010-10-21 22:03:21 +00:00
Owen Anderson eff79f13a6 Add tests for NEON vmul encoding. 
llvm-svn: 117069
 2010-10-21 21:51:58 +00:00
Owen Anderson 6e1cf114f9 Rename this test to better reflect its contents. 
llvm-svn: 117067
 2010-10-21 21:40:15 +00:00
Owen Anderson c47913acd2 Add tests for NEON encodings of vaddhn and vraddhn. 
llvm-svn: 117064
 2010-10-21 20:56:57 +00:00
Owen Anderson d8be664273 Add tests for NEON encodings of vqadd, which was already correctly encoded. 
llvm-svn: 117059
 2010-10-21 20:42:04 +00:00
Owen Anderson 6b7e401049 Add correct NEON encodings for vhadd and vrhadd. 
llvm-svn: 117047
 2010-10-21 18:55:04 +00:00
Owen Anderson 9561084188 Add correct encodings for NEON vaddw.s* and vaddw.u*. 
llvm-svn: 117040
 2010-10-21 18:20:25 +00:00
Owen Anderson 15c97706e8 Provide correct NEON encodings for vaddl.u* and vaddl.s*. 
llvm-svn: 117039
 2010-10-21 18:09:17 +00:00
Bill Wendling 2a7d269a2b Fix whitespace. 
llvm-svn: 117002
 2010-10-21 06:25:08 +00:00
Andrew Trick f4ebec03e0 putback r116983 and fix simple-fp-encoding.ll tests 
llvm-svn: 116992
 2010-10-21 03:40:16 +00:00
Owen Anderson 6083502848 Implement correct encodings for NEON vadd, both integer and floating point. 
llvm-svn: 116981
 2010-10-21 00:48:00 +00:00
Bill Wendling a65f914bb0 Add encoding for moving a value between two ARM core registers and a doublework 
extension register.

llvm-svn: 116970
 2010-10-20 23:37:40 +00:00
Bill Wendling 058190507b Add encodings for movement between ARM core registers and single-precision 
registers.

llvm-svn: 116961
 2010-10-20 22:44:54 +00:00
Jim Grosbach 68a335e185 ARM mode encoding information for UBFX and SBFX instructions. 
llvm-svn: 116588
 2010-10-15 17:15:16 +00:00
Jim Grosbach 0b5c743811 Simplify test file a bit. 
llvm-svn: 116540
 2010-10-14 23:32:44 +00:00
Jim Grosbach 89efff3763 Add testcase for RRX and ASRS (which effectively tests MOVs, since those 
are just forms of that instruction).

llvm-svn: 116538
 2010-10-14 23:29:18 +00:00
Jim Grosbach eafcb27ded MOVi16 and MOVT ARM mode encodings. 
llvm-svn: 116498
 2010-10-14 18:54:27 +00:00
Bill Wendling 6f52f8a87d Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on 
here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.

llvm-svn: 116471
 2010-10-14 02:33:26 +00:00
Bill Wendling 0441c6cba0 Add encoding for 'fmstat'. 
llvm-svn: 116466
 2010-10-14 01:19:34 +00:00
Bill Wendling 0825f3e441 - Add encodings for multiply add/subtract instructions in all their glory. 
- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.

llvm-svn: 116464
 2010-10-14 01:02:08 +00:00
Bill Wendling f106ecfa59 Add MC encodings for VCVT* instrunctions. 
llvm-svn: 116431
 2010-10-13 20:58:46 +00:00
Jim Grosbach 1e7db68774 Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. 
llvm-svn: 116421
 2010-10-13 19:56:10 +00:00
Jim Grosbach 651dc7c9e9 Add ARM mode operand encoding information for ADDE/SUBE instructions. 
llvm-svn: 116412
 2010-10-13 18:00:52 +00:00
Bill Wendling 6e27b4f530 Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test 
just yet.

llvm-svn: 116386
 2010-10-13 01:17:33 +00:00
Bill Wendling 576fd0b110 Add encodings for VCVT instructions. 
llvm-svn: 116385
 2010-10-13 00:56:35 +00:00
Jim Grosbach 8c519c0d4b Add ARM encoding information for comparisons, forced-cc-out arithmetics, and 
arithmetic-with-carry-in instructions.

llvm-svn: 116384
 2010-10-13 00:50:27 +00:00
Bill Wendling da4ddf0fcf Add VCMPZ and VABS. 
llvm-svn: 116383
 2010-10-13 00:38:07 +00:00
Bill Wendling f9ca535495 Refactor VCMP instructions. 
llvm-svn: 116379
 2010-10-13 00:04:29 +00:00
Bill Wendling 7dd8c0b991 Add encodings for VNMUL[SD]. 
llvm-svn: 116375
 2010-10-12 23:47:37 +00:00
Bill Wendling a06aee826c Add encodings for VDIV and VMUL. 
llvm-svn: 116370
 2010-10-12 23:22:27 +00:00
Jim Grosbach d5f8c3350d Be nitpicky and line up the comments. 
llvm-svn: 116365
 2010-10-12 23:14:03 +00:00
Bill Wendling 646a506724 Add encoding for VSUB and VCMP. 
Fear not! I'm going to try a refactoring right now. :)

llvm-svn: 116359
 2010-10-12 22:55:35 +00:00
Bill Wendling 9513a7e87f Don't need to specify calling convention. Add 'readnone' to functions. 
llvm-svn: 116354
 2010-10-12 22:24:10 +00:00
Bill Wendling ac6cd00706 Encoding for VADDD. Plus a test for the VFP instructions. 
llvm-svn: 116348
 2010-10-12 22:08:41 +00:00
Jim Grosbach 6fead930af Add encoding information for the remainder of the generic arithmetic 
ARM instructions.

llvm-svn: 116313
 2010-10-12 17:11:26 +00:00
Jim Grosbach b7c2962d20 MC machine encoding for simple aritmetic instructions that use a shifted 
register operand.

llvm-svn: 116259
 2010-10-11 23:16:21 +00:00
Jim Grosbach c43c930690 Implement a few more binary encoding bits. Still very early stage proof-of- 
concept level stuff at this point, but it is generally working for those
instructions that know how to map the operands.

This patch fills in the register operands for add/sub/or/etc instructions
and adds the conditional execution predicate encoding.

llvm-svn: 116112
 2010-10-08 21:45:55 +00:00
Jim Grosbach 42a07e8545 Add test file for simple ARM binary encodings with MC 
llvm-svn: 116024
 2010-10-08 00:47:59 +00:00
Chris Lattner fbae9435c9 move ARM MC tests up one level. 
llvm-svn: 115414
 2010-10-02 18:52:05 +00:00