Commit Graph

172 Commits

Author SHA1 Message Date
Craig Topper ae65212a4b Remove more unnecessary # operators with nothing to paste proceeding them.
llvm-svn: 171702
2013-01-07 06:14:20 +00:00
Craig Topper a8c5ec09c7 Remove # from the beginning and end of def names. The # is a paste operator and should only be used with something to paste on either side.
llvm-svn: 171697
2013-01-07 05:45:56 +00:00
Chandler Carruth 664e354de7 Switch TargetTransformInfo from an immutable analysis pass that requires
a TargetMachine to construct (and thus isn't always available), to an
analysis group that supports layered implementations much like
AliasAnalysis does. This is a pretty massive change, with a few parts
that I was unable to easily separate (sorry), so I'll walk through it.

The first step of this conversion was to make TargetTransformInfo an
analysis group, and to sink the nonce implementations in
ScalarTargetTransformInfo and VectorTargetTranformInfo into
a NoTargetTransformInfo pass. This allows other passes to add a hard
requirement on TTI, and assume they will always get at least on
implementation.

The TargetTransformInfo analysis group leverages the delegation chaining
trick that AliasAnalysis uses, where the base class for the analysis
group delegates to the previous analysis *pass*, allowing all but tho
NoFoo analysis passes to only implement the parts of the interfaces they
support. It also introduces a new trick where each pass in the group
retains a pointer to the top-most pass that has been initialized. This
allows passes to implement one API in terms of another API and benefit
when some other pass above them in the stack has more precise results
for the second API.

The second step of this conversion is to create a pass that implements
the TargetTransformInfo analysis using the target-independent
abstractions in the code generator. This replaces the
ScalarTargetTransformImpl and VectorTargetTransformImpl classes in
lib/Target with a single pass in lib/CodeGen called
BasicTargetTransformInfo. This class actually provides most of the TTI
functionality, basing it upon the TargetLowering abstraction and other
information in the target independent code generator.

The third step of the conversion adds support to all TargetMachines to
register custom analysis passes. This allows building those passes with
access to TargetLowering or other target-specific classes, and it also
allows each target to customize the set of analysis passes desired in
the pass manager. The baseline LLVMTargetMachine implements this
interface to add the BasicTTI pass to the pass manager, and all of the
tools that want to support target-aware TTI passes call this routine on
whatever target machine they end up with to add the appropriate passes.

The fourth step of the conversion created target-specific TTI analysis
passes for the X86 and ARM backends. These passes contain the custom
logic that was previously in their extensions of the
ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces.
I separated them into their own file, as now all of the interface bits
are private and they just expose a function to create the pass itself.
Then I extended these target machines to set up a custom set of analysis
passes, first adding BasicTTI as a fallback, and then adding their
customized TTI implementations.

The fourth step required logic that was shared between the target
independent layer and the specific targets to move to a different
interface, as they no longer derive from each other. As a consequence,
a helper functions were added to TargetLowering representing the common
logic needed both in the target implementation and the codegen
implementation of the TTI pass. While technically this is the only
change that could have been committed separately, it would have been
a nightmare to extract.

The final step of the conversion was just to delete all the old
boilerplate. This got rid of the ScalarTargetTransformInfo and
VectorTargetTransformInfo classes, all of the support in all of the
targets for producing instances of them, and all of the support in the
tools for manually constructing a pass based around them.

Now that TTI is a relatively normal analysis group, two things become
straightforward. First, we can sink it into lib/Analysis which is a more
natural layer for it to live. Second, clients of this interface can
depend on it *always* being available which will simplify their code and
behavior. These (and other) simplifications will follow in subsequent
commits, this one is clearly big enough.

Finally, I'm very aware that much of the comments and documentation
needs to be updated. As soon as I had this working, and plausibly well
commented, I wanted to get it committed and in front of the build bots.
I'll be doing a few passes over documentation later if it sticks.

Commits to update DragonEgg and Clang will be made presently.

llvm-svn: 171681
2013-01-07 01:37:14 +00:00
Chandler Carruth 9fb823bbd4 Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

llvm-svn: 171366
2013-01-02 11:36:10 +00:00
Bill Wendling 94dcaf8e2b Remove Function::getParamAttributes and use the AttributeSet accessor methods instead.
llvm-svn: 171255
2012-12-30 12:45:13 +00:00
Jakub Staszak afe8109fce Delete executive bit on ./lib/Target/Hexagon/HexagonAsmPrinter.h.
llvm-svn: 171225
2012-12-29 15:23:06 +00:00
Jyotsna Verma 56605448f2 Add constant extender support to GP-relative load/store instructions.
llvm-svn: 170672
2012-12-20 06:52:46 +00:00
Jyotsna Verma bf75aaf53e Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps.
llvm-svn: 170671
2012-12-20 06:45:39 +00:00
Bill Wendling 3d7b0b8ac7 Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.
llvm-svn: 170502
2012-12-19 07:18:57 +00:00
Jyotsna Verma 92e71918b1 Use multiclass for new-value store instructions with MEMri operand.
llvm-svn: 169814
2012-12-11 05:12:25 +00:00
NAKAMURA Takumi 6b819c5fb1 [CMake] Update dependencies to intrinsics_gen corresponding to r169711.
llvm-svn: 169724
2012-12-10 05:27:15 +00:00
Matthew Curtis 7a93811e8b In hexagon convertToHardwareLoop, don't deref end() iterator
In particular, check if MachineBasicBlock::iterator is end() before
using it to call getDebugLoc();

See also this thread on llvm-commits:
   http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121112/155914.html

llvm-svn: 169634
2012-12-07 21:03:15 +00:00
Jyotsna Verma d3746e6895 Define new-value store instructions with base+immediate addressing mode
using multiclass.

llvm-svn: 169432
2012-12-05 22:02:56 +00:00
Jyotsna Verma 90295156d8 Use multiclass to define store instructions with base+immediate offset
addressing mode and immediate stored value.

llvm-svn: 169408
2012-12-05 19:32:03 +00:00
Matthew Curtis cd8c881c9f Fix misplaced closing brace.
llvm-svn: 169404
2012-12-05 19:00:34 +00:00
Jyotsna Verma 4da904c8f8 Define store instructions with base+register offset addressing mode
using multiclass.

llvm-svn: 169314
2012-12-04 21:58:25 +00:00
Jyotsna Verma dfd779e108 Add patterns to define 'combine', 'tstbit', 'ct0/cl0' (count trailing/leading zeros)
instructions.

llvm-svn: 169287
2012-12-04 18:05:01 +00:00
Jyotsna Verma 22d61dd4ce Add constant extender support to ALU32 instructions for V2.
llvm-svn: 169284
2012-12-04 17:12:00 +00:00
Chandler Carruth 802d755533 Sort includes for all of the .h files under the 'lib' tree. These were
missed in the first pass because the script didn't yet handle include
guards.

Note that the script is now able to handle all of these headers without
manual edits. =]

llvm-svn: 169224
2012-12-04 07:12:27 +00:00
Jyotsna Verma 5929cfc534 Move all operand definitions into HexagonOperands.td
llvm-svn: 169213
2012-12-04 05:00:31 +00:00
Jyotsna Verma efe4f559b1 Move generic Hexagon subtarget information into Hexagon.td
llvm-svn: 169212
2012-12-04 04:29:16 +00:00
Jyotsna Verma 6f3bd03e50 Define store instructions with base+immediate offset addressing mode
using multiclass.

llvm-svn: 169168
2012-12-03 22:26:28 +00:00
Jyotsna Verma 4d8686cc42 Define load instructions with base+immediate offset addressing mode
using multiclass.

llvm-svn: 169153
2012-12-03 21:13:13 +00:00
Jyotsna Verma c86b3e1b26 Define unsigned const-ext predicates.
llvm-svn: 169149
2012-12-03 20:39:45 +00:00
Jyotsna Verma 6aba56e9d4 Removing unnecessary 'else' statement from the predicates defined in HexagonOperards.td.
llvm-svn: 169148
2012-12-03 20:14:38 +00:00
Chandler Carruth ed0881b2a6 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131
2012-12-03 16:50:05 +00:00
Jyotsna Verma 014dfe4de0 Define signed const-ext predicates.
llvm-svn: 169117
2012-12-03 06:54:50 +00:00
Jyotsna Verma a77c054e85 Use multiclass for the load instructions with MEMri operand.
llvm-svn: 169018
2012-11-30 17:31:52 +00:00
Jyotsna Verma b950ea61fc Use multiclass for the store instructions with MEMri operand.
llvm-svn: 168983
2012-11-30 06:10:22 +00:00
Jyotsna Verma ede608cce0 Use multiclass for the load instructions with 'base + register offset'
addressing mode.

llvm-svn: 168976
2012-11-30 04:19:09 +00:00
Jyotsna Verma e95559fc16 Use multiclass for 'transfer' instructions.
llvm-svn: 168929
2012-11-29 19:35:44 +00:00
Jyotsna Verma 519b3856dd Define signed const-ext immediate operands and their predicates.
llvm-svn: 168810
2012-11-28 20:58:14 +00:00
Jyotsna Verma b5bb659d50 Fix comments in HexagonOperands.td.
llvm-svn: 168617
2012-11-26 21:56:51 +00:00
Jyotsna Verma 0df99bd2e4 Add new predicates for the immediate operands.
llvm-svn: 168451
2012-11-21 20:05:09 +00:00
Jyotsna Verma 3ec3a49432 Use one common 'let' expression to set PrintMethod for all immediate operands.
llvm-svn: 168449
2012-11-21 19:53:42 +00:00
Rafael Espindola b90c5f12f0 Finish the renaming.
llvm-svn: 168437
2012-11-21 16:56:33 +00:00
Jyotsna Verma 6c0a3550c8 Renamed HexagonImmediates.td -> HexagonOperands.td.
llvm-svn: 168434
2012-11-21 16:28:18 +00:00
Jyotsna Verma c6f2465b5d Removing some unused instruction definitions from the Hexagon backend.
llvm-svn: 168388
2012-11-20 22:14:23 +00:00
Jyotsna Verma 6649360860 Added multiclass for post-increment load instructions.
llvm-svn: 167974
2012-11-14 20:38:48 +00:00
Jyotsna Verma ccfd77ef90 Test commit.
Add a blank line.

llvm-svn: 167819
2012-11-13 06:31:55 +00:00
Andrew Trick baeaabb2d0 ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.
This is in preparation for adding "weak" DAG edges, but generally
simplifies the design.

llvm-svn: 167435
2012-11-06 03:13:46 +00:00
Pranav Bhandarkar 34b601804e Use the relationship models infrastructure to add two relations - getPredOpcode
and getPredNewOpcode. The first relates non predicated instructions with their
predicated forms and the second relates predicated instructions with their
predicate-new forms.

Patch by Jyotsna Verma!

llvm-svn: 167243
2012-11-01 19:13:23 +00:00
Nadav Rotem 2289f2c932 Implement a basic VectorTargetTransformInfo interface to be used by the loop and bb vectorizers for modeling the cost of instructions.
llvm-svn: 166593
2012-10-24 17:22:41 +00:00
Nadav Rotem 5dc203e8f4 Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerinvoke.
llvm-svn: 166248
2012-10-18 23:22:48 +00:00
Bob Wilson d6d9ccca38 Temporarily revert the TargetTransform changes.
The TargetTransform changes are breaking LTO bootstraps of clang.  I am
working with Nadav to figure out the problem, but I am reverting it for now
to get our buildbots working.

This reverts svn commits: 165665 165669 165670 165786 165787 165997
and I have also reverted clang svn 165741

llvm-svn: 166168
2012-10-18 05:43:52 +00:00
Nadav Rotem e10328737d Add a new interface to allow IR-level passes to access codegen-specific information.
llvm-svn: 165665
2012-10-10 22:04:55 +00:00
Andrew Trick dd79f0fcea misched: Use the TargetSchedModel interface wherever possible.
Allows the new machine model to be used for NumMicroOps and OutputLatency.

Allows the HazardRecognizer to be disabled along with itineraries.

llvm-svn: 165603
2012-10-10 05:43:09 +00:00
Bill Wendling c9b22d735a Create enums for the different attributes.
We use the enums to query whether an Attributes object has that attribute. The
opaque layer is responsible for knowing where that specific attribute is stored.

llvm-svn: 165488
2012-10-09 07:45:08 +00:00
Micah Villmow cdfe20b97f Move TargetData to DataLayout.
llvm-svn: 165402
2012-10-08 16:38:25 +00:00
Bill Wendling b0a290ef9e Use new accessor methods to query for attributes.
llvm-svn: 165205
2012-10-04 06:43:21 +00:00