Commit Graph

94847 Commits

Author SHA1 Message Date
Peter Collingbourne 444c59e270 DataFlowSanitizer: Add a debugging feature to help us track nonzero labels.
Summary:
When the -dfsan-debug-nonzero-labels parameter is supplied, the code
is instrumented such that when a call parameter, return value or load
produces a nonzero label, the function __dfsan_nonzero_label is called.
The idea is that a debugger breakpoint can be set on this function
in a nominally label-free program to help identify any bugs in the
instrumentation pass causing labels to be introduced.

Reviewers: eugenis

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1405

llvm-svn: 188472
2013-08-15 18:51:12 +00:00
Bill Wendling 2851907cdb Constify the function parameters.
llvm-svn: 188469
2013-08-15 18:46:14 +00:00
Joey Gouly f66198822f Drive-by fix for a doxygen comment in MachineInstr.h.
llvm-svn: 188467
2013-08-15 16:02:44 +00:00
Mihai Popa d79f00ba68 This fixes three issues related to Thumb literal loads:
1. The offset range for Thumb1 PC relative loads is [0..1020] and not [-1024..1020]
2. Thumb2 PC relative loads may define the PC, so the restriction placed on target register is removed
3. Removes unneeded alias between "ldr.n" and t1LDRpci. ".n" is actually stripped by both tablegen
and the ASM parser, so this alias rule really does nothing

llvm-svn: 188466
2013-08-15 15:43:06 +00:00
Jack Carter d12e837f05 [Mips][msa] Added the simple builtins (madd_q to xori)
Includes:
madd_q, maddr_q, maddv, max_[asu], maxi_[su], min_[asu], mini_[su], mod_[su],
msub_q, msubr_q, msubv, mul_q, mulr_q, mulv, nloc, nlzc, nori, ori, pckev,
pckod, pcnt, sat_[su], shf, sld, sldi, sll, slli, splat, splati, sr[al],
sr[al]i, subs_[su], subss_u, subus_s, subv, subvi, vshf, xori

Patch by Daniel Sanders

llvm-svn: 188460
2013-08-15 14:22:07 +00:00
Jack Carter b95ee69163 [Mips][msa] Added the simple builtins (fadd to ftq)
Includes:
fadd, fceq, fcg[et], fclass, fcl[et], fcne, fcun, fdiv, fexdo, fexp2,
fexup[lr], ffint_[su], ffql, ffqr, fill, flog2, fmadd, fmax, fmax_a, fmin,
fmin_a, fmsub, fmul, frint, frcp, frsqrt, fseq, fsge, fsgt, fsle, fslt,
fsne, fsqr, fsub, ftint_s, ftq

Patch by Daniel Sanders

llvm-svn: 188458
2013-08-15 13:45:36 +00:00
Jack Carter babdcc8c2c [Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)
Includes:
add_a, adds_[asu], addv, addvi, andi.b, asub_[su].[bhwd], aver?_[su]_[bhwd],
bclr, bclri, bins[lr], bins[lr]i, bmnzi, bmzi, bneg, bnegi, bseli, bset, bseti,
c(eq|ne), c(eq|ne)i, cl[et]_[su], cl[et]i_[su], copy_[su].[bhw], div_[su],
dotp_[su], dpadd_[su], dpsub_[su], ilvev, ilvl, ilvod, ilvr, insv, insve,
ldi

Patch by Daniel Sanders

llvm-svn: 188457
2013-08-15 12:24:57 +00:00
Craig Topper 8dbc7e9d35 Revert r188449 as it turns out we're just missing the instructions that need the v16i32/v16f32 matching.
llvm-svn: 188454
2013-08-15 08:38:25 +00:00
Hao Liu cd8b02dce3 Clang and AArch64 backend patches to support shll/shl and vmovl instructions and ACLE functions
llvm-svn: 188451
2013-08-15 08:26:11 +00:00
Craig Topper 2ffd06528d Don't let isPermImmMask handle v16i32 since VPERMI doesn't match on that type. Remove 128-bit vector handling from isPermImmMask too, it's covered by isPSHUFDMask.
llvm-svn: 188449
2013-08-15 07:30:51 +00:00
Alexey Samsonov 3186eb3efd Tentative fix for global-buffer-overflow caused by r188426. Found by AddressSanitizer
llvm-svn: 188448
2013-08-15 07:11:34 +00:00
Craig Topper 83e042a21b Use MVT instead of EVT in X86ISelDAGToDAG since all the types should be legal.
llvm-svn: 188446
2013-08-15 05:57:07 +00:00
Craig Topper 6f4dd2dacf Use MVT in place of EVT in more X86 operation lowering functions.
llvm-svn: 188445
2013-08-15 05:33:45 +00:00
Michael Gottesman 21c69487a4 Fixed typo in CMakeLists.txt.
We were marking both LLVMBUILDOUTPUT and LLVMBUILDERRORS as
ERROR_VARIABLES when clearly LLVMBUILDOUTPUT should be marked as
OUTPUT_VARIABLE.

llvm-svn: 188444
2013-08-15 04:16:12 +00:00
Craig Topper d9c2783d8f Replace getValueType().getSimpleVT() with getSimpleValueType().
llvm-svn: 188442
2013-08-15 02:44:19 +00:00
Craig Topper 5671010cbb Replace getValueType().getSimpleVT() with getSimpleValueType(). Also remove one weird cast from MVT->EVT just to call getSimpleVT().
llvm-svn: 188441
2013-08-15 02:33:50 +00:00
Mark Lacey 9d8103de7a Auto-compute live intervals on demand.
When new virtual registers are created during splitting/spilling, defer
creation of the live interval until we need to use the live interval.

Along with the recent commits to notify LiveRangeEdit when new virtual
registers are created, this makes it possible for functions like
TargetInstrInfo::loadRegFromStackSlot() and
TargetInstrInfo::storeRegToStackSlot() to create multiple virtual
registers as part of the process of generating loads/stores for
different register classes, and then have the live intervals for those
new registers computed when they are needed.

llvm-svn: 188437
2013-08-14 23:50:16 +00:00
Mark Lacey c3f912b945 Add the MachineInstrSpan class.
MachineInstrSpan is initialized with a MachineBasicBlock::iterator,
and is intended to track which instructions are inserted before/after
that instruction from the time the MachineInstrSpan is created.

It provides a begin()/end() interface to walk the range of
instructions inserted around the initial instruction (including that
initial instruction).

It also provides a getInitial() interface to return the initial
iterator.

llvm-svn: 188436
2013-08-14 23:50:11 +00:00
Mark Lacey f367cd9239 Notify LiveRangeEdit of new virtual registers.
Add a delegate class to MachineRegisterInfo with a single virtual
function, MRI_NoteNewVirtualRegister(). Update LiveRangeEdit to inherit
from this delegate class and override the definition of the callback
with an implementation that tracks the newly created virtual registers.

llvm-svn: 188435
2013-08-14 23:50:09 +00:00
Mark Lacey f9ea88546f Track new virtual registers by register number.
Track new virtual registers by register number, rather than by the live
interval created for them. This is the first step in separating the
creation of new virtual registers and new live intervals.  Eventually
live intervals will be created and populated on demand after the virtual
registers have been created and used in instructions.

llvm-svn: 188434
2013-08-14 23:50:04 +00:00
Tom Stellard d86003e31f R600/SI: Improve legalization of vector operations
This should fix hangs in the OpenCL piglit tests.

llvm-svn: 188431
2013-08-14 23:25:00 +00:00
Tom Stellard 6785065ace R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics
llvm-svn: 188430
2013-08-14 23:24:53 +00:00
Tom Stellard 9fa1791a1b R600/SI: Convert v16i8 resource descriptors to i128
Now that compute support is better on SI, we can't continue using v16i8
for descriptors since this is also a legal type in OpenCL.

This patch fixes numerous hangs with the piglit OpenCL test and since
we now use a target specific DAG node for LOAD_CONSTANT with the
correct MemOperandFlags, this should also fix:

https://bugs.freedesktop.org/show_bug.cgi?id=66805

llvm-svn: 188429
2013-08-14 23:24:45 +00:00
Tom Stellard b81df0c7ea R600/SI: Use i8 types for resource descriptors in tests
We switched from i32 to i8 types a while ago and the tests were never
updated.

llvm-svn: 188428
2013-08-14 23:24:37 +00:00
Tom Stellard 8e5da41374 R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
Using REG_SEQUENCE for BUILD_VECTOR rather than a series of INSERT_SUBREG
instructions should make it easier for the register allocator to coalasce
unnecessary copies.

v2:
  - Use an SGPR register class if all the operands of BUILD_VECTOR are
    SGPRs.

llvm-svn: 188427
2013-08-14 23:24:32 +00:00
Tom Stellard df94dc3917 R600/SI: Choose the correct MOV instruction for copying immediates
The instruction selector will now try to infer the destination register
so it can decided whether to use V_MOV_B32 or S_MOV_B32 when copying
immediates.

llvm-svn: 188426
2013-08-14 23:24:24 +00:00
Tom Stellard 16a9a205c8 R600/SI: Assign a register class to the $vaddr operand for MIMG instructions
The previous code declared the operand as unknown:$vaddr, which made
it possible for scalar registers to be used instead of vector registers.

llvm-svn: 188425
2013-08-14 23:24:17 +00:00
Daniel Dunbar 25ff9f6014 [llvm-build] Make Py3 compatible.
llvm-svn: 188424
2013-08-14 23:15:39 +00:00
Peter Collingbourne cdc97373f8 DataFlowSanitizer: move abilist input file to Inputs.
llvm-svn: 188423
2013-08-14 22:28:36 +00:00
David Blaikie d0d6fcc923 DebugInfo: Prefer references over pointers, pass by const reference for a type that will grow in the future
llvm-svn: 188422
2013-08-14 22:23:05 +00:00
Tom Stellard 3494b7ee42 R600/SI: Handle MSAA texture targets
Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
llvm-svn: 188421
2013-08-14 22:22:14 +00:00
Tom Stellard 20ee94f152 R600/SI: Allow conversion between v32i8 and v8i32
Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
llvm-svn: 188420
2013-08-14 22:22:09 +00:00
Tom Stellard a36f077159 R600/SI: Fix an obvious typo
Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
llvm-svn: 188419
2013-08-14 22:22:03 +00:00
Tom Stellard 73c31d541e R600/SI: Add pattern for fp_to_uint
This fixes the F2U opcode for the Mesa driver.

Patch by: Marek Olšák

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
llvm-svn: 188418
2013-08-14 22:21:57 +00:00
Daniel Dunbar 301d387929 [lit] Add test coverage of gtest format.
llvm-svn: 188417
2013-08-14 22:21:11 +00:00
Daniel Dunbar 54d613b97f [lit] Ensure test output is converted to strings where possible.
- This cleans up the text output of failing tests when run under PY3.

llvm-svn: 188416
2013-08-14 22:21:01 +00:00
Mark Lacey a2626555f1 Fix small typo: s/succ/Succ/
llvm-svn: 188415
2013-08-14 22:11:42 +00:00
Peter Collingbourne 9d31d6f329 DataFlowSanitizer: Instrumentation for memset.
Differential Revision: http://llvm-reviews.chandlerc.com/D1395

llvm-svn: 188412
2013-08-14 20:51:38 +00:00
Hal Finkel b3ca00d2a3 Actually fix PPC64 64-bit GPR inline asm constraint matching
This is a follow-up to r187693, correcting that code to request the correct
register class. The previous version, with the wrong register class, was not
really correcting the constraints, but rather was removing them. Coincidentally,
this fixed the failing test case in r187693, but obviously created other
problems.

llvm-svn: 188407
2013-08-14 20:05:04 +00:00
Peter Collingbourne 68162e7512 DataFlowSanitizer: greylist is now ABI list.
This replaces the old incomplete greylist functionality with an ABI
list, which can provide more detailed information about the ABI and
semantics of specific functions.  The pass treats every function in
the "uninstrumented" category in the ABI list file as conforming to
the "native" (i.e. unsanitized) ABI.  Unless the ABI list contains
additional categories for those functions, a call to one of those
functions will produce a warning message, as the labelling behaviour
of the function is unknown.  The other supported categories are
"functional", "discard" and "custom".

- "discard" -- This function does not write to (user-accessible) memory,
  and its return value is unlabelled.
- "functional" -- This function does not write to (user-accessible)
  memory, and the label of its return value is the union of the label of
  its arguments.
- "custom" -- Instead of calling the function, a custom wrapper __dfsw_F
  is called, where F is the name of the function.  This function may wrap
  the original function or provide its own implementation.

Differential Revision: http://llvm-reviews.chandlerc.com/D1345

llvm-svn: 188402
2013-08-14 18:54:12 +00:00
Daniel Dunbar e469b981f3 [lit] Support parsing scripts with inconsistent or invalid encodings.
- For whatever reason, we have a lot of test files with bogus unicode
   characters. This patch allows those scripts to still be parsed on Python3 by
   changing the parsing logic to work on binary files, and only require the
   actual script commands to be convertible to ascii.

 - This patch has been tweaked to now ensure that the command strings are not of
   unicode type on Python 2.6-7.

llvm-svn: 188398
2013-08-14 18:22:41 +00:00
Reid Kleckner be85cb9098 Use the MSVC __cpuid intrinsic instead of inline asm
This works around PR16830 in LLVM when self-hosting clang on Windows.

llvm-svn: 188397
2013-08-14 18:21:51 +00:00
Jakob Stoklund Olesen 4417c7b265 Remove unnecessary parameter to RenumberValues.
Patch by Matthias Braun!

llvm-svn: 188393
2013-08-14 17:28:52 +00:00
Jakob Stoklund Olesen 386a9bb09d Remove unused function.
Patch by Matthias Braun!

llvm-svn: 188392
2013-08-14 17:28:49 +00:00
Jakob Stoklund Olesen 6d13b8fd85 Improve misleading comment.
Patch by Matthias Braun!

llvm-svn: 188391
2013-08-14 17:28:46 +00:00
Jakob Stoklund Olesen 874c412b6f Remove declaration of nonexistant function.
Patch by Matthias Braun!

llvm-svn: 188390
2013-08-14 17:28:44 +00:00
Jakob Stoklund Olesen 21914ab441 LiveIntervalUnion is not used in RegAllocBase.
Patch by Matthias Braun!

llvm-svn: 188389
2013-08-14 17:28:42 +00:00
Jakob Stoklund Olesen f6b3f1ad76 Remove unused struct/enum
Patch by Matthias Braun!

llvm-svn: 188388
2013-08-14 17:28:39 +00:00
Alexey Samsonov 3e9997f2c5 llvm-symbolizer: add support for .gnu_debuglink section
llvm-svn: 188386
2013-08-14 17:09:30 +00:00
Renato Golin b184cd99ba Let t2LDRBi8 and t2LDRBi12 have same Base Pointer
When determining if two different loads are from the same base address,
this patch allows one load to use a t2LDRi8 address mode and another to
use a t2LDRi12 address mode. The current implementation is very
conservative and this allows the case of differing Thumb2 byte loads to
be considered. Allowing these differing modes instead of forcing the exact
same opcode is useful for situations where one opcodes loads from a base
address+1 and a second opcode loads for a base address-1.

Patch by Daniel Stewart.

llvm-svn: 188385
2013-08-14 16:35:29 +00:00