Commit Graph

305567 Commits

Author SHA1 Message Date
Jordan Rupprecht 4888c4aba5 [llvm-size][libobject] Add explicit "inTextSegment" methods similar to "isText" section methods to calculate size correctly.
Summary:
llvm-size uses "isText()" etc. which seem to indicate whether the section contains code-like things, not whether or not it will actually go in the text segment when in a fully linked executable.

The unit test added (elf-sizes.test) shows some types of sections that cause discrepencies versus the GNU size tool. llvm-size is not correctly reporting sizes of things mapping to text/data segments, at least for ELF files.

This fixes pr38723.

Reviewers: echristo, Bigcheese, MaskRay

Reviewed By: MaskRay

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54369

llvm-svn: 349074
2018-12-13 19:40:12 +00:00
Hyrum Wright 35cb7e9fe8 [clang-tidy] Add the abseil-duration-subtraction check
Summary:
This check uses the context of a subtraction expression as well as knowledge
about the Abseil Time types, to infer the type of the second operand of some
subtraction expressions in Duration conversions. For example:

   absl::ToDoubleSeconds(duration) - foo

can become
   absl::ToDoubleSeconds(duration - absl::Seconds(foo))

This ensures that time calculations are done in the proper domain, and also
makes it easier to further deduce the types of the second operands to these
expressions.

Reviewed By: JonasToth

Tags: #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D55245

llvm-svn: 349073
2018-12-13 19:23:52 +00:00
Craig Topper c6bfb05762 [CostModel][X86] Don't count 2 shuffles on the last level of a pairwise arithmetic or min/max reduction
This is split from D55452 with the correct patch this time.

Pairwise reductions require two shuffles on every level but the last. On the last level the two shuffles are <1, u, u, u...> and <0, u, u, u...>, but <0, u, u, u...> will be dropped by InstCombine/DAGCombine as being an identity shuffle.

Differential Revision: https://reviews.llvm.org/D55615

llvm-svn: 349072
2018-12-13 19:08:10 +00:00
Louis Dionne 5f1706f3aa [libcxx] Fix pop_back() tests to make sure they don't always just pass
llvm-svn: 349071
2018-12-13 18:53:17 +00:00
Stefan Granitz 405c5109e2 [CMake] llvm_codesign workaround for Xcode double-signing errors
Summary:
When using Xcode to build LLVM with code signing, the post-build rule is executed even if the actual build-step was skipped. This causes double-signing errors. We can currently only avoid it by passing the `--force` flag.

Plus some polishing for my previous patch D54443.

Reviewers: beanz, kubamracek

Reviewed By: kubamracek

Subscribers: #lldb, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D55116

llvm-svn: 349070
2018-12-13 18:51:19 +00:00
Davide Italiano 9737096bb1 [LoopUtils] Use i32 instead of `void`.
The actual type of the first argument of the @dbg intrinsic
doesn't really matter as we're setting it to `undef`, but the
bitcode reader is picky about `void` types.

llvm-svn: 349069
2018-12-13 18:37:23 +00:00
Tom Stellard dda331284d Don't add unnecessary compiler flags to llvm-config output
Summary:
llvm-config --cxxflags --cflags, should only output the minimal flags
required to link against the llvm libraries.  They currently contain
all flags used to compile llvm including flags like -g, -pedantic,
-Wall, etc, which users may not always want.

This changes the llvm-config output to only include flags that have been
explictly added to the COMPILE_FLAGS property of the llvm-config target
by the llvm build system.

llvm.org/PR8220

Output from llvm-config when running cmake with:
cmake -G Ninja .. -DCMAKE_CXX_FLAGS=-funroll-loops

Before:

--cppflags: -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include
            -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
--cflags:   -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include
            -fPIC -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings \
            -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough \
            -Wno-comment -fdiagnostics-color -g -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS \
            -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
--cxxflags: -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include\
            -funroll-loops -fPIC -fvisibility-inlines-hidden -Werror=date-time -std=c++11 -Wall \
            -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers \
            -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-maybe-uninitialized \
            -Wno-class-memaccess -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment \
            -fdiagnostics-color -g  -fno-exceptions -fno-rtti -D_GNU_SOURCE -D_DEBUG \
            -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS"

After:

--cppflags: -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include \
            -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
--cflags:   -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include \
            -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
--cxxflags: -I$HEADERS_DIR/llvm/include -I$HEADERS_DIR/llvm/build/include \
             -std=c++11   -fno-exceptions -fno-rtti \
             -D_GNU_SOURCE -D_DEBUG -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS

Reviewers: sylvestre.ledru, infinity0, mgorny

Reviewed By: sylvestre.ledru, mgorny

Subscribers: mgorny, dmgreen, llvm-commits

Differential Revision: https://reviews.llvm.org/D55391

llvm-svn: 349068
2018-12-13 18:21:23 +00:00
Zachary Turner d3d2b9b891 [NativePDB] Add support for local variables.
This patch adds support for parsing and evaluating local variables.
using the native pdb plugin.

Differential Revision: https://reviews.llvm.org/D55575

llvm-svn: 349067
2018-12-13 18:17:51 +00:00
Zachary Turner a05ae9db01 Correctly handle skewed streams in drop_front() method.
When calling BinaryStreamArray::drop_front(), if the stream
is skewed it means we must never drop the first bytes of the
stream since offsets which occur in records assume the existence
of those bytes.  So if we want to skip the first record in a
stream, then what we really want to do is just set the begin
pointer to the next record.  But we shouldn't actually remove
those bytes from the underlying view of the data.

llvm-svn: 349066
2018-12-13 18:11:33 +00:00
Adrian Prantl 046d100b41 Reinstate DW_AT_comp_dir support after D55519.
The DIFile used by the CU is special and distinct from the main source
file. Its directory part specifies what becomes the DW_AT_comp_dir
(the compilation directory), even if the source file was specified
with an absolute path.

To support the .dwo workflow, a valid DW_AT_comp_dir is necessary even
if source files were specified with an absolute path.

llvm-svn: 349065
2018-12-13 17:53:29 +00:00
Sylvestre Ledru 8b325fc706 Try to update the test to fix the breakage
With the new warning, we are showing one more output in the test.

llvm-svn: 349064
2018-12-13 17:39:02 +00:00
Ilya Biryukov 69e181d4c6 [CodeComplete] Adhere to LLVM naming style in CodeCompletionTest. NFC
Also reuses the same var for multiple to reduce the chance of
accidentally referecing the previous test.

llvm-svn: 349063
2018-12-13 17:32:38 +00:00
Greg Clayton e55979b1e2 Fix MinidumpParser::GetFilteredModuleList() and test it
The MinidumpParser::GetFilteredModuleList() code was attempting to iterate through the entire module list and if it found more than one entry for a given module name, it wanted to pick the MinidumpModule with the lowest address. A bug existed where it wasn't doing that due to "exists" variable being inverted. "exists" was set to true if it was inserted, not if it existed. Furthermore, the order of the modules would be modified by sorting all modules from low address to high address (using MinidumpModule::base_of_image). This fix also maintains the original order which means your executable is at index 0 as intended instead of some random shared library.

Tests were added to ensure this functionality doesn't regress.

Differential Revision: https://reviews.llvm.org/D55614

llvm-svn: 349062
2018-12-13 17:24:30 +00:00
Ilya Biryukov 67dbeb6c6a [CodeComplete] Temporarily disable failing assertion
Found the case in the clang codebase where the assertion fires.
To avoid crashing assertion-enabled builds before I re-add the missing
operation.
Will restore the assertion alongside the upcoming fix.

llvm-svn: 349061
2018-12-13 17:23:48 +00:00
Francis Visoiu Mistrih 91e69d8a92 [MachO][TLOF] Add support for local symbols in the indirect symbol table
On 32-bit archs, before, we would assume that an indirect symbol will
never have local linkage. This can lead to miscompiles where the
symbol's value would be 0 and the linker would use that value, because
the indirect symbol table would contain the value
`INDIRECT_SYMBOL_LOCAL` for that specific symbol.

Differential Revision: https://reviews.llvm.org/D55573

llvm-svn: 349060
2018-12-13 17:23:30 +00:00
David Green 0250e29e50 Fix CodeCompleteTest.cpp for older gcc plus ccache builds
Some versions of gcc, especially when invoked through ccache (-E), can have
trouble with raw string literals inside macros. This moves the string out of
the macro.

llvm-svn: 349059
2018-12-13 17:20:06 +00:00
Sanjay Patel 791ae69afe [DAGCombiner] after simplifying demanded elements of vector operand of extract, revisit the extract; 2nd try
This is a retry of rL349051 (reverted at rL349056). I changed the check for dead-ness from
number of uses to an opcode test for DELETED_NODE based on existing similar code.

Differential Revision: https://reviews.llvm.org/D55655

llvm-svn: 349058
2018-12-13 17:05:01 +00:00
Simon Pilgrim b5aaa673c6 [X86][SSE] Add SSE vector imm/var shift support to SimplifyDemandedVectorEltsForTargetNode
llvm-svn: 349057
2018-12-13 16:39:29 +00:00
Sanjay Patel c56f5728ee revert rL349051: [DAGCombiner] after simplifying demanded elements of vector operand of extract, revisit the extract
This causes an address sanitizer bot failure:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/27187/steps/check-llvm%20asan/logs/stdio

llvm-svn: 349056
2018-12-13 16:32:44 +00:00
Daniel Sanders a39df2e6d6 Recommit r349041: [tblgen][disasm] Separate encodings from instructions
Removed const from the ArrayRef<const EncodingAndInst> to avoid the
std::vector<const EncodingAndInst> that G++ saw

llvm-svn: 349055
2018-12-13 16:17:54 +00:00
Sylvestre Ledru 8523c085e7 Make -Wstring-plus-int warns even if when the result is not out of bounds
Summary: Patch by Arnaud Bienner

Reviewers: sylvestre.ledru, thakis

Reviewed By: thakis

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D55382

llvm-svn: 349054
2018-12-13 16:06:23 +00:00
Ilya Biryukov 4974d75d7c [CodeComplete] Fill preferred type on binary expressions
Reviewers: kadircet

Reviewed By: kadircet

Subscribers: arphaman, cfe-commits

Differential Revision: https://reviews.llvm.org/D55648

llvm-svn: 349053
2018-12-13 16:06:11 +00:00
Simon Pilgrim b0b2f1503a [X86][SSE] Fix all remaining modulo vector rotation amounts (PR38243)
There's still a couple of minor SimplifyDemandedElts regressions in some of the shift amount splats that will be fixed in future patches.

llvm-svn: 349052
2018-12-13 15:50:31 +00:00
Sanjay Patel a7b115b392 [DAGCombiner] after simplifying demanded elements of vector operand of extract, revisit the extract
Differential Revision: https://reviews.llvm.org/D55655

llvm-svn: 349051
2018-12-13 15:44:26 +00:00
Ilya Biryukov 4110967c7b [CodeComplete] Set preferred type to bool on conditions
Reviewers: kadircet

Reviewed By: kadircet

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D55431

llvm-svn: 349050
2018-12-13 15:36:32 +00:00
Eric Liu e2012972f9 [clangd] Enable cross-namespace completions by default in clangd
Summary:
Code completion will suggest symbols from any scope (incl. inaccessible
scopes) when there's no qualifier explicitly specified. E.g.
{F7689815}

As we are assigning relatively low scores for cross-namespace completion items, the overall code completion quality doesn't regress. The feature has been tried out by a few folks, and the feedback is generally positive, so I think it should be ready to be enabled by default.

Reviewers: hokein, ilya-biryukov, kadircet

Reviewed By: hokein, ilya-biryukov

Subscribers: MaskRay, jkorous, arphaman, cfe-commits

Differential Revision: https://reviews.llvm.org/D55649

llvm-svn: 349049
2018-12-13 15:35:43 +00:00
Daniel Cederman 77611426e1 [Sparc] Add membar assembler tags
Summary: The Sparc V9 membar instruction can enforce different types of
memory orderings depending on the value in its immediate field.  In the
architectural manual the type is selected by combining different assembler
tags into a mask. This patch adds support for these tags.

Reviewers: jyknight, venkatra, brad

Reviewed By: jyknight

Subscribers: fedor.sergeev, jrtc27, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D53491

llvm-svn: 349048
2018-12-13 15:29:12 +00:00
Simon Pilgrim ba91ff4a86 [X86][SSE] Fix modulo rotation amounts for v8i16/v16i16/v4i32 (PR38243)
llvm-svn: 349047
2018-12-13 15:23:09 +00:00
Daniel Sanders f5f3bef035 Revert r349041: [tblgen][disasm] Separate encodings from instructions
One of the GCC based bots is objecting to a vector of const EncodingAndInst's:
In file included from /usr/include/c++/8/vector:64,
                 from /export/users/atombot/llvm/clang-atom-d525-fedora-rel/llvm/utils/TableGen/CodeGenInstruction.h:22,
                 from /export/users/atombot/llvm/clang-atom-d525-fedora-rel/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp:15:
/usr/include/c++/8/bits/stl_vector.h: In instantiation of 'class std::vector<const {anonymous}::EncodingAndInst, std::allocator<const {anonymous}::EncodingAndInst> >':
/export/users/atombot/llvm/clang-atom-d525-fedora-rel/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp:375:32:   required from here
/usr/include/c++/8/bits/stl_vector.h:351:21: error: static assertion failed: std::vector must have a non-const, non-volatile value_type
       static_assert(is_same<typename remove_cv<_Tp>::type, _Tp>::value,
                     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/usr/include/c++/8/bits/stl_vector.h:354:21: error: static assertion failed: std::vector must have the same value_type as its allocator
       static_assert(is_same<typename _Alloc::value_type, _Tp>::value,
                     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

llvm-svn: 349046
2018-12-13 15:14:21 +00:00
Daniel Cederman b5d284408e [Sparc] Use float register for integer constrained with "f" in inline asm
Summary:
Constraining an integer value to a floating point register using "f"
causes an llvm_unreachable to trigger. This patch allows i32 integers
to be placed in a single precision float register and i64 integers to
be placed in a double precision float register. This matches the behavior
of GCC.

For other types the llvm_unreachable is removed to instead trigger an
error message that points out the offending line.

Reviewers: jyknight, venkatra

Reviewed By: jyknight

Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits

Differential Revision: https://reviews.llvm.org/D51614

llvm-svn: 349045
2018-12-13 15:13:29 +00:00
Jinsong Ji c7b43b94ce [PowerPC][NFC] Sorting out Pseudo related classes to avoid confusion
There are several Pseudo in PowerPC backend. 
eg:

* ISel Pseudo-instructions , which has let usesCustomInserter=1 in td 
ExpandISelPseudos -> EmitInstrWithCustomInserter will deal with them.
* Post-RA pseudo instruction, which has let isPseudo = 1 in td, or Standard pseudo (SUBREG_TO_REG,COPY etc.) 
ExpandPostRAPseudos -> expandPostRAPseudo will expand them
* Multi-instruction pseudo operations will expand them PPCAsmPrinter::EmitInstruction
* Pseudo instruction in CodeEmitter, which has encoding of 0.

Currently, in td files, especially PPCInstrVSX.td, 
we did not distinguish Post-RA pseudo instruction and Pseudo instruction in CodeEmitter very clearly.

This patch is to

* Rename Pseudo<> class to PPCEmitTimePseudo, which means encoding of 0 in CodeEmitter
* Introduce new class PPCPostRAExpPseudo <> for previous PostRA Pseudo
* Introduce new class PPCCustomInserterPseudo <> for previous Isel Pseudo

Differential Revision: https://reviews.llvm.org/D55143

llvm-svn: 349044
2018-12-13 15:12:57 +00:00
Daniel Sanders b51480ff3e [mir] Fix uninitialized variable in r349035 noticed by clang-atom-d525-fedora-rel and 3 other bots
llvm-svn: 349043
2018-12-13 15:05:27 +00:00
David Carlier a4ee854259 [Sanitizer] capsicum further support of the API
Reviewers: vitalybuka, krytarowski, emaste

Reviewed By: emaste

Differential Revision: https://reviews.llvm.org/D55622

llvm-svn: 349042
2018-12-13 15:05:24 +00:00
Daniel Sanders f81ecd2ce2 [tblgen][disasm] Separate encodings from instructions
Summary:
Separate the concept of an encoding from an instruction. This will enable
the definition of additional encodings for the same instruction which can
be used to support variable length instruction sets in the disassembler
(and potentially assembler but I'm not working towards that right now)
without causing an explosion in the number of Instruction records that
CodeGen then has to pick between.

Reviewers: bogner, charukcs

Reviewed By: bogner

Subscribers: kparzysz, llvm-commits

Differential Revision: https://reviews.llvm.org/D52366

llvm-svn: 349041
2018-12-13 14:55:57 +00:00
Simon Pilgrim 7c84f7ae3a [X86][SSE] Merge the vXi16/vXi32 vector rotation expansion cases. NFCI.
Merged the repeated code into a single if().

llvm-svn: 349040
2018-12-13 14:51:28 +00:00
Ivan Donchevskii e74d487be8 [clang-tidy] Share the forced linking code between clang-tidy tool and plugin
Extract code that forces linking to the separate header and include it in both plugin and standalone tool

Differential Revision: https://reviews.llvm.org/D55595

llvm-svn: 349038
2018-12-13 14:37:17 +00:00
Jonas Paulsson e79b1b986d [SystemZ] Pass copy-hinted regs first from getRegAllocationHints().
When computing register allocation hints for a GRX32Bit register, make sure
that any of the hinted registers that are also copy hints are returned first
in the list.

Review: Ulrich Weigand.
llvm-svn: 349037
2018-12-13 14:37:05 +00:00
Tatyana Krasnukha 98fc54870a Add missing Initialize/Terminate for Architecture plugins
llvm-svn: 349036
2018-12-13 14:28:25 +00:00
Daniel Sanders 9f3cf55e63 [mir] Serialize DILocation inline when not possible to use a metadata reference
Summary:
Sometimes MIR-level passes create DILocations that were not present in the
LLVM-IR. For example, it may merge two DILocations together to produce a
DILocation that points to line 0.

Previously, the address of these DILocations were printed which prevented the
MIR from being read back into LLVM. With this patch, DILocations will use
metadata references where possible and fall back on serializing them inline like so:
    MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15)

Reviewers: aprantl, vsk, arphaman

Reviewed By: aprantl

Subscribers: probinson, llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D55243

llvm-svn: 349035
2018-12-13 14:25:27 +00:00
Simon Pilgrim 320fd7383f [X86][BWI] Don't custom lower vXi8 rotations.
We always expand to shifts anyhow - test changes are just different scheduling only.

llvm-svn: 349034
2018-12-13 13:44:33 +00:00
Haojian Wu bf28533726 [clangd] Refine the way of checking a declaration is referenced by the written code.
Summary:
The previous solution (checking the AST) is not a reliable way to
determine whether a declaration is explicitly referenced by the source
code, we are still missing a few cases.

Reviewers: ilya-biryukov

Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D55191

llvm-svn: 349033
2018-12-13 13:17:04 +00:00
Haojian Wu e58e0903e2 [clangd] Avoid emitting Queued status when we are able to acquire the Barrier.
Reviewers: ilya-biryukov

Subscribers: javed.absar, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D55359

llvm-svn: 349032
2018-12-13 13:09:50 +00:00
Haojian Wu 9d0d9f884c [clangd] Move the utility function to anonymous namespace, NFC.
llvm-svn: 349031
2018-12-13 13:07:29 +00:00
Chen Zheng cdbd5bef6d [NFC][PowerPC] add verify-machineinstrs check
After rL349029 and rL348566, sj-ctr-loop.ll is ok for verify-machineinstrs check.

llvm-svn: 349030
2018-12-13 12:55:42 +00:00
Chen Zheng 9c6fa536e0 [PowerPC] intrinsic llvm.eh.sjlj.setjmp should not have flag isBarrier.
Differential Revision: https://reviews.llvm.org/D55499

llvm-svn: 349029
2018-12-13 12:25:20 +00:00
Simon Pilgrim ab973a45b9 [DAGCombine] Moved X86 rotate_amount % bitwidth == 0 early out to DAGCombiner
Remove common code from custom lowering (code is still safe if somehow a zero value gets used).

llvm-svn: 349028
2018-12-13 12:23:32 +00:00
Pavel Labath 1a4e2cc27a Classify tests in lit/Modules
We've recently developed a convention where the tests are placed into
subfolders according to the object file type. This applies that
convention to existing tests too.

llvm-svn: 349027
2018-12-13 12:13:29 +00:00
Diana Picus 99cd644b6c [ARM GlobalISel] Support exts and truncs for Thumb2
Mark G_SEXT, G_ZEXT and G_ANYEXT to 32 bits as legal and add support for
them in the instruction selector. This uses handwritten code again
because the patterns that are generated with TableGen are tuned for what
the DAG combiner would produce and not for simple sext/zext nodes.
Luckily, we only need to update the opcodes to use the Thumb2 variants,
everything else can be reused from ARM.

llvm-svn: 349026
2018-12-13 12:06:54 +00:00
Simon Pilgrim 77fc551d1a [TargetLowering] Add ISD::ROTL/ROTR vector expansion
Move existing rotation expansion code into TargetLowering and set it up for vectors as well.

Ideally this would share more of the funnel shift expansion, but we handle the shift amount modulo quite differently at the moment.

Begun removing x86 vector rotate custom lowering to use the expansion.

llvm-svn: 349025
2018-12-13 11:20:48 +00:00
Peter Smith fe3015d164 [ELF][AArch64] Fix adrp to undefined weak reference.
In the ABI for the 64-bit Arm architecture the section on weak references
states:
During linking, the symbol value of an undefined weak reference is:
- Zero if the relocation type is absolute
- The address of the place if the relocation type is pc-relative.

The relocations associated with an ADRP are relative so we should resolve
the undefined weak reference to the place instead of 0. This matches GNU
ld.bfd behaviour.

fixes pr34928

Differential Revision: https://reviews.llvm.org/D55599

llvm-svn: 349024
2018-12-13 11:13:01 +00:00